Semtech GX3290 is a high-density, low-power, high-performance crosspoint switch designed for high-speed signal routing in telecommunications, data communications, and test and measurement applications. It features 32x32 crosspoint switches with a maximum bandwidth of 12.5 Gbps per channel, low insertion loss, and low power consumption. The GX3290 also supports dynamic and active signal routing, allowing for flexible and efficient signal routing.
Semtech GX3290 is a high-density, low-power, high-performance crosspoint switch designed for high-speed signal routing in telecommunications, data communications, and test and measurement applications. It features 32x32 crosspoint switches with a maximum bandwidth of 12.5 Gbps per channel, low insertion loss, and low power consumption. The GX3290 also supports dynamic and active signal routing, allowing for flexible and efficient signal routing.
EB-GX3290 Host Control Software
User Manual
55970 - 1 August 2012
2 of 23
Proprietary & Confidential
Revision History
Contents
1. Introduction.....................................................................................................................................................3
2. Requirements..................................................................................................................................................3
3. Using the Host Control Software..............................................................................................................3
3.1 Quick-Start Procedures ..................................................................................................................4
3.1.1 Manual Reading and Writing ...........................................................................................4
3.1.2 Load and Save Configuration ...........................................................................................6
3.2 Signal Configuration ........................................................................................................................7
3.2.1 Using the Signal Configuration Tab................................................................................7
3.2.2 Active Mode ...........................................................................................................................7
3.2.3 Dynamic Mode ......................................................................................................................8
3.2.4 Input Settings (Static Inputs) .......................................................................................... 10
3.2.5 Output Settings (Static Outputs) ................................................................................... 11
3.2.6 Temperature Sensor ......................................................................................................... 12
3.3 PRBS ................................................................................................................................................... 12
3.3.1 TX Tab.................................................................................................................................... 12
3.3.2 RX Tab.................................................................................................................................... 13
3.4 GS2970/GS4911 ............................................................................................................................. 16
3.4.1 GS2970 Status ..................................................................................................................... 16
3.4.2 GS4911B Status .................................................................................................................. 18
3.5 FPGA Setting ................................................................................................................................... 19
4. Troubleshooting .......................................................................................................................................... 20
Version ECR Date Changes and/or Modifications
1 158288 August 2012 Changes throughout the document.
0 155254 December 2010 New document.
EB-GX3290 Host Control Software
User Manual
55970 - 1 August 2012
3 of 23
Proprietary & Confidential
1. Introduction
The GX3290 host control software is designed to evaluate the GX3290 Crosspoint device. The
software allows full control of the device from a host PC via a USB connection.
2. Requirements
The host control software requires the following:
• Windows XP (or above) operating system
• Microsoft.NET framework 4 SP1 (part of the installation if required)
• USB connection supporting high-speed mode
• 4KB of hardware disk space (for the GUI only)
3. Using the Host Control Software
The features of the GX3290 host control software are organized into tab pages, which are
described in the following sections:
Signal Configuration
PRBS
GS2970/GS4911
FPGA Setting
Figure 3-1: GX3290 Host Control Software
EB-GX3290 Host Control Software
User Manual
55970 - 1 August 2012
4 of 23
Proprietary & Confidential
3.1 Quick-Start Procedures
The EB-GX3290 allows for GSPI and APPI communication to the GX3290. Please set the
following jumpers for the desired method of communication:
The EB-GX3290 must be powered-down/powered-up when changing communication mode.
To use GSPI communication, set the jumpers accordingly and connect the GSPI dongle, ensuring
pin #1 on the dongle matches pin #1 on the EB-GX3290. No other settings or changes are
required.
To use the APPI bus, set the jumpers accordingly, an Altera evaluation board (Altera Cyclone III,
EP3C25F324C6H) must be connected to the EB-GX3290. The GSPI dongle must be connected as
described above. Use the FPGA Setting page to switch between APPI and GSPI communications.
APPI communication is implemented in the Altera FPGA board by translating GSPI commands
into APPI commands.
NOTE: Please contact Semtech GPG for the Altera Cyclone III, EP3C25F324C6H firmware if not
using a Semtech supplied board.
3.1.1 Manual Reading and Writing
The software will open with the screen capture shown in Figure 3-1. At this point, the portal will
communicate to Semtech devices through GSPI or APPI, with manual read/write commands
located at the bottom of the window in the Signal Configuration tab.
To initiate manual reading and writing:
1. To the right of the menu bar, there is a Dongle Select pull-down menu. Select the connected
USB-GSPI dongle as shown in
Figure 3-2.
Figure 3-2: Dongle Connection
Jumper GSPI APPI
J601
J603
123
123
321
321
EB-GX3290 Host Control Software
User Manual
55970 - 1 August 2012
5 of 23
Proprietary & Confidential
2. Enter the following information in the section shown in Figure 3-3:
1. Register Address
2. Option to Read/Write with buttons
3.
Chip Select (device to talk to in multi-device systems):
CS0 = GX3290
CS1 = GS2970
CS2 = GS4911B
CS3 = FPGA (if connected)
Figure 3-3: Manual Read/Write Section in First Tab
3. The GUI also allows for logging of read/write commands to aid in custom programming
and debugging:
1. The log can be enabled/disabled by clicking on View from the menu bar, and then
clicking on
Enable Logging.
2. The log can be cleared by clicking on
View, Enable Logging, and then Clear Log
Window
.
3. The log can be saved by clicking on
View, Enable Logging, and then Save log to file
button (a generic windows save dialogue box opens when pressed).
The
Length text box allows the user to enter the number of incremental registers that the user
would like to read/write to.
The
Burst Read/Burst Write functions allow for multiple registers to be written at once. When
Burst Writing, the same data is written to the incremental registers. When Burst Reading, the
data is displayed consecutively in the
Data text box.
The
Communication Log is comprised of the following information:
READ
[CS0] RD => A:0x200 D:0x0010 PASS
1. Chip Select: CS0
2. Operation: READ
3. Register Address: A:0x200
4. Data Read Back: D:0x0010
EB-GX3290 Host Control Software
User Manual
55970 - 1 August 2012
6 of 23
Proprietary & Confidential
WRITE
[CS0] WR => A:0x200 D:0x0010 PASS
1. Chip Select: CS0
2. Operation: WRITE
3. Register Address: A:0x200
4. Data Read Back: D:0x0010
3.1.2 Load and Save Configuration
To use the text parser, click on Load Configuration, which will then open a generic windows
save dialogue box:
Figure 3-4: Load Configuration
The Load Configuration will allow text file reading.
Use the
Load Configuration dialog box to select the text file and click Open to load the text file.
The text file convention must follow the example shown below:
First column represents the three numbers of the register in hexadecimal. The next column
represents the data bits to be written in hexadecimal. The number sign denotes the beginning of
the comments. The next two columns are text description of the affected inputs/outputs.
The
Save Configuration will allow text file reading, and for the device to save current signal
settings in the text file. Clicking on the
Save Configuration opens a standard Save File dialog
box.
NOTE: All dynamically user created configuration files will store the register data for the entire
device. For all manually created configuration files, it will only affect the registers they
specifically list.
Section 3.2 through Section 3.4 provide details on using the Graphical User Interface.
401 0003 # SDI<0> Enables the EQ and sets the boost to maximum
6bb 0023 # SDO<186> Sets the swing to 800mVpp and de-emphasis to 2.5db
EB-GX3290 Host Control Software
User Manual
55970 - 1 August 2012
7 of 23
Proprietary & Confidential
3.2 Signal Configuration
Active and Dynamic configuration registers are contained in the Signal Configuration tab in the
GUI.
3.2.1 Using the Signal Configuration Tab
The connections in the Signal Configuration tab will always go from left (inputs) to right
(outputs). Clicking on an input, makes it the selected input (color of the text and the lines will
vary depending on if the control is Dynamic [0:7] or Active). Successful connections will be
indicated by a thick line which is the color of your Active or Dynamic configuration.
When assigning a new connection to an output you must click twice while having your new
input selected, first to disable the current selection, and again to establish a new one.
Right clicking on any of the inputs, will result in 3 options (
Broadcast, Diagonal, and Power).
Broadcast is only selectable from the input side and it makes a connection from input to every
output.
Diagonal connects the inputs and outputs diagonally across the GUI creating a 1:1 ratio
for every I/O.
Power simply powers down the selected input/output, and turns off the channel.
Figure 3-5 shows the 3 options available upon right clicking any of the inputs.
Figure 3-5: Right-Click options on Inputs and Outputs
3.2.2 Active Mode
This section addresses registers 0x200 to 0x321.
Each of the EB-GX3290’s seventeen inputs (
SDI_0, SDI_1, SDI_8, SDI_9, SDI_22, SDI_81, SDI_94,
SDI_164, SDI_201, SDI_265, SDI_278, SDI_279, SDI_286, SDI_287, EXT_PG0, EXT_PG1, and
SDI_275) can be switched to any of the EB-GX3290’s seventeen outputs (SDO_0, SDO_1, SDO_9,
SDO_22, SDO_23, SDO_95, SDO_116, SDO_129, SDO_149, SDO_186, SDO_264, SDO_265,
SDO_278, SDO_286, SDO_287, MON0, and MON1).
EB-GX3290 Host Control Software
User Manual
55970 - 1 August 2012
8 of 23
Proprietary & Confidential
NOTE 1: Any input can also be routed to the MON1 output, which does not leave the board, but
does go into the GS2970.
NOTE 2:
SDI_275 is only enabled when MON1 has a signal routed to it. That is because SDI_275
is the output from the GS2970.
Additionally, each output has the following options available:
Figure 3-6 shows the Signal Configuration page, with Active Control:
Figure 3-6: Signal Configuration Page with Active Connections
In the example shown above, all outputs are powered up, and actively set to SDI_0.
NOTE: When
Refresh is pressed, all outputs not routed by the user will return to their default
values of connected to input 0.
3.2.3 Dynamic Mode
This section is the control for registers 0x000-0x11F, 0xA00 and 0xA01 (MON0 and MON1 can
not be dynamically switched).
Table 3-1: Active Mode
Function Description
Signal Invert Checked: channel signal polarity is inverted
Power On Checked: output channel is powered-on
Signal Configuration Updates the active output register with the
selected input
EB-GX3290 Host Control Software
User Manual
55970 - 1 August 2012
9 of 23
Proprietary & Confidential
Dynamic Configurations are differentiable from the active configuration via differing colored
lines. These line colors are customizable via the interface accessed by clicking on the displayed
color.
Each of the EB-GX3290’s sixteen inputs can be switched to any of the EB-GX3290’s outputs
except
MON0, and MON1. Each individual input/output connection is not applied until the
corresponding UPDATE_EN
[7:0] triggered from low to high (see GX3290 Data Sheet for more
details on using UPDATE_EN) or using the Software update enable pins.
Additionally, each output has the following options available:
Figure 3-7 shows the Signal Configuration page, with Dynamic Control:
Figure 3-7: Dynamic Configuration
NOTE: When Refresh is pressed, all outputs not routed by the user will return to their default
values of connected to input 0 in dynamic pin 0.
Table 3-2: Dynamic Configuration
Function Description
Signal Invert Checked: channel signal polarity is inverted
Power On Checked: output channel is powered-on
Signal Configuration Updates the active output register with the
selected input
Update Select A drop-down menu selects between 0, 1, 2,
3, 4, 5, 6 & 7
General->Enable Software Update Pins Checked: 8 bits available to enable updates,
and also disables the hardware update pins
EB-GX3290 Host Control Software
User Manual
55970 - 1 August 2012
10 of 23
Proprietary & Confidential
3.2.4 Input Settings (Static Inputs)
This section is control for input configuration registers 0x400 to 0x522. For each of the sixteen
EB-GX3290 inputs, termination and power-down can be enabled and disabled individually.
Additionally, the boost for each channel can be set for 0dB, 3.5dB, 7.5dB or maximum.
Figure 3-8 shows the
Signal Configuration page, with Static Inputs options:
Figure 3-8: Static Inputs Section in Signal Configuration Tab
Table 3-3: Input Settings
Function Description
Termination Checked: open
Unchecked: closed (see
GX3290 Data Sheet
for more details)
Power down Checked: on
Unchecked: off
Boost Select between: None, 3.5dB, 7.5dB or Max
General->HIZ_ACCM Checked: uses an internal resistive divider for
AC-coupled inputs
Unchecked: uses an external VCC_I supply to
set the common mode voltage (see
GX3290
Data Sheet
for more details)
EB-GX3290 Host Control Software
User Manual
55970 - 1 August 2012
11 of 23
Proprietary & Confidential
3.2.5 Output Settings (Static Outputs)
This page is the control for output setting registers 0x600 to 0x722. For each of the sixteen
EB-GX3290 outputs, the swing and de-emphasis settings can be adjusted individually. Swing
can be set for 200 mVppd, 400 mVppd, 800 mVppd, and when
HIGH_OP_V is enabled, it allows
for 1200 mVppd and 1600 mVppd. If
HIGH_OP_V is not selected (set when using VCC_OUT =
2.5V), 1200mV and 1600mV output swing selections are not available. De-emphasis can be set
for 0dB, 2.5dB, 6dB, 8.5dB or 12dB.
Figure 3-9 shows the
Signal Configuration page, with Static Outputs options with HIGH_OP_V
disabled, hiding 1200 and 1600 mVppd:
Figure 3-9: Static Outputs Section in Signal Configuration Tab
Table 3-4: Output Settings
Function Description
Swing Select between: 200mVppd, 400mVppd,
800mVppd, 1200mVppd or 1600mVppd
De emphasis Select between: None, 2.5dB, 6dB, 8.5dB or
12dB
General->HIGH_OP_V Only set this bit if 2.5V is used for VCC_OUT.
When this bit is set, 1200mV and 1600mV
output swings are selectable for the device
Invert Signal Inverts the positive and negative feeds to the
output channel
EB-GX3290 Host Control Software
User Manual
55970 - 1 August 2012
12 of 23
Proprietary & Confidential
3.2.6 Temperature Sensor
Reference the Using the Monitoring Features of the GX3290 Application Note for more details
on Temperature Sensor.
3.3 PRBS
3.3.1 TX Tab
The TX tab controls the pattern selection, PRBS_GEN_ENABLE, LOCK_OVERRIDE, DATA_RATE
and
Charge Pump Current settings for both TX0 and TX1 (TX1 also has a selection for clock
source).
Figure 3-10 shows the
Tx tab which is located on the PRBS tab in the main window:
Figure 3-10: Tx Tab from the PRBS Tab
Table 3-5: Tx PRBS
Function Description
PRBS_POLYNOMIAL A drop-down menu selects between: PRBS7, PRBS15,
PRBS23, and Square Wave outputs
LOCK_OVERIDE Checked: bypass PLL lock gating
PRBS_GEN_ENABLE Checked: activates the PRBS generator.
Note: When the PRBS Generator is disabled, the
generated signal does not completely terminate. The
PRBS_POLYNOMIAL bits must be re-written in order to
terminate the signal.
EB-GX3290 Host Control Software
User Manual
55970 - 1 August 2012
13 of 23
Proprietary & Confidential
3.3.2 RX Tab
The RX tab is the pattern checker, and the functionality of the controls are listed in Table 3-6.
The
RX tab has the ability to display the Horizontal Eye, which is a plot of Bit Errors vs. Phase,
showing a representation of the relative eye opening.
NOTE: there is a degree of smoothing applied to this graph in order to convey accurate
dimensions, for proper measurements select the phase and cycle the enable bit.
Figure 3-11 shows the Rx tab which is located on the
PRBS tab in the main window:
Figure 3-11: Rx Tab from the PRBS Tab
DATA_RATE A drop-down menu selects between 270Mbps, and
2.97Gbps
Charge Pump Current A drop-down menu selects between 20μA, 100μA, and
200μA
Ext. Hi-speed clock input (TX1 only) Checked: external clock selected
Unchecked: internal clock selected
Table 3-5: Tx PRBS (Continued)
Function Description
EB-GX3290 Host Control Software
User Manual
55970 - 1 August 2012
14 of 23
Proprietary & Confidential
Table 3-6: RX PRBS
Function Description
BIST
BIST RX0 Enable Clear to use the checker
BIST RX1 Enable Clear to use the checker
RX LOS
RX0 S2P Powerdown Check to power-down the S2P converter
RX0 Neutral Phase De-Serialize Check to disable neutral phase de-serialize
RX0 Clock multiplex Clear to enable pattern checking
RX1 S2P Powerdown Check to Power-down the S2P converter
RX1 Neutral Phase De-Serialize Check to disable neutral phase de-serialize
RX1 Clock multiplex Clear to enable pattern checking
PRBS
Rx0/Rx1 PRBS Status
Pass Indicates the signal has passed all tests
Fail
Indicates the signal has failed. (See
GX3290 Data Sheet
for description)
Lock Indicates a signal lock
ERROR_COUNT Indicates the amount of errors detected in the specified
error checking cycle
Rx0 Carrier Detect/Rx1 Carrier Detect Indicates the existence of an incoming signal
Rx0/Rx1 Tab
Enable Checked: enables PRBS checking
LOCK_OVERRIDE Check to disable clock gating based on the PLL lock signal
INVERT_PRBS_IN Checked: inverts the data before the PRBS checker
PRBS_POLYNOMIAL Selects the polynomial type; choices in the drop-down
menu are PRBS7, PRBS15, and PRBS23
PRBS_CHK_MODE Selects the mode of operation; choices are CDR, Phase
Interpolator, and CDR vs. phase interpolator (see
GX3290
Data Sheet
for full description)
DATA_RATE Sets the data rate; choices are Unforced, 270Mbps, and
2.97Gbps
PLL_LOOP_BANDWIDTH Sets the PLL bandwidth; choices are 0.5x, 1.0x, 1.5x, and
2.0x
CDR_BYPASS Check to force the RX0 CDR to output un-timed data
regardless of lock state
DATA_POL_INV Checked: Inverts the data within the RX0 neutral phase
S2P
POWER_DOWN Checked: To power down the PRBS checker
EB-GX3290 Host Control Software
User Manual
55970 - 1 August 2012
15 of 23
Proprietary & Confidential
VCO_SEL Checked: To select integrated CDR as clock source
Phase Interpolator
PHASE_CONTROL Manual phase selector; choice between 0 and 127 (see
GX3290 Data Sheet for full description)
POWER_DOWN Checked: Power down interpolator
RESET Checked: Resets the Phase Interpolator
LOL
PRBS_LOL_TIME (Bits) Sets the number of bits to consider loss of lock; choices are
0, 10, 100, 1000, 2^7-1, (2^7-1)*2, 2^15-1, (2^15-1)*2,
2^23-1, and (2^23-1)*2
PRBS_LOL_THRESH Sets the number of errors which must be received for Loss
of Lock indicator to become active; choices are
1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,
and 32768
BER
PRBS_BER_TIME (Bits) Sets the amount of bit error rate is calculated over; choices
are Infinite,2^7-1, (2^7-1)*2, 2^15-1, (2^15-1)*2, 2^23-1,
and (2^23-1)*2
PRBS_BER_THRESH Sets the maximum number of errors received before
failure is indicated. BER_THRESH only acts as an upper
bound to number of errors received when BER_TIME is set
to infinite otherwise BER_THRESH only controls the
accuracy of the displayed horizontal eye diagrams (see
Using the Monitoring Features of the GX3290
Application Note
for full description); choices are 1, 2, 4,
8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384,
and 32768
LOCK
PRBS_LOCK_TIME (Bits) Sets the number of bits over which less than LOCK_THRESH
errors must be observed; choices are 0, 10, 100, 1000,
2^7-1, (2^7-1)*2, 2^15-1, (2^15-1)*2, 2^23-1, and
(2^23-1)*2
PRBS_LOCK_ATTEMPTS Sets the number of times the device will attempt to
achieve Lock; choices are No limit,1,2,4,8,16,32,64,128, and
256
PRBS_LOCK_THRESH Sets the number of errors that will prevent Lock from
being achieved; choices are 1, 2, 4, 8, 16, 32, 64, 128, 256,
512, 1024, 2048, 4096, 8192,16384, and 32768
Function (Continued) Description (Continued)
EB-GX3290 Host Control Software
User Manual
55970 - 1 August 2012
16 of 23
Proprietary & Confidential
3.4 GS2970/GS4911
3.4.1 GS2970 Status
A GS2970A 3G/HD/SD SDI Receiver (with SMPTE audio and video processing) is installed on
the EB-GX3290 to help with signal identification, status monitoring, and re-clocking.
To make use of the GS2970A monitoring, MON1 must be enabled and mapped to the input
signal of interest.
NOTE:
Do not map DVB-ASI, this could cause permanent damage to the GS2970A.
By pressing the
Refresh button, all of the indicators will be updated with the mapped signals
status.
Please see the GS2970A Data Sheet for a full description.
Figure 3-12 and Figure 3-13 show the
GS2970A Status tabs with HD Audio Status, and with SD
Audio Status respectively:
Figure 3-12: GS2970A Status (with HD Audio Status)
EB-GX3290 Host Control Software
User Manual
55970 - 1 August 2012
18 of 23
Proprietary & Confidential
3.4.2 GS4911B Status
A GS4911B HD/SD/Graphics Clock and Timing Generator is installed on the EB-GX3290 to
enable frame boundary switching. To utilize the GS4911B monitoring, connect a valid
synchronization signal to J1102, and program the GS4911B using dip-switch SW1101, or
program the Gennum-supplied Altera FPGA using the registers described in the appendix.
By pressing the
Refresh button, the indicators will be updated with the lock conditions of the
GS4911B.
Please see the GS4911B Data Sheet for a full description.
Figure 3-14 shows the
GS4911 Status tab:
Figure 3-14: GS4911 Status
EB-GX3290 Host Control Software
User Manual
55970 - 1 August 2012
19 of 23
Proprietary & Confidential
3.5 FPGA Setting
Host Interface Select: The mode of communication can be selected between APPI and GSPI
through radio buttons.
Frame Boundary Switching (UPDATE_EN0 only):
The evaluation board will allow for two different methods of frame boundary switching.
This section of the GUI will allow for deterministic or frame boundary switching of the GX3290.
Method 1:
To enable this feature, do the following:
1. Route the reference video signal to the GS2970
2. Enter the desired Line and Pixel
3. Check enable
The timing signals and PCLK are routed to the FPGA and used to activate the switch. To
over-ride the programmed Pixel and Line Settings, the UPDATE_EN0 hardware pin can be
toggled from low to high or 0x01 can be written to register 0 of the FPGA CSR. The UPDATE_EN0
pin has a parallel connection between J1302.3 and the HSMC for the FPGA.
Method 2:
Using this method requires all video signals to be locked to the sync pulse applied to J1102.
• Apply a valid sync pulse to J1102 on the EB-GX3290
• Program the VID_STD[5:0] in the GS4911B using either the GUI or hardware pins
• Program the desired line and pixel in the FPGA
The UPDATE_EN0 pin will transition from LOW to HIGH based on the programmed values. If no
valid sync pulse is applied, the update will happen immediately as the GS4911B will free-run.
Enable - check to set UPDATE_EN0 HIGH when pixel and line conditions are not met or to
override conditions.
Pixel - set pixel number to set UPDATE_EN0 HIGH.
Line - set line number to set UPDATE_EN0 HIGH.
Figure 3-15 shows the
FPGA Setting tab:
Page is loading ...
Page is loading ...
Page is loading ...
-
1
-
2
-
3
-
4
-
5
-
6
-
7
-
8
-
9
-
10
-
11
-
12
-
13
-
14
-
15
-
16
-
17
-
18
-
19
-
20
-
21
-
22
-
23
Semtech GX3290 is a high-density, low-power, high-performance crosspoint switch designed for high-speed signal routing in telecommunications, data communications, and test and measurement applications. It features 32x32 crosspoint switches with a maximum bandwidth of 12.5 Gbps per channel, low insertion loss, and low power consumption. The GX3290 also supports dynamic and active signal routing, allowing for flexible and efficient signal routing.
Ask a question and I''ll find the answer in the document
Finding information in a document is now easier with AI
Related papers
-
Semtech GX3290 User guide
-
Semtech EB-GS12190 Evaluation Board User guide
-
Semtech GX3290 IBIS-AMI User guide
-
Semtech EBK-GS12150 Evaluation Board Kit User guide
-
Semtech EB-GS12090 Evaluation Board User guide
-
Semtech EB-UHD-SDI Evaluation Board Kit User guide
-
Semtech RDK-12GCONV UHD Converter User guide
-
-
Semtech EB-GS2972 Evaluation Board User manual
-
Semtech GS12070 User guide
Other documents
-
Altera Cyclone III Reference guide
-
Altera HSMC Reference guide
-
-
AOR AR-ALPHA Owner's manual
-
Advanced Poly-Packaging T-300 Operating instructions
-
Sencore SMD 989 User manual
-
DRAKE OBM100 User manual
-
Contec GSPI-Q3700-LLVA NEW Owner's manual
-
-
Eurotech DynaPCN 10-20 Owner's manual