2. AKM
  3. AK5736VN

AKM AK5736VN Evaluation Board Manual

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[AKD5736-A]
<KM125102> 2019/05
GENERAL DESCRIPTION
The AKD5736-A is an evaluation board for AK5736VN which have a 6-channel differential ADC with
SAR ADC for DC measurement. It is possible to control the setting of the board via an USB port.
Stereo mini jack supports inputs of Line and Microphone. This board also has a digital interface and
can achieve the interface with a digital audio system through an optical connector.
Ordaring guide
AKD5736-A --- Evaluation board for AK5736VN.
(Control software is included in this package)
FUNCTION
Analog audio input : Stereo-mini jack (x7)
Digital audio output : Optical (x1), COAX (x1), External (x1)
USB port for the board control
AK5736
OPT-OUT
DIT
(AK4118A)
SDTO2
AGND
SMUX(DSP)
12pin-PORT
DGND
SDTO1
MCLK
BICK
LRCK
MCKO
DVDD
AVDD
SW-REG
+14.5V→+4V
AVSS
CPVSS
BICK
LRCK
DAUX
PIC4550
LDO
+3.3V
USB
PORT
SDA/CDTI
SCL/CCLK
IN3P
IN3N
IN2P
IN2N
IN1P
IN1N
JP
AIN2
S-Mini
Jack
AIN1
S-Mini
Jack
AIN4
S-Mini
Jack
AIN6
S-Mini
Jack
CAD0/CSN
CAD1/CDTO
IN4P
IN4N
IN5P
IN5N
IN6P
IN6N
AIN3
S-Mini
Jack
AIN5
S-Mini
Jack
DVSS
LDO
+3.3V
LDO
+1.8V
LDO
+3.3V
LDO
+3.3V
CPVDD
VDD18
AVDD
DVDD
CPVDDD
VDD18
HVDD
AVDD
DVDD
VDD18
D33V
AVDD
DVDD
CPVDD
VDD18
COAX-OUT
SN74AVC4T245 x 4
SDTO3
I2S, Left justified and TDM
Level shifter
DVDD ⇔ D33V
CPOUT
JP
JP
JP
JP
JP
AUX
S-Mini
Jack
Common
Generator
PDN
SPI
CPEN
SPI
SPI
SPI
LDOE
SPI
SPDIF
Control Signal
Control Signal (SPI)
+14.5V
figure 1.AKD5736-A Block Diagram
AKD5736-A
AK5736 Evaluation Board Rev.2
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Board Outline Chart
■ Outline Chart
figure 2.AKD5736-A Outline Chart
Description
Tip No
IC
Function
U101
AK5736
A/D Converter
U201
OPA1612A
OP-AMP (Input Buffer)
U301
AK4118A
Digital Audio I/F Transceiver
U302
TC7SZ04
Inverter
U303～306
74AVC4T245
Level Shifter (+3.3V⇔+3.3V or +1.8V)
U401,U403
PCA9306
Level Shifter (+3.3V⇔+3.3V or +1.8V)
U402
PIC18F4550
8bit PIC Microcontrollers
U404
TXB0106
Level Shifter (+3.3V⇔+3.3V or +1.8V)
T501
LT3684
Switching Regulator(+14.5V→+4.0V)
T502,T503,T505
AP1154ADL33
LDO Regulator(+4.0V→+3.3V)
T504
TK73618AME
LDO Regulator(+4.0V→+1.8V)
Analog Input
AUX Input
Power Supply Jack
Power Supply Jack
Optical Output
Coaxial Output
USB Port
DSP Output
U101
U301
U303~306
U402
U404
U403
U401
U201
T502
T503
T504
T505
T501
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Evaluation Board Manual
■ Operation Sequence
1) Set up Power Supplies by jacks
2) Analog Input Setting
(1) Differential mode
(1-1) Using AIN
(1-2) Using AUX
(2) Single-end mode
(2-1) Using AIN
(2-2) Using AUX
3) Setup the Audio I/F Evaluation Mode.
(1) Evaluation of A/D using DIT of AK4118A.
(1-1) Slave Mode (default)
(1-2) Master Mode
(2) Evaluation of A/D using DSP.
(2-1) Slave Mode
(2-2) Master Mode
4) Setting of other jumper pins
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1) Set up the power Supplies by jacks
(1) When AVDD, CPVDD, DVDD, and VDD18 are supplied from regulator, and HVDD is supplied
from CPOUT pin. (Default)
JP102 selects the path from CPOUT pin.
JP502, JP503, JP505, JP506 select the path from regulator.
JP102
HVDD-SEL
JP502
AVDD_SEL
JP503
CPVDD_SEL
JP505
DVDD_SEL2
JP506
VDD18_SEL
J501
+14.5V / IN
J503
AVDD / OPEN
J506
CPVDD / OPEN
J504
DVDD / OPEN
J504
VDD18 / OPEN
HVDD CPOUT
AVDD REG
REG CPVDD
REG DVDD
REG VDD18
figure 3. Setting of using the regulator
In default setting, the voltage of DVDD is +1.8V (JP504), and D3.3V are supplied to U305 and U306
(JP302, JP303).
JP504
DVDD-SEL1
JP302
VCC_SEL
JP303
VCC_SEL
3.3V 1.8V
DVDD D33V
DVDD D33V
figure 4. Setting of DVDD selector and VCC selector
(2) When AVDD, CPVDD, DVDD and VDD18 are supplied from the power supply connectors.
JP502, JP503, JP505, JP506 select the path from the power supply connectors.
J501
+14.5V / IN
J503
AVDD / IN
J506
CPVDD / IN
J504
DVDD / IN
J504
VDD18 / IN
JP102
HVD-SEL
JP502
AVDD_SEL
JP503
CPVDD_SEL
JP505
DVDD_SEL2
JP506
VDD18_SEL
HVDD CPOUT
AVDD REG
REG CPVDD
REG DVDD
REG VDD18
figure 5. Setting of using the power supply connector
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2) Analog Input Setting
The Evaluation Board has 7 stereo-mini jacks, AIN1~6(J201, J202, J203, J204, J205, J206) and AUX(J207).
In differential mode, AIN1-AIN2, AIN3-AIN4 and AIN5-AIN6 are pair.
In single-end mode, AIN1, AIN3, AIN5 is used, AIN2, AIN4, AIN6 is not used.
AUX can be used in both modes.
Table 1.
Differential mode
Single-end mode
AIN1
○
○
AIN2
○
‐
AIN3
○
○
AIN4
○
‐
AIN5
○
○
AIN6
○
‐
AUX
○
○
Jumper Setting of each input mode
(1) Differential mode
(1-1) Using AIN
J201
J202
J203
J204
J205
J206
IN1P
IN1N
IN2P
IN2N
IN3P
IN3N
IN4P
IN4N
IN5P
IN5N
IN6P
IN6N
Please supply DC level by TP201~TP212
JP203
AIN-GND AUX-GND
IN1N-SEL
JP204
AIN-GND AUX-GND
IN2N-SEL
JP207
AIN-GND AUX-GND
IN3N-SEL
JP208
AIN-GND AUX-GND
IN4N-SEL
JP211
AIN-GND AUX-GND
IN5N-SEL
JP212
AIN-GND AUX-GND
IN6N-SEL
figure 6. Jumper setting of AIN path in differential mode
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(1-2) Using AUX (default)
J201
J202
J203
J204
J205
J206
AUX+
AUX-
AUX+
AUX-
AUX+
AUX-
AUX+
AUX-
AUX+
AUX-
AUX+
AUX-
Please Supply DC level by JP214 or TP214/TP215
JP203
AIN-GND AUX-GND
IN1N-SEL
JP204
AIN-GND AUX-GND
IN2N-SEL
JP207
AIN-GND AUX-GND
IN3N-SEL
JP208
AIN-GND AUX-GND
IN4N-SEL
JP211
AIN-GND AUX-GND
IN5N-SEL
JP212
AIN-GND AUX-GND
IN6N-SEL
figure 7. Jumper setting of AUX path in differential mode
(2) Single-end mode
(2-1) Using AIN
J201
J202
J203
J204
J205
J206
IN1L
IN1R
IN3L
IN3R
IN5L
IN5R
Please supply DC level by TP201/TP202/TP205/TP206/TP209/TP210.
JP203
AIN-GND AUX-GND
IN1N-SEL
JP204
AIN-GND AUX-GND
IN2N-SEL
JP207
AIN-GND AUX-GND
IN3N-SEL
JP208
AIN-GND AUX-GND
IN4N-SEL
JP211
AIN-GND AUX-GND
IN5N-SEL
JP212
AIN-GND AUX-GND
IN6N-SEL
※Any of AIN-GND and AUX GND.
figure 8. Jumper setting of AIN path in single-end mode
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(2-2) Using AUX
J201
J202
J203
J204
J205
J206
AUXL
AUXR
AUXL
AUXL
AUXR
AUXR
Please supply DC level by TP201/TP202/TP 205/TP206/TP209/TP210.
JP203
AIN-GND AUX-GND
IN1N-SEL
JP204
AIN-GND AUX-GND
IN2N-SEL
JP207
AIN-GND AUX-GND
IN3N-SEL
JP208
AIN-GND AUX-GND
IN4N-SEL
JP211
AIN-GND AUX-GND
IN5N-SEL
JP212
AIN-GND AUX-GND
IN6N-SEL
※Any of AIN-GND and AUX GND.
figure 9. Jumper setting of AUX path in single-end mode
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3) Setup the Audio I/F Evaluation Mode.
In case of using the AK4118A when evaluating the AK5736, the audio interface format of the AK5736and
AK4118A must be matched.
Refer to the datasheet for audio interface format of AK5736, and audio interface format of AK4118A. (Table 4)
The AK4118A operates at sampling frequency of 32 kHz or more. If the sampling frequency is lower than 32 kHz,
please use other mode. Refer to the datasheet for register setting of the AK5736.
(1) Evaluation of A/D using DIT of AK4118A.
(1-1) Slave Mode.
・PORT301(optical) or PORT302(coaxial) is used.
・AK5736 : Slave mode (MSN bit = L)
・AK4118A : Master mode
AK5736
PORT301
OPT-OUT
DIT
(AK4118A)
SDTO2
SMUX(DSP)
X’tal
SDTO1
MCLK
BICK
LRCK
MCKO
BICK
LRCK
DAUX
COAX-OUT
SN74AVC4T245 x 4
SDTO3
I2S, Left justified
Level shifter
DVDD ⇔ D33V
PORT302
JP301
JP304
COAX OPT
When “COAX” is used
JP304
COAX OPT
When “OPT” is used
figure 10. AK5736 slave/AK4118A master/optical or coaxial output
MCLK, BICK and LRCK are supplied from AK4118A to AK5736.
When PORT301 is used, the output is the optical data of AK5736 through AK4118A.
If PORT302 is used, the output is the coaxial data of AK5736 through AK4118A.
SDTO1, SDTO2, and SDTO3 can be selected by JP301.
Master/Slave of AK5736 and AK4118 can be selected by MSN bit and DIF[2:0]. Refer to table.2
Clock
MSN bit
Clock Pin Status
Mode
MCLK
BICK
LRCK
EXT Master
1
In
Out
Out
EXT Slave
0 (default)
In
In
In
Table 2. Master/Slave select of AK5736
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Mode
DIF2
DIF1
DIF0
DAUX
SDTO
LRCK
BICK
I/O
I/O
0
0
0
0
24bit, Left justified
16bit, Right justified
H/L
O
64fs
O
1
0
0
1
24bit, Left justified
18bit, Right justified
H/L
O
64fs
O
2
0
1
0
24bit, Left justified
20bit, Right justified
H/L
O
64fs
O
3
0
1
1
24bit, Left justified
24bit, Right justified
H/L
O
64fs
O
4
1
0
0
24bit, Left justified
24bit, Left justified
H/L
O
64fs
O
5
1
0
1
24bit, I
2
S
24bit, I
2
S
L/H
O
64fs
O
6
1
1
0
24bit, Left justified
24bit, Left justified
H/L
I
64-128fs
I
7
1
1
1
24bit, I
2
S
24bit, I
2
S
L/H
I
64-128fs
I
Table 3. Master/Slave and data format select of AK4118A
(1-2) Master Mode
・PORT301(optical) or PORT302(coaxial) is used.
・AK5736 : Master mode (MSN bit = H)
・AK4118A : Slave mode
AK5736
PORT301
OPT-OUT
DIT
(AK4118A)
SDTO2
SMUX(DSP)
X’tal
SDTO1
MCLK
BICK
LRCK
MCKO
BICK
LRCK
DAUX
COAX-OUT
SN74AVC4T245 x 4
SDTO3
I2S, Left justified
Level shifter
DVDD ⇔ D33V
PORT302
JP301
JP304
COAX OPT
When “COAX” is used
JP304
COAX OPT
When “OPT” is used
figure 11. AK5736 master/AK4118A slave/optical or coaxial output
MCLK is supplied from AK4118A or X1 to AK5736. LRCK, BICK, SDTO1, SDTO2 and SDTO3 of
AK5736 are outputs to AK4118A. When PORT301 is used, the output is the optical data of AK5736 through
AK4118A. If PORT302 is used, the output is the coaxial data of AK5736 through AK4118A. SDTO1,
SDTO2 and SDTO3 can be selected by JP301.
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(2) Evaluation of A/D using SMUX301 (DSP)
(2-1) Slave Mode.
・SMUX301(DSP) is used.
・AK5736 : Slave mode (MSN bit = L)
MCLK, BICK and LRCK are supplied from SMUX301 to AK5736. SDTO1, SDTO2 and SDTO3 are
outputs to SMUX301.
AK5736
PORT301
OPT-OUT
DIT
(AK4118A)
SDTO2
SMUX(DSP)
X’tal
SDTO1
MCLK
BICK
LRCK
MCKO
BICK
LRCK
DAUX
COAX-OUT
SN74AVC4T245 x 4
SDTO3
I2S, Left justified
Level shifter
DVDD ⇔ D33V
PORT302
JP301
figure 12. AK5736 slave/AK4118A master/DSP output
(2-2) Master Mode
・SMUX301(DSP) is used.
・AK5736 : Master mode (MSN bit = H)
MCLK are supplied from SMUX301 to AK5736. SDTO1, SDTO2 and SDTO3 are outputs to SMUX301.
AK5736
PORT301
OPT-OUT
DIT
(AK4118A)
SDTO2
SMUX(DSP)
X’tal
SDTO1
MCLK
BICK
LRCK
MCKO
BICK
LRCK
DAUX
COAX-OUT
SN74AVC4T245 x 4
SDTO3
I2S, Left justified
Level shifter
DVDD ⇔ D33V
PORT302
JP301
figure 13. AK5736 master/AK4118A slave/DSP output
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4) Setting of other jumper pins
(1) SDTO path select (JP301)
SDTO path from AK5736 to AK4118A is set by JP301.
JP301
SDTO1
SDTO2
SDTO3
figure 14. SDTO path setting (default: SDTO1)
(2) MIC power bias path (JP101)
MIC bias generated by AK5736 can be used with JP101.
JP101
figure 15. MIC bias path setting (default: Short)
(3) COMIN+/COMIN- select (JP101)
Setting the common voltage of IN*P / IN*N
COMIN+ : Common voltage for IN*P
COMIN- : Common voltage for IN*N
JP214
GND
1/3MPWR
1/2HVDD
GND
2/3MPWR
1/2HVDD
COMIN-
COMIN+
figure 16. Common voltage setting (default:1/3MPWR and 2/3MPWR)
(4) VDD18 External supply mode (JP103)
Short : External supply
Open : Internal supply
JP103
figure 17. VDD18 External supply setting (default: Open)
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(5) MPWR External supply mode (JP213)
1-2 Short : MIC-Power is supplied from TP213
2-3 Short : MIC Power is supplied form AK5736
JP213
EXT-MPWR MPWR
External mode
JP213
EXT-MPWR MPWR
Internal mode
figure 18. MIC-Power supply setting (default: MPWR)
(6) Others
JP215, JP216, JP217, JP218, JP403, JP404, JP405, JP406, JP501 : Always short
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CONTROL SOFTWARE MANUAL
■ Evaluation Board and Control Software Settings
1. Set an evaluation board properly.
2. Connect Evaluation board to PC with USB cable.
USB control is recognized as HID (Human Interface Device) on the PC.
When it can not be recognized correctly please reconnect Evaluation board to PC with USB cable.
3. Proceed evaluation by following the process below.
[Support OS]
Windows 7 (32bit) / 10 (64bit)
■ Operation Screen
1. Start up the control program following the process above.
2. After the evaluation board’s power is supplied, the AK5736 must be reset once.
(Pushing [Port Reset] button, and power up AK5736 by [PDN : H] button.)
3. The operation screen is shown below
figure 19. Control Software display
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■ Operation Overview
Function, register map and testing tool can be controlled by this control software. These controls are selected by upper
tabs.
Buttons which are frequently used such as register initializing button “Write Default”, are located outside of the
switching tab window. Refer to the “■ Dialog Boxes” for details of each dialog box setting.
figure 20. Operation Overview
1. [Port Reset]: For when connecting to PC with USB cable
Click this button after the control software starts up when connecting to PC with USB cable.
This button can reset AK4118A and AK5736.
2. [Write Default]: Register Initializing
When the device is reset by a hardware reset, use this button to initialize the registers.
3. [All Write]: Executing write commands for all registers displayed.
4. [All Read]: Executing read commands for all registers displayed.
5. [Save]: Saving current register settings to a file.
6. [Load]: Executing data write from a saved file.
7. [All Reg Write]: [All Reg Write] dialog box is popped up.
8. [Sequence]: [Sequence] dialog box is popped up.
9. [Sequence (File)]: [Sequence (File)] dialog box is popped up.
10. [Read]: Reading current register settings and display on to the Register area (on the right of the main window).
This is different from [All Read] button, it does not reflect to a register map, only displaying hexadecimal.
11. [PDN : L]: Selection PDN H/L of AK5736.
12. [No Error]: When the DC error is detected, the button turns red.
13. [Error Detail]: [Error Detail] dialog box is popped up.
14. [Start]: Starting to detect the DC error. The frequency of detecting is decided in the right box.
15. [CPOUT Enable]: Selecting of the CPOUT output as HVDD or not.
16. [LDO Disable]: Selecting of the use of LDO or not.
17. [PORTSEL SMUX]: Selecting output “SMUX” or “PORT301 or PORT302”.
(6)
(5)
(4)
(3)
(2)
(1)
(7)
(8)
(9)
(10)
(11)
(12)
(13)
(14)
(15) (16) (17)
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■ Error Detect function
When the error is detected, the button displays “Error”.
The detail of the error can be shown by pushing the button “Error Detail”
The frequency of checking the error can be set in the blank box.
figure 21. Diagnostics Reporting and Fault Masking
When “Error detail” is pushed, the below display is popped up.
The item detected error turns red and “Error”.
Checking the “Mask”, the error is not detected in the case of error occurring.
figure 22. Window of [Error Detail]
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■ Tab Functions
1. [Function]: Easy function control tab
This tab is for the control of this evaluation board easily.
Each button link to the register of AK5736 and AK4118A, the register is written by push these buttons.
figure 23. Window of [Function]
(1-1) [DC]
Selecting “DC mode” or “AC mode”.
figure 24. DC mode and AC mode
(1-2) [STD1~6]
Selecting analog input interface “differntial” or “single-end”.
figure 25. Differential and single-end
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(1-3) [PreGainAMP Setting]
Setting preliminaly amp gain. When a value is input in the edit box, the slider is moved to the value that selected by the
edit box.Use the mouse or arrow keys on the keyboard for fine tuning.
figure 26. Window of [PreGain Amp Setting]
(1-4) [Digital LPF]
Setting Digital LPF.
figure 27. Window of [Decimation LPF Settings]
(1-5) [ADC Digital Volume Control]
Setting the digital attenuatior transition time and the volume. The digital attenuatior transition time is selected by the
box. The volume of each ADC channel can be changed by the slider or setting the value int the blank.
figure 28. Window of [VOL Setting]
Slider bar is
moved to the
selected value.
Input value is adjusted automatically
to the value which can be set up.
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(1-6) [Reset]
Resetting AK5736. Pushing the “Reset”, AK5736 opearates and the button displays “Operation”.
figure 29. Reset button
(1-7) [Audio IF]
Selecting the audio format of AK5736. TDM mode can be selected in the upper area, the data format can be selected
the lower area.
figure 30.Window of [Audio IF]
(1-8) [Mic Bias Voltage Setting]
Setting Mic Bias Voltage. It can be changed by the slider.
figure 31. Window of [Mic Bias Setting]
(1-9) [4118 Setting]
Selecting the audio format of AK4118A.
figure 32. Window of [4118 Setting]
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(1-10) [Diagnostics]
Setting SAR check mode and VBATM attenuation. The check mode can be change in “Simple check mode” or “Highly
precise check”. The slider of ADC Thresh Setting can be used depending on the check mode setting.
In the upper right area, the attanuation of VBATM(ATT_VB) can be selectted in “ATT=0.1” or “ATT=0.3”.
figure 33. Window of ADC & SAR Setting
(1-11) [Start Up]
Setting the below condition.
Outputs path : AK4118A
CPOUT : Enable
LDO : Disable
AK5736 : Slave mode
AK4118A : Master mode
Data format : 24bits I2S
MCLK : 512fs
BICK : 64fs
LRCK : 48kHz
PDN button : H (AK5736 and AK4118A power up)
(1-12) [Clock Setting]
Setting the clock and Master/Slave of AK5736 and AK4118A. The frequency of MCLK, BICK and LRCK can be
changed by the box.
figure 34. Slave mode and Master mode
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2. [REG]: Register Map
This tab is for a register writing and reading.
Each bit on the register map is a push-button switch. Button Down indicates “H” or “1” and the bit name is in red
(when read only it is in deep red). Button Up indicates “L” or “0” and the bit name is in blue (when read only it is in
gray)
Grayout registers are Read Only registers. They cannot be controlled.
The registers which is not defined in the datasheet are indicated as “---”.
figure 35. Window of [REG]
(1-1) [Write]: Data Writing Dialog
It is for when changing two or more bits on the same address at the same time.
Click [Write] button located on the right of the each corresponded address for a pop-up dialog box.
When the checkbox is checked, the data will be “H” or “1”. When the checkbox is not checked, the data will be “L”
or “0”. Click [OK] to write setting values to the registers, or click [Cancel] to cancel this setting.
figure 36. Window of [Register Set]
[Read]: Data Read
Click [Read] button located on the right of the each corresponded address to execute a register read.
After register reading, the display will be updated regarding to the register status.
Button Down indicates “H” or “1” and the bit name is in red (when read only it is in deep red).
Button Up indicates “L” or “0” and the bit name is in blue (when read only it is in gray)
Please be aware that button statuses will be changed by a Read command.
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