Analog Devices AD5162 User manual

Type
User manual
256-Position SPI Compatible
Dual Digital Potentiometer
Evaluation Board User Manual
AD5162
5 Steps To Setup The Evaluation Board…
5. Measure Result
W
B
4. Provide Power Suppl
y
O
r
Use
Power from Parallel Port
GND +5V
No Programming
Skills Required!
Figure 1. Evaluation Kit Setup
2. Configure Board and Connect to Parallel Port with
Provided Parallel Cable
1. Install AD5162 Software
3. Open AD5162 RevA.exe
Rev B 11/03/03
1
256-Position SPI Compatible
Dual Digital Potentiometer
Evaluation Board User Manual
AD5162
General Overview
This evaluation board provides the user with a simple and quick solution to evaluate digital potentiometers from
Analog Devices. Only one digital pot can be placed on the board at a time. For the user’s convenience, a general
purpose opamp, 2.5V voltage reference, and two power MOSFETs are included and can be configured in a variety of
flexible configurations. The digital pot can be used by itself or in conjunction with these other components.
How to Get Started
1. Click on the Install Software link in the Digital POT CD browser or setup.exe if you don’t have the CD browser.
2. Configure board to your liking(refer to “Configuring Other Components” on page 4 for more details). A two
channel opamp(AD822B), 2.5V reference(ADR03), and two power mosfets(FDV301N) are provided for your
convenience. If you would simply like to evaluate the digital pot, then ignore Step 2 and proceed to Step 3.
3. Apply a separate power supply or use power from the parallel port(refer to “Powering the AD5162” on page 4 to
avoid damaging the part).
4. Connect board to parallel port with provided parallel cable.
5. Open the AD5162 Rev A program from the Windows Start – Program. Move scroll bar to program resistance
settings. The operation is self-explanatory.
Figure 2. AD5162 Software Graphic al Interface
Rev B 11/03/03
2
256-Position SPI Compatible
Dual Digital Potentiometer
Evaluation Board User Manual
AD5162
12
VDD
B1
A1
W1
SDO
A1
W1
B1
VDD
SHDN
CLK/SCL
SDI/SDA
A2
W2
B2
VL
VSS
DGND
VDD
CS/AD0
SDO
A1
W1
B1
VDD
SHDN
CLK/SCL
SDI/SDA
A2
W2
B2
NC/O2
VSS
DGND
RES/AD1
CS/AD0
4 5
6
7
8
3
5
7
8
9
10
6
4 5
6
7
8
3 4
5
6
7
8
9
10
6
7
8
9
10
6
B3
A3
W3
VDD
DIS
DGND
VL
SDI/SDA
CLK/SCL CS/AD0
RES/AD1
SHDN
B2
SDO
NC/O2
VSS
W4
A4
B4
W2
A2
W1
VDD
DGND
CLK/SCL
A1
B1
CS/AD0
SDI/SDA
A1
B1
CS/AD0
SDO
SDI/SDA
W1
VDD
DIS
DGND
CLK/SCL
W1
VDD
DGND
CLK/SCL
A1
B1
CS/AD0
SDI/SDA
W1
B2
CS/AD0
SDI/SDA
CLK/SCL
B1
A1
W2
DGND
VDD
W1
B2
A2
SDI/SDA
CLK/SCL
B1
A1
W2
DGND
VDD
VDD
DGND
CLK/SCL
A1
W1
SDI/SDA
VDD
3 4
5
6VDD
DGND
CLK/SCL
B1
W1
SDI/SDA
W1 W2
SDO
A1
W1
B1
VDD
SHDN
CLK/SCL
SDI/SDA
A2
W2
B2
VL
VSS
DGND
RES/AD1
CS/AD0
2
7
8
9
10
6
B1
CS/AD0
W2
DGND
VDD
W1
B2
RES/AD1
SDI/SDA
CLK/SCL
VDD
OUT1
-I N1
V- +IN2
-I N2
OUT2
V+
+IN1
B2
W1
A2
B2
W1
1 2 3 45
5
4321
D
C
B
A
B1
1
A1
2
W1
3
B3
4
A3
5
W3
6
VDD
7
GND
8
VSS
18
W4
19
A4
20
B4
21
W2
22
A2
23
B2
24
NC/O2
17
DIS
9
SDO/O1
16
SHDN
15
RESB/AD1
14
CS/AD0
13
VLOGIC
10
SDI/SDA
11
CLK/SCL
U1
AD5263
R13
10k
R12
10k
C1
10u
VDD
W1
B1
W2
A2
B2
JP4
AGND
A1
C2
0.1u
JP5
Temp
1
Vout
4
Trim
5
GND
2
Vin
3
U12
ADR03
C3
0.1u
SDO
1
CS
9
A1
2
A2
16
W1
3
W2
15
B1
4
B2
14
VDD
5
VL
13
SHDN
6
VSS
12
CLK
7
GND
11
SDI
8
PR
10
U3
AD5 26 2
O1
1
A1
2
W1
3
B1
4
VDD
5
SHDN
6
SCL
7
SDA
8
AD1
10
GND
11
VSS
12
O2
13
B2
14
W2
15
A2
16
AD0
9
U4
AD5 24 2
W
1
VDD
2
GND
3
CLK SDI
CS
B
A
U7
AD5160
A
1
B
2
CS/AD0
SDO/NC
4
SDI/SDA
GND
SPI/I2C
VDD
W
CLK/SCL
U9
AD5161
W
1
VDD
2
GND
3
SCL SDA
AD0
B
A
U8
AD5 24 5
VDD
1
GND
2
SCL SDA
W
A
U5
AD5 24 7
B1
1
A1
2
W2
3
GND
4
VDD
5
SDA
SCL
U1 0
AD5 24 3
B1
1
A1
2
W2
3
GND
4
VDD
5
SDI
CS
B2
W1
CLK
U11
AD5 16 2
CS/AD0
CLK/SCL
SDI/SDA
RES/AD1
C5
0.1u
C6
0.1u
C7
0.1u
C8
0.1u
C9
0.1u
C10
0.1u
C11
0.1u
C12
0.1u
C13
0.1u
C14
0.1u
C4
0.1u
VDD
1
GND
2
SCL SDA
W
B
U6
AD5 24 6
R11
10k
DIS
JP2
JP3
C16
0.1u
C17
10u
VSS
W4
A4
B4B3
A3
W3
Q1
FDV301
JP14
Q2
FDV301
JP15
D1 D2
CP16 CP18
O2
DGND
DGNDPAD
R15
10k
R14
10k
VREF
CP15 CP17
1
14
2
15
3
16
4
17
5
18
6
19
7
20
8
21
9
22
10
23
11
24
12
25
13
J1
DB2 5
R1
220
R6
100
R3
100
R4
100
R5
100
R2
220
R7
100
SHDN
R8
100
R10
10k
SDO/O1
R16
10k
JP1
R9
470
O1
1
A1
2
W1
3
B1
4
VDD
5
SHDN
6
SCL
7
SDA
8
AD1
10
GND
11
VSS
12
VL
13
B2
14
W2
15
A2
16
AD0
9
U2
AD5282
B1
1
AD0
W2
3
GND
4
VDD
5
SDA
AD1
SCL
U1 4
AD5 24 8
C15
0.1u
OUT1
1
-I N1
2
+IN1
3
V-
4
+IN2
5
-IN2
6
OUT2
7
V+
8
U3 A
U3 B
U13
AD822
FDV301N Power FETs
AD822 Dual Opamp
ADR03 2.5V Reference
Figure 3. Evaluation Board Schematic
Rev B 11/03/03
3
256-Position SPI Compatible
Dual Digital Potentiometer
Evaluation Board User Manual
AD5162
JP12
JP13
Vin2
CP9 CP11
CP8 CP10
CP13 CP14
CP12
6
7
U3B
JP10
JP11
JP8
JP9
C20
0.1u
C21
10u
JP7
JP6
C18
0.1u
C19
10u
VCC
VEE
Vin1
2
1
48
U3A
CP2 CP4
CP1 CP3
CP6 CP7
CP5
5
+IN2
-IN2
OUT2
3
VDD
V+
OUT1
-IN1
+IN1
V-
O
p
am
p
confi
g
uration
Figure 4. Detailed Opamp Connections
Powering the AD5162: Two Options for Powering
I. Using the power from the parallel port as VDD
Simply connect JP1.
The voltage level will be whatever your parallel port operates at.
II. Using a separate supply
DO NOT connect JP1.
Connect voltage supply power and ground to the VDD and GND pads on the board.
Configuring other Components
Two Channel Opamp - AD822
Positive Supply
To use the same VDD as the AD5162, connect JP6.
To use a separate positive supply, connect JP7 and apply positive supply(no more than +15V) to the VCC
pad.
Negative Supply
To use GND, simply connect JP8.
To use a negative supply, connect JP9 and apply negative supply to VEE pad.
For more details on connecters and jumpers around the opamp, refer to Figure 4.
Rev B 11/03/03
4
256-Position SPI Compatible
Dual Digital Potentiometer
Evaluation Board User Manual
AD5162
2.5V Voltage Reference – ADR03
By connecting JP5, the voltage reference is connected to the A-terminal of channel-1 of the AD5162. You don’t need
to worry about applying VDD because it is hardwired from the same source that is powering the AD5162.
Power Mosfets – FDV301N
Q1
By connecting JP14, the wiper of channel-1 is connected to the gate of Q1. CP15 can be used to place a resistor
between the drain and pad D1. CP16 can be used to place a degenerative resistor between the source and GND.
Q2
By connecting JP15, the wiper of channel-2 is connected to the gate of Q2. CP17 can be used to place a resistor
between the drain and pad D2. CP18 can be used to place a degenerative resistor between the source and GND.
Rev B 11/03/03
5
256-Position SPI Compatible
Dual Digital Potentiometer
Evaluation Board User Manual
AD5162
AD5162 Parallel Port Connection (Information for Visual Basic Program Developers Only)
SHDN VDD DIS RES/AD1 CLK/SCL
CS/AD0
SDI/SDA
SDO/O1
DGND
SDA_Read
http://www.doc.ic.ac.uk/~ih/doc/par/
8 output pins accessed via the DATA Port portID = Val("&H" + "378") [378h = 888]
5 input pins (one inverted) accessed via the STATUS Port portID = Val("&H" + "379") [379h = 889]
4 output pins (three inverted) accessed via the CONTROL Port portID = Val("&H" + "37A") [37Ah = 890]
The remaining 8 pins are grounded
TIMING DEFINATION IN VISUAL BASIC SOURCE CODE cmdRUN
N
o Activity Latch Data
Send out
BIT_TOGO=0
Decimal Code
bit 0
(
Pin 2
)
bit 1
(
Pin 3
)
bit 2
(
Pin 4
)
Binary Code
1100 1001 1011 1000 1010 1100
12 9 11 8 10 12
SDI
CLK
/CS
Rev B 11/03/03
6
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Analog Devices AD5162 User manual

Type
User manual

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