AMS AS3510 User guide

Brand: AMS

Model: AS3510

Type: User guide

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austriamicrosystems AG Helmut Theiler

Confidential AS3510 DEMO-KIT Documentation Rev NC Sept. 29, 2003

- page 1 / 10 -

Docu to austriamicrosystems Demo-Kit for

Audio Analog Frontend ASSP

AS3510

he Demo-Kit for austriamicrosystems AS3510 Audio Frontend ASSP consistes of:

• AS3510 Demo-Board

• I2S source utility board with MMC and connector to the Demo-Board

• PC interface cable to contol the AS3510 via LPT port

• CD with Demo-Software for Windows XP

This documentation describes how to start with this demo-kit and how to use the Demo-Board interfaces to

develop and verify the connection to the uP you like to attach to the AS3510.

1. AS3510 Demo-Board

The Demo-Board has the AS3510 in BGA49 package in the middle.

The Power Management circuitry is placed on the left side.

All Audio relevant circuit is placed in the upper right corner.

USB interface connection is placed in the lower right corner of the PCB.

I2S (audio data) interface, 2 wire control interface and START-Button is on the lower side.

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austriamicrosystems AG Helmut Theiler

Confidential AS3510 DEMO-KIT Documentation Rev NC Sept. 29, 2003

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2. AS3510 Main Functions

The AS3510 is an highly integrated ASSP with just few external components needed for:

• Audio Playback from a digital audio source (I2S) to Stereo Speaker/Headphones

• AUX inputs to the Speaker/Headphone Amplifier (e.g. FM-radio)

• Microphone Amplifier with Analog/Digital Converter for Record Function

• DCDC StepUp converter for single cell supply

• Direct Supply with voltages up to 5.5V

• 3 voltage regulators for -analog, -uP_core and –uP_peripheral supply

• USB 1.1 interface circuit as link from uP to the USB connector

• 2 wire control interface for Gain-Setting and other control functions (I2C comp.)

3. Simple Playback Demo

As a first and very simple demonstartion of the playback function, you may connect the I2S

source Utility Board with MMC to the AS3510 Demo Board, plug Stereo Speakers or

Headphones to the Demo Board, mount a battery and simply press the ON_SW button.

The green LED of the I2S Utility board will blink and playback of MP3 files from MMC will start.

. Connect Headphones or Stereo Speakers

. Connect

I2S-Source

Utility Board

with MMC

. Mount a battery

. Press ON_SW Button

. Green LED will start blinking

(If red LED is fast blinking, no MMC card is inserted.)

. You can control Playback Mode with the 5 keys:

Play/Pause/OFF

(Pressing for short time will toggle Play/Pause)

(Pressing for lomg time will turn OFF the system)

REW, FWD to step to next or previouse track

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Confidential AS3510 DEMO-KIT Documentation Rev NC Sept. 29, 2003

- page 3 / 10 -

4. Demonstation with PC interface

With the Demo Software you got with the Demo Kit, you can control all available setting

registers and monitor some signalling functions.

The CD includes the following files:

• VIOLINO4_B.exe

• ViolinoALL.bmp

• zlportio.sys

You can start the VIOLINO4_B.exe from CD or you can copy all files to your local disk.

It is important to have the exe file started from the same directory,where all 3 files are placed

and that this is not a network drive but a local drive.

When starting the “VIOLINO4_B.exe” file, you will get this window, where you have to select

the LPT-port you have connected the Demp-Kit PC intreface cable to.

Then press Continue.

After that you will get a 2

window, which is shown on the next page.

This window has 4 different fields:

• 1

field: A block diagram of the AS3510 gives you an overview of the functions

but also a link where the 4*8 control bits will take action. In the dark blue fields of

the block diagram show where the control bits are attached to.

(example: PwrUpHld bit is attached to the PowerManagement Block. If this Hold-

bit gets cleared, the whole system is set to power down mode.)

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Confidential AS3510 DEMO-KIT Documentation Rev NC Sept. 29, 2003

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• The 2

field “Signalling“ shows if the system is turned ON or OFF, if I2S audio

data is appied to the AS3510 and if a USB-port is connected.

• In the 3

field you can do control function in each blue shaded area:

Audio-Source: With this button you can toggle DAC_output / AUX-signal as

input to the power amplifier

Microphone-Path: With the upper button the Mic-Amp, ADC can be turned ON/OFF

With the lower button the Mic-Loop can be enabled which feeds

the ADC signal of the Mic_Amp into the DAC input

(this is mainly a test function)

DAC_TestTone: With these two buttons you can choose sine-wave signals with 4

different frequency and 4 different amplitude levels.

USB_Mode: With this button the differential receiver of the USB interface gets

activated or suspended.

PMU-Mode: With this butten you can turn the system OFF.

AMP: In this field you have two buttons for volume control,

a mute button

and a button to turn the Amplifier OFF

• The 4

field “Register 0,1,2,3“ shows the real status of the control bits. By

clicking the bits you can set and reset these bits. By actions in the 3

field, the

modification of according bits can be monitored in this field.

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Confidential AS3510 DEMO-KIT Documentation Rev NC Sept. 29, 2003

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5. Contol Bit Description

Bit(s) Val.@

PowUp

Description

AudioAmpGain<3:0> 0h AudioAmp power down with bits set to 0

“LLLL”;

AudioAmpGain_Minimum with bits set to 1

“LLLH”;

AudioAmpGain_Max. with bits set to F

“HHHH”;

Detailed GainStep Table see chapter 1.3 of Device Spec;

HeadPh 0h With this bit set, just ¼ of the driver stage of the AudioAmp is used.

This bit can be set with Speaker/Headphone loads >=16ohm to reduce

power consuption. With Rload<16ohm this bit has to stay cleared.

DACPD, DACON 0h With default mode (both bits “L”) the chip is in an automactic mode

for PowerDown State of the DAC. When there is a LRCK signal with

reasonable frequency detected, the DACPD-Pin gets forced “L” by

weak pull down function and the DAC is active.

With no reasonable LRCK frequency, the DACPD_pin gets forced “H”

by weak pull up function and the DAC is inactive. This LRCK-

WatchDog decition can be overwritten by forcing the DACPD-Pin

from extern.

With DACPD=”H” or AudioAmpGain<3:0> = 0

or AUXen=”H” and

DACON=”L”, the DAC is set inactive regardless of LRCK-WatchDog

or DACPD_Pin state.

With DACON=”H”, the DAC is set active regardless of

LRCK_WatchDog, state of DACPD_Pin, DACPD-bit, AUXen bit and

AudioAmpGain-bits.

DITH 1h With this bit set, the dither function of the DAC block gets disabled.

There was no mode discovered where the dither gives any

disadvantage. So it iis recommended to leave this bit set.

MicGain<1:0> 0h There are 3 GainLevels inplemented in the Mic-Amplifier Stage.

MicAmp Min. Gain with bits set to 0

“LL”;

MicAmp Max. Gain with bit set to 2

“HL”;

Bits set to 3

“HH” is equivalent to Mic_Amp Max. Gain 2

;

ADCen 0h This bit enables the MicAmpl and the ADC block;

AUXen 0h With this bit set, the DAC-signals, which are default input to the

AudioAmp gets disabled and the AUX-input signals are used.

PwUpHld 1h This bit is set after power-up. The power management blocks, which

are DCDC and LDO1-3 get disabled when this bit gets cleared.

USBsdN 0h The USB-suspend bit is active L and after power up cleared. This sets

the USB block into suspend mode by default. By setting this bit, the

USB block will wake up if there is UVDD available.

Fadc2 0h With Fadc2=”L”, the ADC sampling rate is ¼ of the DAC sampling

rate (with LRCK=32kHz the ADC gives 8kSps);

When LRCK=16kHz or less, the Fadc2 bit should be set to change the

ADC/DAC sampling rates to ½. With this bit set for LRCK>16kHz,

the performance of the ADC cannot be guaranteed.

SDOI 0h This bit sets an on-chip loop of SDO data from ADC to SDI input of

DAC. This allows functional testing of MicAmp, ADC, DAC and

AudioAmp as one chain.

Mclk# 1h In chapter 1.3 it is decribed, that the LRCK and SCLK clocks of the

I2S interface must not change state at MCLK rising edge. Such a

timing constillation could give a misinterpretation of the I2S signals

and lead to a temporary OFF mode of the DAC block. If the I2S signals

are generated to have LRCK and SCLK clocks changing state at

MCLK rising edge, the MCLK# bit has to be set to invert the MCLK

phase.

TestL TestR 0h With these bits an on-chip test tone generator is activated and the

testtones are fed to DAC left channel with TestL is “H” and to DAC

right channel with TestR is “H” or to both channels with both bits set

to “H”. The testtones are set by writing IDT<3:0> bits as described in

paragraph 9.3. With TestL set to “H” the AudioAmp output signals for

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Confidential AS3510 DEMO-KIT Documentation Rev NC Sept. 29, 2003

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both channels are multiplexed to the AUX-pins to avoid influence of

contact resistance at Audio-Performance tests with Speaker-Loads

connected. A further function of these bits is to change zener-zap

readout bias current for zap verification. TestR reduces the nominal

bias current to 1/3 and TestL increases the readout current to 5 times

the nominal value.

AGCoff 0h The MicAmp has an implemented AGC function to avoid overload of

the ADC. The AGC function of the MicAmp can be turned off by

setting this bit to allow faster testing.

IBdac<1:0> 0h These bits allow a reduction of the bias current and therefore

powerconsumption of the DAC block. For 48kS I2S signal, the

nominal bias Idac=0

is recommended. Idac=1h gives ¾ of nominal

bias; IBdac=2h gives 60% of nominal bias; Idac=3h gives 50% of

nominal bias current; With I2S sampling rates of less than 24kSps, Idac

can be set to 3h;

IBaudio<1:0> 0h These bits allow a reduction of the bias current and therefore

powerconsumption of the AudioAmp block. The THD and SINAD

performance is guaranteed for Iaudioamp=0h;

In applications where powerconsumption is more important than audio-

performance, these bits can get set to other values than 0h with

following effect:

IBaudio=1h gives 83% of nominal bias current;

Ibaudio=2h gives 67% of nominal bias current;

Ibaudio=3h gives 50% of nominal bias current;

I2Sdir 0h The DAC block is designed for 18 bit audio data. If audio data with

less than 18 bit is applied to the I2S interface, the DAC block refuses

the convertion. For this reason a I2S preprocessing block is

implemented to accept lower number of audio data bits. This block can

be bypassed by setting the I2Sdir bit. It is recommended to leave this

bit set.

T0dcdc 0h This bit is used to verify the current limiter function of the DCDC

block. For normal operation, this bit has to be left cleared.

T1dcdc 0h This bit reduces the on_chip generated DCDC clock to 1/3. For normal

operation, this bit has to be left cleared.

ZRes 0h The Zres bit is used for testing the correctness of reference trimming.

With TestL and TestR the Zap readout current can be modified. With a

Zres pulse a Zap readout can be initiated to verify readout by modified

bias current.

IDT<3:0> 4h Reading these bits after power up gives revision infoermation of the

circuit.

In TestMode (TestL or TestR set) the bits can be written for definition

of generated DAC testtones as described in chapter 9.3 of Device Spec.

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Confidential AS3510 DEMO-KIT Documentation Rev NC Sept. 29, 2003

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6. Demo Board Connectors

1. Power Supply

Power supply can be provided by:

• Inserting a AAA battery (please make sure, that no power supply is connected to VBAT at the same time)

•

Applying VBAT by power supply 1.0V > VBAT > 3.0V (please make sure no battery is inserted)

Note: It is important for DCDC start up to have a low ohmic supply to VBAT. An Amp-Meter in series with

the supply may give problems for start up.

• Applying BVDD by power supply or accu 3.2V > BVDD > 5.5V

After ON_SW gets pressed, DCDC Step Up and Voltage regulators get turned on. In case

BVDD is applied, the DCDC converter is OFF or in skip mode.

Power Supply

VBAT (1..3V)

GND

VDD (3.2 …5.5V)

Stereo Speaker

r Headphone

Stereo

AUX

Input

MIC

Input

USB 1.1

USB

Interface

ON_SW

Power Up Button

I2C_IF

Control Interface to PC

I2S_IF

Audio Data Interface

PVDD

prog.

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Confidential AS3510 DEMO-KIT Documentation Rev NC Sept. 29, 2003

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The following regulated voltages are available:

• AVDD … 2.9V supply for analog blocks

• DVDD … 2.9V supply for digital blocks (uP periphery)

• PVDD … hardware programmable to 1.5V, 1.75V, 2.0V, 2.25V, 2.5V

Programming is done by Jumper PVDD_prog

2. I2S_Interface

Actually this 10 pin connector includes I2S and I2C signals with the following pin order:

Pin_2

DVDD

(2.9V regulated

supply for uP)

Pin_4

SDI

(serial audio

data input)

Pin_6

LRCK

(left/rigth clock

input)

Pin_8

MCLK

(master clock

input 128*LRCK)

Pin_10

CSDA

(2 wire interface

serial data)

Pin_1

PVDD

(regulated

supply for uP)

Pin_3

SDO

(serial audio

data output)

Pin_5

SCLK

(shift clock input)

Pin_7

GND

Pin_9

CSCL

(2 wire interface

shift clock)

I2S has to be applied with following format:

Note: If MCLK is not provided to the AS3510, an on chip PLL is generating this clock signal

for LRCK rates from 20kHz to 50kHz.

3. I2C_Interface

The I2C interface is a 6 pin connector with the following pin order:

Pin_2

DVDD

(2.9V regulated

supply for uP)

Pin_4

CSCL

(2 wire interface

shift clock)

Pin_6

CSDA

(2 wire interface

serial data)

Pin_1

DACPD

(I/O to signal/

force DACon/off)

Pin_3

USBon

(output to signal

USB connection)

Pin_5

GND

This is a 2 wire control interface (I2C compatible) in slave mode, to have access to 4 byte of 8 bit setting

information. The I2C address is: Adr_Group8 Adr.:8Ah_write, 8Bh_read (audiprocessor)

(The I2C-adr and default settings are metal programmable)

Byte-0 (def:80h) DITH DacON DacPD HeadPh AudioAmpGain(3:0)

Byte-1(def:10h) SDOI Fadc2 USBsdN PwUphld AUXen ADCen MicGain(1:0)

Byte-2 (def:01h) IBaudio(1:0) IBdac(1:0) AGCoff TestR TestL Mclk#

Byte-3 (def:40h) IDT_3 IDT_2 IDT_1 IDT_0 Zres T1dcdc T0dcdc I2Sdir

15 0

17 2 01

15 0

17 2 01

MCLK

LRCK

SCLK

SDATA(16)

SDATA(18)

64 MCLK cycles 64 MCLK cycles

Right Channel

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Confidential AS3510 DEMO-KIT Documentation Rev NC Sept. 29, 2003

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4. ON_SW

With the ON_SW button, the system gets powered up.

Power down can be reached by clearing the control bit PwUpHld.

If, due to low battery, the BVDD voltage drops to values lower than 2.7V, the AS3510 does a

self power down to protect the uP for uncontrolled function.

5. Stereo AUX Input

Analog inputs for AUX source with RIN>24kohm and Vmax=BVDD/2 (in case of DCDC supply

BVDD is 3.2V).

6. MIC Input

Differential mono microphone input with phantom supply.

The Microphone Amplifier has differential input programmable gain and AGC function to avoid

clipping. The Microphone ADC path is disabled after start-up. To enable the ADCen bit has to

be set in the I2C registers. There are 3 gain settings available for the MIC-amplifier shown in

the table below. The Mic-amplifier has an implemented AGC function which avoids clipping for

the dynamic shown below:

MicGain(1:0) MicAmp-Gain MicInput FS AGC Range

0 28dB 49.2mVp 34.7mV - 1.2Vp

1 34dB 24.6mVp 17.4mV - 0.8Vp

2 40dB 12.3mVp 8.7mV - 0.4Vp

The sampling rate of the ADC path is ¼ of the DAC rate or LRCK frequency. The data

presented at SDO which is the ADC output data synchronized to the DAC LRCK and SCLK,

are the same for left and right channel and for 4 consecutive samples. If the DAC is operating

with low sample rate like 22kHz or lower, the ratio between DAC and ADC sampling can be

changed from ¼ to ½ by setting the FADC2 bit in the I2C register.

7. Stereo Speaker or Headphone Output

The power amplifier output has the capability to give 2*0.5W output power to 4ohm speakers.

To save power for 16 or 32ohm headphone devices, the output stage can be reduced to ¼ by

the bit ”HeadPh” in Register 0h. There is a further posibility to reduce power consumption for

16 or 32 ohm devices by setting bits Ibaudio as discribed in the bit description table.

The Gain bits in register 0h give 15 levels of audio volume as listed below:

Gain

(3:0)

Gain

difÎse

Swing

AUX

Gain

(3:0)

Gain

DifÎse

Swing

AUX

Gain

H H H +3dB 4.8Vpp +2.6dB L H H H -21dB 300mVpp -23.0dB

H H L 0dB 3.4Vpp -1.0dB L H H L -24dB 212mVpp -26.0dB

H L H -3dB 2.4Vpp -4.3dB L H L H -27dB 150mVpp -29.0dB

H L L -6dB 1.7Vpp -7.6dB L H L L -30dB 106mVpp -32.0dB

L H H -9dB 1.2Vpp -10.8dB L L H H -32.9dB 75mVpp -34.9dB

L H L -12dB 0.85Vpp -13.9dB L L H L -35.8dB 53mVpp -37.8dB

L L H -15dB 0.60Vpp -17.0dB L L L H -38.6dB 37mVpp -40.6dB

L L L -18dB 0.42Vpp -20.0dB L L L L OFF - -

Note: During plug-in or plug-off of the Headphone jack, a short-circuit may occur simply by the

mechanic of the connector. For Systems where headphones are used, series resistors to the

heakphone jack should be mounted to prevent from system power down due to this short-

circuit.

ams AG

Technical content still valid

austriamicrosystems AG Helmut Theiler

Confidential AS3510 DEMO-KIT Documentation Rev NC Sept. 29, 2003

- page 10 / 10 -

AS3510 Demo Board Circuit Diagram

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AMS AS3510 User guide

AMS AS3510 User guide

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