Sanyo FC3G2 Training manual

1

Training Manual FC3G2 Chassis

FILE NO.

COLOUR TELEVISION

TRAINING MANUAL

Chassis Series FC3G2

CIRCUIT DESCRIPTION

BLOCK DIAGRAM OF ICs

TROUBLE SHOOTING

REFERENCE NO

.

XXXXXX

2

Training Manual FC3G2 Chassis

Table of Contents

Part 1 Chassis Description ..................................................................................... 3

1. Chassis Summary ....................................................................................................... 3

2. CPU (System Control)................................................................................................. 4

2-1 A-D Key Identification Circuit. ..................................................................................... 8

2-2 Memory Option ......................................................................................................... 10

2-3 Power / stand-by circuit............................................................................................. 13

2-4 Protection circuit........................................................................................................ 13

2-5 AFT............................................................................................................................ 14

2-6 Horizontal/Vertical pulse input................................................................................... 18

2-7 Service mode ............................................................................................................ 19

3. IF /Video/Chroma/Deflection .................................................................................... 22

3-1 IF stage...................................................................................................................... 22

3-2 Video/Chroma stage.................................................................................................. 22

3-3 Deflection stage......................................................................................................... 22

4. Audio Output.............................................................................................................. 23

5. Vertical........................................................................................................................ 24

6. Horizontal .................................................................................................................. 24

7. Power Consumption Saving Circuit. ....................................................................... 25

Part 2 Block Diagram of ICs

................................................................................. 28

1. LA76818A (IF/VIDEO/CHROMA/DEFLECTION)....................................................... 28

2. LA78040N (VERTICAL OUTPUT).............................................................................. 30

3. AN17820B (AUDIO OUTPUT).................................................................................... 30

4. LA7642NM (SECAM DECODER)............................................................................... 31

5. 24LC16B/P (IC MEMORY) ......................................................................................... 31

Part 3 Trouble shooting Chart

............................................................................. 32

Trouble Shooting Chart Startpoint symptom: Dead .............................................. 33

Trouble Shooting Chart Starpoint symptom: No picture-no sound ....................... 36

Trouble Shooting Chart Starpoint symptom: No picture-sound OK ...................... 38

Trouble Shooting Chart Starpoint symptom: No sound-picture OK ...................... 39

Trouble Shooting Chart Starpoint symptom: No color & color NG........................ 40

Trouble Shooting Chart Startpoint symptom: No vertical deflection ..................... 41

Trouble Shooting Chart Startpoint symptom: No on-screen display..................... 42

Short – Open Test Report ............................................................................................... 43

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Training Manual FC3G2 Chassis

Part 1 Chassis Description

1. Chassis Summary

The following figure shows a basic block diagram of the FC3G2 chassis. This

chassis is constructed by the folowing ICs :

AN17820B, IC001, for the audio output circuit

LA76818A, IC201, for the IF, video, chroma de-modulation and deflection circuit

LA7642NM-TLM-E, IC281, for the SECAM decoder circuit.

NJW1142M, IC3701, for audio processor

LA78041, IC501, for the vertical deflection output circuit

LC863448W-52F1-TLM, IC801, for the CPU (system control unit) of FC3G2

AT24C16A-10PI-2.7, IC802, for the control memory IC.

MM1188XS & TC4053BF-TP1, IC1401 & IC 1501, for video selector.

Figure of FC3G2 block diagram

A1901A

RC

RECEIVER

D1910

LED

FRONT

CONTROL

KEYS

SW1901 ~

SW1906

KEY-IN

POWER

ON-TIMER

RC-IN

S-VIDEO IN (FROM S-TERMINAL)

IC001

AUDIO AMP.

SP902

SP901

R-OUT

L-OUT

12

2

8

6

R

L

REAR

MONITOR

OUT

TERMINAL

REAR

AV1

INPUT

TERMINAL

FRONT

AV2

INPUT

TERMINAL

V

L

R

V

L

R

V

L

R

VIDEO MONITOR OUT

AUDIO MONITOR OUT(LEFT)

AUDIO MONITOR OUT(RIGHT)

AV1 L-IN

AV1 R-IN

AV2 R-IN

AV2 L-IN

AV2 VIDEO IN

AV1 VIDEO IN

S-TERMINAL

C-IN

Y-IN

9

1

6

7

3

8

4

+

AV2/S-INPUT

AV1/AV2

(FROM CPU PIN-25)

C-IN

Y-IN

SDA/SCL

(FROM CPU)

5

26

2

29

3

28

10

21

(L-TV-L)1/30

AUDIO

CONTROL/

SURROUND

IC3701

R-OUT

TV-AUDIO

L-OUT

VIDEO

OUT (TV)

VIDEO-IN

Y-IN

IC201

IF/VIDEO/

CHROMA

11/12

14

15

16

46

42

1

44

5/6

19

20

21

23

27

TV

AUDIO

OUT

INT.VIDEO IN

(C-IN)

VIDEO MONITOR OUT

R-OUT

G-OUT

B-OUT

VERT.OUT

HORIZ.OUT

Q431

H-DRIVE

IC1501

VIDEO SELECTOR

AV IN

TV IN

AV,Y IN

AV-IN

Y-IN

2

1

5

3

13

12

11

9

10

14

4

15

TV/AV (FROM CPU PIN-24)

S-INPUT

28

32

31

12

11

3

4

19

20

21

1/2

24

26

IC801

CPU

IC802

EEPROM

SDA

SCL

OSD R-OUT

OSD G-OUT

OSD B-OUT

SDA/SCL

TV/AV OUT

AV1/AV2 OUT

5

6

SDA/SCL

A101

TUNER

SAW

FILTER

X161

IF IN

T431

H-DRIVE

TRANS.

Q432

H-OUT

1

5

IC501

VERT./DEF.

CRT UNIT

IC701

TRIPLE VIDEO

OUTPUT AMP.

R

G

B

R

G

B

1

2

3

7

8

9

HEATER

L902

DY

HV

T471

FBT

FOCUS

SCREEN

HV

CRT

AV-OUT

Y-OUT

TV/AV OUT

Y-OUT

MONITOR

OUT

POWER SUPPLY CIRCUIT

140V

24V

11V

9V

MAIN SOUND AMP.

HORIZ. DEF.

VERT. DEF.

FBT

TUNER

36V

9V

5V

IC201, AUDIO CTL.

CPU, EEPROM

IC1401

VIDEO

SELECTOR

AV OUT

R-IN

G-IN

B-IN

13/14

PCC

CIRCUIT

Q461-Q462

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Training Manual FC3G2 Chassis

2. CPU (System Control)

The following firgure shows a block diagram of the CPU peripheral circuit. CPU that

use for FC3G2 is AC5G2 CPU.

TERMINAL ASSIGNMENT (AC5G2 CPU)

LC863448W-52F1-TLM (ROM:48Kbytes)

BUS SDAÅÆ 1 P10/SDA0 * P03 36

Å Status input(factory)

V/C IC (Low:factory mode)

BUS SCL Å 2 P11/SCLK0 P02 35

Æ ACK output(factory)

(Low:factory mode)

IIC SDA ÅÆ 3 P12/SDA1 * P01 34

Æ BASS output & Woofer Output

EEPROM

IIC SCL Å 4 P13/SCLK1 P00 33

Æ VIF-M output

(High:NTSC,Low:other)

Vss(GND) Å 5 Vss P17 32

Æ ON timer LED on/off output

(Low:Timer on)

CPU OSC input Æ 6 XT1 P16/PWM3 31

Æ Power on/off output

(X’tal 32.768KHz) (High:on)

CPU OSC output Æ 7 XT2 P15/PWM2 30

Æ Volume PWM output

VDD(+5V) Æ 8 VDD P14/PWM1 29

Æ Sound Mute output

(High:Mute ON)

SECAM Killer Input Æ 9 P04/AN4 P73/INT3 28

Å remote control signal input

AFT signal input Æ 10 P05/AN5 P72/INT2 27

Å Power failure input

S-Video input (Low: S-in) Æ 11 P06/AN6 * P71/INT1 26 Æ TV/AV1/AV2/AV3

option output

panel key input Æ 12 P07/AN7 P70/INT0 25 Æ 50/60 output (Low:60Hz)

(PAL:50Hz, NTSC:60Hz)

RESET input Æ 13 RESET P32 24 Æ TV/AV1/AV2/AV3

option output

Filter for PLL Å 14 FILT P31 23 Æ L/R or L/L

(Connect to ground through CR)

CV input(no use=open) Æ 15 CVIN BLNK 22 Æ OSD Blanking signal output

Bilingual output Å 16 P30 B 21 Æ OSD Blue signal output

(Low:S-1,High:S-2)

V-sync signal input Æ 17 VS G 20 Æ OSD Green signal output

H-sync signal input Æ 18 HS R 19 Æ OSD Red signal output

NOTE : * N-ch.open drain output (Vout max.+5V)

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Training Manual FC3G2 Chassis

The following table shows pin description of CPU.

Port Description Table

PIN Port

Name

Use

I/O

Output

Structure

Input

p-up R

Reset

Notes

1 SDA0 IIC DATA I/O Nch-OD No Hz BUS IC

2 SCL0 IIC CLOCK O Nch-OD No Hz BUS IC

3 SDA1 BUS DATA I/O Nch-OD No Hz EEPROM

4 SCL1 BUS CLOCK O Nch-OD No Hz EEPROM

5 VSS GND - -

6 XT1 X’tal input I - - 32.768KHz

7 XT2 X’tal output O - -

8 VDD +5V I - -

9 AN4 SECAM Killer input I Nch-OD No - High: SECAM

10 AN5 AFT IN I - No - AFT signal

11 AN6 S-Terminal input I Nch-OD No - Low: S-In

12 AN7 Panel keys input I - No - Panel keys

13 RES RESET I - - Reset:Low

14 FILT FILTER for PLL O - -

15 CVIN CV input I - - (Composite Video)

16 P30 Bilingual output O - yes -

17 VS V-sync signal input I - - Active Low

18 HS H-sync signal input I - - Active Low

19 R OSD Red output O C-MOS L Active High

20 G OSD Green output O C-MOS L Active High

21 B OSD Blue output O C-MOS L Active High

22 BLNK OSD Blanking output O C-MOS L Active High

23 P31 L/R or L/L output O C-MOS Hz Low:L/R

24 P32 TV/AV123 output O C-MOS yes Hz Option TV/AV1/AV2/AV3

25 P70 50/60Hz output O C-MOS No Hz Low:60Hz

26 P71 TV/AV123 output O C-MOS No Hz Option TV/AV1/AV2/AV3

27 P72 Power failure input I Nch-OD No Hz Low:fail

28 P73 Remotecontrol signal I Nch-OD No Hz Active High

29 P14 Sound Mute output O C-MOS No Hz High:Mute on

30 PWM2 Volume PWM output O C-MOS No Hz

31 P16 Power on/off output O C-MOS No Hz High:Power on

32 P17 On timer LED output O C-MOS No Hz Low:timer on

33 P00 VIF-M O C-MOS No Hz High:NTSC

34 P01 Bass expander I/O Nch-OD No Hz High:BASS on

35 P02 ACK O C-MOS No Hz Factory:Low

36 P03 Status input I Nch-OD No Hz Factory:Low

Note : Hz = High impedance

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Training Manual FC3G2 Chassis

≪CPU Specification outline≫

This tuning system is equipped with the F/S tuning system for AC5G2 chassis. It has the

following specification.

(1) Monaural, Simple AV Stereo & AV stereo Function

(2) Maximum 256 Positions. Optional 100 or 256 Position (E



PROM : 16k bit for 256

Pos)

① The direct tuning function can be work by pressing “[0]~[9] key” and “[-/--] key”

② The sequential tuning function can be work by pressing [POS -] and [POS +]

key

③ The alternate tuning function can be work by [Alt] key

(3) PRESET function [Automatic Tuning/Semi-Auto Tuning/Manual Tuning]

Plug & Play function

(4) Channel Swap function & Channel Skip function

(5) Bilingual system

(6) Option system

A. Memory options

① Color system selection : Five kinds

② Sif system selection : Six kinds

③ AV input option : AV only or AV1/AV2 or AV1/AV2/AV3

④ BASS EXPANDER selection : with or without

⑤ SURROUND selection : with or without

B. Special function (Dealer) options

① Tuning Lock : on or off

② Volume Lock : on or off

③ AV start : on or off

④ Music mode : on or off

(7) Digital AFT (Auto Fine Tuning) function

(8) Front controls

◦ [Volume Up] / [Volume Down]

◦ [Programme Up] / [Programme Down]

◦ [TV/AV] Selector

(9) OSD is a multi-color display (the R/G/B output).

(10) OFF timer function（30/60/90/120 minutes）

(11) ON timer function (10 minutes ~ 24 hours)

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Training Manual FC3G2 Chassis

(12) Auto shut off timer function (10 minute)

(13) FACTORY KEY(R/C DATA code “80h”~ “DFh”)

(14) Service mode (Adjustment of bus data : one chip and audio IC etc.)

(15) PWR Error Detection Function

(16) I

2

C bus correspondence (One chip : LA76818)

(17) EEPROM (8k bit for 100 position, 16k bit for 256 position)

(18) GAME (Air Tennis)

(19) Six Language OSD

① English

② Thai

③ Arabic

④ Russian

⑤ French

⑥ Bahasa Indonesia

(20) White Tone user adjustable

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Training Manual FC3G2 Chassis

2-1 A-D Key Identification Circuit.

The key identification circuit used in this chassis uses a switched resistive ladder

network in a A-D conversion circuit to generate and send a voltage to the CPU when a

key pressed. The CPU uses this voltage to determine which key was pressed. This

resistive circuit eliminates the need for encoder/decoder devices, simplifying design

and adding to the reliability of the TV.

The table shows the voltage input to CPU pin 12, when a given key pressed.

Front Control Key Input

1) Action

Front panel SW is decied by the input voltage of A/D port (12pin).

2) Circuit

* S-terminal-less model key port 12PIN

* S-terminal model key port (12PIN)

R12K

R5.6K

R3.9K

R2.2K

R1.8K

R1.0K

R10K

CPU 12 PIN

KEY SW INPUT

5V

K1

K2

K3

K4

K5

K6

K1

K2

K3

K4

K5

R12K

R5.5K

R3.9K

R2.2K

R1.8K

R1.0K

R10K

CPU 12 PIN

KEY SW INPUT

5V

K6

R27K

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Training Manual FC3G2 Chassis

* Key Table

Key VOL. Range(Vcc ratio) (V)

ΣR

FUNCTION

K6

109/128Vcc ≦ K6 ＜ 127/128Vcc 4.26～ Vcc

1.0K TV/AV

K5

93/128Vcc ≦ K5 ＜ 109/128Vcc 3.63～4.26

2.8K MENU

K4

77/128Vcc ≦ K4 ＜ 93/128Vcc 3.01～3.63

5.0K VOLUME -

K3

61/128Vcc ≦ K3 ＜ 77/128Vcc 2.38～3.01

8.9K VOLUME +

K2

45/128Vcc ≦ K2 ＜ 61/128Vcc 1.76～2.38

14.5K POSITION -

K1

29/128Vcc ≦ K1 ＜ 45/128Vcc 1.13～1.76

26.5K POSITION +

OFF 2

13/128Vcc ≦ OFF＜ 29/128Vcc 0.51～1.13

53.5K OFF (S-Available)

OFF 1

OFF ＜ 13/128Vcc ＜0.51

OPEN OFF (S-N/A)

* Mechanism SW is used for K1-7.

3. Action

* The Key scan will be performed every 20 msec. It judges whether the key was

pressed or not .

* When the Key signal is match within two consecutive time at intervals of 20msec ,

the key is decided.

* The Key scan priority is K6 -> K1.

* The high priority key has pushed, other keys cannot operate

.

4. S-input Option

* The “KEY OFF” voltage distinguishes availability of S-Terminal.

* The “KEY OFF” voltage range is divided into two kinds.

1. When KEY OFF voltage is less than 0.51V, it is decide as an S-terminal-less

model.

2. When KEY OFF voltage is from 0.51 to 1.13V, it is decide as S-terminal model.

* Judgment is always (20 ms) performed. (agrement with two consecutive time

* This option is decided only in KEY OFF. An option does not change when

K1 ～ K6 was inputted.

□Bus data of LA76818

VIDEO

SW

OFF 1

(S term less)

OFF 2

(S term)

Address TV AV TV AV

14H DAO 0 1 1 1

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Training Manual FC3G2 Chassis

2-2 Memory Option

This chassis uses the option function to determine several different specifications of the

TV set. The CPU determines the specification of TV by setting the data of memory

option.

Following table shows the option function of the CPU.

The SERVICE MODE NO From 83 to 96 is EEPROM MEMORY OPTION.

《SERVICE MODE NO 83》

* ”STEREO” OR “MONO” OPTION

Bit OPTION

0 MONO

1 Simple AV Stereo

2,3 AV Stereo

※ AV STEREO : Control by Audio IC (NJW1142)

Simple AV : Control By CPU PWM port

MONO : Control by Volume ATT register of One chip IC.

《SERVICE MODE NO 84》

* VOLUME TABLE 1, 2 SWITCHING

Bit VOL TABLE

1 VOLUME TABLE2

0 VOLUME TABLE1

※ Refer to “volume.doc”.

《SERVICE MODE NO 85》

* MPP FUNCTION option

Bit

1 MPP ON

0 MPP OFF

* M.P.P. function memorize

VOLUME/BRIGHT/CONTRAST/SHARPNESS/TINT for every channel

(1~30 POS).

* Refer to 121Multi_PP_Level.DOC

《SERVICE MODE NO 86》

* TUNER option

Bit

1 Matsushita Tuner

0 ALPS Tuner

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Training Manual FC3G2 Chassis

《SERVICE MODE NO 87》

* AV1, AV2, AV3 Option

Bit

0

TV→AV→TV

1

TV→AV1→AV2→TV

2-3

TV→AV1→AV2→AV3→TV

《SERVICE MODE NO 91》

《Description》

* A color system option is changed by a setup in Service Mode No. 91 OPT COL.

* A color system option is shown below. There are five kinds of color systems.

* COLOR SYSTEM OPTIONS Tabel

SVS

data

OPTION TV AV

0,1 NO SYSTEM (No Display) PAL only same as the TV MODE.

2 VMT SYSTEM (No Display) PAL + NTSC only

AUTO→PAL→NTSC4.43→NTSC

3 CHINA,

INDONESIA

AUTO→PAL→NTSC4.43→NTSC

same as the TV MODE.

4 3 SYSTEM

AUTO→PAL→SECAM→NTSC4.43

same as the TV MODE.

5,6,7

MULTI

SYSTEM

AUTO→PAL→SECAM→NTSC4.43→NTSC

same as the TV MODE.

《The option selection method》

* An option is changed by Service Mode NO. 91 OPT COL.

* The Option check will be carry out on RESET START.

* A judgment is performed only once after RESET START.

《SERVICE MODE NO 92》

《Description》

* A SIF system option is changed by Service Mode.

* A SIF system option is shown below. There are six kinds of SIF systems.

* The bilingual operation differs from the other SIF system option

* SIF SYSTEM OPTIONS

SVS

Data

OPTION BG (5.5M) D/K (6.5M) I (6.0M) M (4.5M)

0,1,7 NO SYSTEM (BG<5.5>)

No display

－－－－－－－－－

2 BILINGUAL SYSTEM

－－－－－－ ○(S-1) ○(S-2)

3 SYSTEM A

○(S-1) ○(S-3) ○(S-2) ○(S-4)

4 SYSTEM B

○(S-1) －－－－－－ ○(S-2)

5 SYSTEM C

○(S-1) ○(S-2) －－－－－－

6 SYSTEM D

○(S-1) ○(S-2)

○(S-3)

※Bilingual specification is displayed as S-1 and S-2. The other modes, each SIF

system name is displayed.

12

Training Manual FC3G2 Chassis

《The option selection method》

* An option is changed by Service Mode Data No.92 OPT SIF

* The voltage is read in a RESET START after operation.

* This judgment operation carry out only a RESET START.

《SERVICE MODE NO 93》

* BASS EXPANDER FUNCTION option

Bit Display

0 No Display

1 “BASS”

2 “BASS EXPANDER”

3 “WOOFER”

* If Bass Exp Option is ‘0’ on MONO and Simple AV mode then there will be No AUDIO

Menu on MAIN Menu

* This function is available only when using Audio Control IC.

* In AV Stereo Mode While BASS EXPANDER ON, AUDIO IC of Bass/Treble DATA is

set as : Bass : +10 dB, Treble : +6 dB

* In MONO & Simple AV Stereo Mode if BASS EXPANDER ON, Pin 34 will be “High”

《SERVICE MODE NO 94》

* SURROUND option

Bit

1 Surround

0 No Surround

《SERVICE MODE NO 95》

* SUB - BASS/TREBLE adjustment of Audio Control IC (NJW1142)

Bit

0 BASS TREBLE Gain –3 db

1 BASS TREBLE Gain 0 db

2,3

BASS TREBLE Gain ＋3 db

* This function available only when using Audio Control IC.

《SERVICE MODE NO 96》

* AGC setting Audio Control IC (NJW1142)

Bit

0 AGC OFF

1 AGC ON Level= 600 Mv

2 AGC ON Level= 500 mV

3 AGC ON Level= 300 mV

* This function available only when using Audio Control IC

13

Training Manual FC3G2 Chassis

2-3 Power On/ Stand-by circuit.

Power on / stand-by

The power on/stand-by signal is output from pin 31 of the CPU.

When the stand-by mode is selected the voltage of pin 31 changes from Hi(5V) to

Low(0V) to turn off Q681and Q652. Q652 turning off causes Q653 and

Q654 to turn off. +24V supply for vertical and horizontal output circuit, +9V supply

for IF/VIDEO/Chroma circuit and +5V for tuner circuit are all cut off, resulting in the

TV set going into the stand-by mode.

When the TV is switched back into the power on mode, Q681 and Q652 are turned

on and the relevant voltage are supplied back to each circuit.

2-4 Protection circuit

This chassis employs two kinds of protection circuit, one controlled by software through

the CPU and the other by hardware.

. Protection circuit (software)

The protection circuit is provided to disable the operation of the TV set in case of a

circuit malfunction. When an abnormality occurs during TV reception it causes pin 31 of

the CPU to go continually Low (less then 0.8V) for about one second. The CPU detects

that circuit malfunction has occurred and cut off the signal output to Q681.

. Protection circuit (hardware)

When a power failure is detected by diodes D655, D690 and D468, this protection circuit

operates causing the power oscillation to stop. If one of above diode is turned on, the

voltage of Q661-emitter decreases, and it turns on completely. Photo-coupler D610 is

driven by this and generates a current which drives Q625 on. As a result, the operation

of the power oscillation circuit is stopped. Under normal circumstances these parts,

D610, Q661, D661, R661, VR661, R662 are operating as the error detection and

regulation circuit for +130V power supply.

Fig. of Power On/Stand by Circuit

Q681

TO HEATER PROTECT

& HOLDDOWN CIRCUIT

TO CPU

TO IC201, IC281

AUDIO PROCESSOR,

AV SWITCH & CRT UNIT

TO VIDEO PROCESSOR,

TUNER & DEFLECTION

Q652

IC681

TO HOR & VER,

DEFLECTION CIRCUIT

TO AUDIO AMP. IC

TO TUNER AND

HOR DEFL. CIRCUIT

TO VERTICAL

DEFL. CIRCUIT

(FOR PROTECTION)

14

Training Manual FC3G2 Chassis

2-5 AFT

* Basic operation of tuning

（Common operation : Direct tuning / Sequential tuning / Alternate tuning）

(1) The tuned-in position is memorized to E2PROM as a last position.

(2) The transient MUTE is performed at the time of tuning. ( direct / alternate tuning.)

(3) A position OSD is displayed for 5 seconds.

(4) Digital AFT operation is performed after 240ms.

* This tuning system is F/S tuning, thus digital AFT is unnecessary in principle at least.

But, AFT is carrying out for the following reasons.

(1)If some hundreds of kHz RF shifts by move etc.,the claim will occur that NICAM

and TEXT do not operate.

(2)The old chassis of F/S tuning system shown below that has the digital AFT

function. F/S tuning system model : EB1/EB3/WB2A/WB2B/AB3A/AB3B.

(3)The V/S tuning system quality standards are satisfied that RF change can be

corrected to ±800kHz.

（In case of the China national standard, it is necessary to receive to ±1MHz.）

D651

C651

R661

R662

Q661

D661

R664

R663

Q654

R656

D664

C665

C664

VR651

R669

C639

R668

L651

L654

L653

L652

D652

C652

C643

C654

R654

R652

R658

R657

R659

IC681

C681

R655

D659

Q681

R682

R681

Q662

R666

R667

Q663

D662

R665

C663

R673

R671

D655

R646

D671

R672

AT3

AUDIO

L-ST

H-ON

PROTECT

D653

Q651

R651

C656

C657

C655

C658

Q652

Q653

R653

JP652

JP653

R660

R645

TP-130

D692

C691

C690

D690

R691

Q690

D691

R690

R693

R692

R694

JP631

JP633

Q693

R695

R696

R697

D693

C693

D654

C653

RU3AM

160EM

220XJ

DJ100K

1/16GJ

3.9KC

AH

MTZJ6.2C:

RD6.2EB3:

DZXLBZA6.2C

1SJ27K

150K

X

2400030

X

2SD1913

(QRA:RRA)

1SJ270

MTZJ10B:

RD10EB2:

DZXLBZA10B

16EM470

16EM220:

16EM220LBWA

R3D6222NJ:

R3D7222NJ

X

2SJ

12

X

2SJ12

J

RN1Z

35EM

470T

25EM

1000T

25EM

3300

15K

33K

X

DJ3.9K

X

BA178M05T:

MC78M05CT:

UPC78M05AHF:

L78M05CV

10EM470

DJ10K

X

AE

1/16GJ

560KC

22K

AC

1/16GJ

22KC

1/16GJ

10KC

AH

MTZJ

6.8A:

DZXLB

ZA6.8A

DJ12K

EM0.22

1/16GJ

560KC

22K

AA

J

AA

12K

FE301-1L43:

RU4YXLF-L1

AD

1K

X

1000KK

470(CRD:NH)

1000KK470

(CRD:NH)

1000KK680

(CRD:NH)

1000KK470

(CRD:NH)

2SB1565E

X

1FJ5.6

X

1/16GZ0C

X

EU1

35EM47

EM2.2

CT

1SS355

1/16GJ

47KC

AH

AA

1/16GJ

47KC

1/16GJ

10KC

1/16GJ

20KC

5.6K

J

X

AD

DJ6.8K

1/16GJ

4.7KC

1/16GJ

47KC

AA

16EM47

YG901C2-LB

PM1

1

23

4

123

15

14

13

12

16

17

7

6

5

4

1

3

2

B1

130V

9V

11V

5VRC

24V

11V

15

Training Manual FC3G2 Chassis

《Digital AFT》

* Digital AFT is substitute of the “hardware AFT” inside a tuner.

In order to set the tuning voltage as the optimal value, center frequency is searched

from the starting frequency

which deducted 1MHZ from the local frequency

memorized by E2PROM.

However, this digital AFT is terminated when rise/down processing of tuning voltage

becomes 100 times.

- LOCAL frequency is controlled by AFT voltage of the following table.

direction AFT Vol.

UP Vol. 3.5v-

CENTER Vol. 2.0v-3.0v

DOWN Vol. -1.5v

①The starting frequency data is outputed to Tuner. Wait for 240msec.

→ If AFT voltage is less than [ 1.5V ]. Jump to ④

→ Other, To the next.

②Frequency is raised by 500KHz/40msec (Tab.1-A) until AFT voltage becomes more

than UP voltage (3.5v).

- In case of following, Local frequency is set to an EEPROM data. Jump to ⑤

- Tuning data raised to +1.5MHz on the way,

- The digital AFT was performd 100 times or more,

③Frequency is raised by 100KHz/40msec (Tab.1-B) until AFT voltage becomes more

than DOWN voltage (1.5v).

- If a synchronized signal is lost on the way, it will return to ②

- In case of following, Local frequency is set to an EEPROM data. Jump to ⑤

1. Tuning data raised to +1.5MHz on the way,

2. The digital AFT was performed 100 times or more.

④Frequency is raised by 50KHz/40msec (Tab.1-C) until AFT vol becomes more than

CENTER voltage (2.0v).

- If a synchronized signal is lost on the way, it will return to ②

- In case of following, Local frequency is set to an EEPROM data. Jump to ⑤

1. Tuning data raised to +1.5MHz on the way,

2. The digital AFT was performd 100 times or more,

⑤Digital AFT complete.

Tab. 1 Digital AFT tuning speed

A B C

high speed up mid speed up low speed down

500KHz／40msec 100KHz／40msec 50KHz／40msec

16

Training Manual FC3G2 Chassis

* Input

(1) Detection of the synchronized signal of TV/AV.

Read register of the 1 chip IC (LA76818)

Status（D1 bit）

Judgment

1 Non - sign

0 sign

- It is determined by two continuation correspondence (20ms interval).

(2) Detection of an AFT signal uses a A-D input port (10pin).

- The AFT signal (0V-9V) outputted from an AFT circuit that is changed to 0V-5V by

resistance.

- This A-D input terminal port which consists of a 6-bit D-A conversion and a

comparator.

- Tuner always output AFT voltage of the TV signal, even if AV.

- An AFT signal is judged as follows:

The voltage level is read every 10ms.

↓f1

←3.5v 3.5v→ center freq

AFT signal ←2.0v

↑f2

Synchronized signal

(Attention)

The necessary condition of the sensitivity of an AFT signal is f2-f1 > 50kHz.

Input Vol. Level Judgment

L(0v～1.5v)

TU Vol. down

M(2.0v～3.0v)

TU Vol. center

H(3.5v～5v)

TU Vol. up

《Output》

* IIC bus is used for PLL control. (Matsushita PAL standardization F/S tuner)

* PLL control (transmission of data) is not performed in standby mode.

（the power voltage is not supplied to a PLL circuit）

* PLL control is not performed during bus open mode.

* PLL control register is refreshed every 20ms.

1.5v→

17

Training Manual FC3G2 Chassis

* The following data is transmitted.

Output

DATA（bit）

7 6 5 4 3 2 1 0

Slave address 1 1 0 0 0 0 1 0

Prog. divider 0 N14 N13 N12 N11 N10 N9 N8

Prog. divider N7 N6 N5 N4 N3 N2 N1 N0

Charge-pump 1 CP 0 0 1 RSA RSB 0

Band 0 0 0 0 B4 B3 B2 B1

- Prog. Divider control-> N14-N0

- CP＝１ (High current)

- Dividing ratio : 640 (50KHz)

Charge pump 1 CP 0 0 1 RSA RSB 0

1 １ 0 0 1 0 0 0

-BAND control -> P6-P4.

* Matsushita Tuner

BAND CHANNEL DATA

※CHANNEL No. <- from the

Tuner specifications

VL K1- K7(Z5) 00000001B

VH S8(Z6)- S41 00000010B

UHF E21- C57 00001000B

①Classification of VL and VH

Z5ch + 4MHz (=186.25MHz) is a boundary.

VL<186.25MHzVH

②Classification of VH and UHF

Z38ch + 3.5MHz(505.75MHz) is a boundary.

VL<505.75MHzUHF

* ALPS Tuner

BAND CHANNEL DATA (bit)

※CHANNEL No. <- from the

Tuner specifications

VL E2- S6(Z4) 00000001B

VH S7(Z5)- S36(Z33) 00000010B

UHF S37(Z34)- C57 00001000B

①Classification of VL and VH

Z4 ch + 4MHz（＝178.25MHz）is a boundary.

VL < 178.25MHzVH

②Classification of VH and UHF

Z33 ch＋4MHz(466.25MHz) is a boundary.

VL < 466.25MHz UHF

18

Training Manual FC3G2 Chassis

2-6 Horizontal/Vertical pulse input

The vertical and horizontal pulses from deflection circuits are input to pins 17 and 18 in

order to synchronize the ON Screen Display.

The vertical pulse is supplied from pin 3 of IC501 through the inverter circuit Q871.

The horizontal pulse is supplied from pin 5 of the fly back transformer through the

inverter circuit Q881 .

If one of these pulses is not supplied to the CPU, the on-screen display cannot be

displayed.

C-CAPTION

MN/ST

V-SYNC

H-SYNC

R

G

B

BLK

HS

VS

FILT

BILINGUAL

R878

C835

R872

R877

C880

Q871

R871

Q881

R881

R883

R882

R870

R877TM

X

EM1

27K

X

KK3300GQ

AH

1/16GJ

10KC

AH

1/16GJ

3.3KC

1/16GJ

33KC

1/16GJ

3.3KC

1/16GZ0C

1/16GJ

3.3KC

14

15

16

17

18 19

20

21

22

23

5VRC

PUMP UP

VCC

INVERT

INPUT

OUTPUT

STG VCC

OUTPUT

GND

C510

R511

R510

D501

D512

C511

SW501

R501

C517

R519

C520

R512

C518

IC501

C521

JW36

R503

JP503

JP501

JW37

16EM22

(:LBWAJ)

10K

J

EM01Z

:ERA15-02

:ED0448

KK0.01

GQ

B4S10B00100:

S10B1370N

2SJ1K

35EM

220

100

100FK0.1

(D:BE)

DJ

470

KK3300

LA78041

35EM

2200

(:LBWA)

X

J

76

5

4

321

1

5V-1

24V

VIDEO

HEATER

AFC

GND

LOW B

+B

SC

FO

HV

H-OUT

JW1

JP408

T471-H8

T471A

D485

C491

R488

C437

T471-H5

T471-H2

R435

T471

T471-H1

T471-H10

JP412

JP409

JP410

JP403

T471-H6

JP407

T471-H4

C437A

JP435

X

2400010

X

EU1

500KK

680A

1/2FJ1

250GJ

0.47

2400010

2400030

7SJ6.8VC

L40B16000

2400030

2400010

J

2400010

J

2400010

X

1

64

10

11

53

2

1

64

7

10

53

2

1

B1

130V

R355

DJ10K

IC801

QXXAVC305P

19

Training Manual FC3G2 Chassis

2-7 Service mode

20

Training Manual FC3G2 Chassis

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Sanyo FC3G2 Training manual

Sanyo FC3G2 Training manual

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