Vishay SiHP25N50E User manual

Type
User manual

The Vishay SiHP25N50E is a high-performance N-Channel MOSFET designed to offer low figure-of-merit (FOM) and reduced switching and conduction losses. It features avalanche energy-rated (UIS) and is suitable for hard-switched topologies, power factor correction power supplies (PFC), switch-mode power supplies (SMPS), computing, and lighting applications. The device’s low input and output capacitances, coupled with its fast-switching speed, make it ideal for high-frequency applications.

The Vishay SiHP25N50E is a high-performance N-Channel MOSFET designed to offer low figure-of-merit (FOM) and reduced switching and conduction losses. It features avalanche energy-rated (UIS) and is suitable for hard-switched topologies, power factor correction power supplies (PFC), switch-mode power supplies (SMPS), computing, and lighting applications. The device’s low input and output capacitances, coupled with its fast-switching speed, make it ideal for high-frequency applications.

SiHP25N50E
www.vishay.com Vishay Siliconix
S22-0948-Rev. E, 21-Nov-2022 1Document Number: 91626
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
E Series Power MOSFET
FEATURES
Low figure-of-merit (FOM): Ron x Qg
Low input capacitance (Ciss)
Reduced switching and conduction losses
Low gate charge (Qg)
Avalanche energy rated (UIS)
Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
APPLICATONS
Hard switched topologies
Power factor correction power supplies (PFC)
Switch mode power supplies (SMPS)
•Computing
- PC silver box / ATX power supplies
• Lighting
- Two stage LED lighting
Note
a. “-BE3” denotes alternate manufacturing location
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature
b. VDD = 50 V, starting TJ = 25 °C, L = 28.2 mH, Rg = 25 , IAS = 4.4 A
c. 1.6 mm from case
d. ISD ID, dI/dt = 100 A/μs, starting TJ = 25 °C
PRODUCT SUMMARY
VDS (V) at TJ max. 550
RDS(on) max. at 25 °C ()V
GS = 10 V 0.145
Qg (Max.) (nC) 86
Qgs (nC) 14
Qgd (nC) 25
Configuration Single
N-Channel MOSFET
G
D
S
TO-220AB
GD
S
Available
ORDERING INFORMATION
Package TO-220AB
Lead (Pb)-free and halogen-free SiHP25N50E-BE3 a
SiHP25N50E-GE3
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER SYMBOL LIMIT UNIT
Drain-source voltage VDS 500 V
Gate-source voltage VGS ± 30
Continuous drain current (TJ = 150 °C) VGS at 10 V TC = 25 °C ID
26
ATC = 100 °C 16
Pulsed drain current a IDM 50
Linear derating factor 0.2 W/°C
Single pulse avalanche energy b EAS 273 mJ
Maximum power dissipation PD250 W
Operating junction and storage temperature range TJ, Tstg -55 to +150 °C
Drain-source voltage slope TJ = 125 °C dV/dt 65 V/ns
Reverse diode dV/dt d25
Soldering recommendations (peak temperature) cFor 10 s 300 °C
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SiHP25N50E
www.vishay.com Vishay Siliconix
S22-0948-Rev. E, 21-Nov-2022 2Document Number: 91626
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Notes
a. Coss(er) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 % to 80 % VDSS
b. Coss(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDSS
THERMAL RESISTANCE RATINGS
PARAMETER SYMBOL TYP. MAX. UNIT
Maximum junction-to-ambient RthJA -62
°C/W
Maximum junction-to-case (drain) RthJC -0.5
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Static
Drain-source breakdown voltage VDS VGS = 0 V, ID = 250 μA 500 - - V
VDS temperature coefficient VDS/TJ Reference to 25 °C, ID = 1 mA - 0.59 - V/°C
Gate-source threshold Voltage (N) VGS(th) VDS = VGS, ID = 250 μA 2.0 - 4.0 V
Gate-source leakage IGSS VGS = ± 20 V - - ± 100 nA
VGS = ± 30 V - - ± 1 μA
Zero gate voltage drain current IDSS
VDS = 500 V, VGS = 0 V - - 1 μA
VDS = 400 V, VGS = 0 V, TJ = 125 °C - - 25
Drain-source on-state resistance RDS(on) V
GS = 10 V ID = 12 A - 0.125 0.145
Forward transconductance gfs VDS = 30 V, ID = 12 A - 6.6 - S
Dynamic
Input capacitance Ciss VGS = 0 V,
VDS = 100 V,
f = 1 MHz
- 1980 -
pF
Output capacitance Coss - 105 -
Reverse transfer capacitance Crss -8-
Effective output capacitance, energy
related a Co(er)
VDS = 0 V to 400 V, VGS = 0 V
- 105 -
Effective output capacitance, time
related b Co(tr) - 285 -
Total gate charge Qg
VGS = 10 V ID = 12 A, VDS = 400 V
-5786
nC Gate-source charge Qgs -14-
Gate-drain charge Qgd -25-
Turn-on delay time td(on)
VDD = 400 V, ID = 12 A
Rg = 9.1 , VGS = 10 V
-1938
ns
Rise time tr -3672
Turn-off delay time td(off) -5786
Fall time tf -2958
Gate input resistance Rg f = 1 MHz, open drain - 0.56 -
Drain-Source Body Diode Characteristics
Continuous source-drain diode current ISMOSFET symbol
showing the
integral reverse
p - n junction diode
--12
A
Pulsed diode forward current ISM --50
Diode forward voltage VSD TJ = 25 °C, IS = 16.5 A, VGS = 0 V - - 1.2 V
Reverse recovery time trr TJ = 25 °C, IF = IS,
dI/dt = 100 A/μs, VR = 25 V
- 338 - ns
Reverse recovery charge Qrr -5.3-μC
Reverse recovery current IRRM -29-A
S
D
G
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SiHP25N50E
www.vishay.com Vishay Siliconix
S22-0948-Rev. E, 21-Nov-2022 3Document Number: 91626
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Fig. 1 - Typical Output Characteristics
Fig. 2 - Typical Output Characteristics
Fig. 3 - Typical Transfer Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 6 - COSS and EOSS vs. VDS
0
10
20
30
40
50
60
70
0 5 10 15 20 25 30
ID, Drain-to-Source Current (A)
VDS, Drain-to-Source Voltage (V)
TJ= 25 °C
TOP 15 V
14 V
13 V
12 V
11 V
10 V
9 V
8 V
7 V
6 V
BOTTOM 5 V
0
10
20
30
40
0 5 10 15 20 25 30
ID, Drain-to-Source Current (A)
VDS, Drain-to-Source Voltage (V)
TJ= 150 °C
TOP 15 V
14 V
13 V
12 V
11 V
10 V
9 V
8 V
7 V
6 V
BOTTOM 5 V
0
10
20
30
40
50
60
70
0 5 10 15 20 25
ID, Drain-to-Source Current (A)
VGS, Gate-to-Source Voltage (V)
TJ= 150 °C
TJ= 25 °C
VDS= 28.6 V
0
0.5
1.0
1.5
2.0
2.5
3.0
-60 -40 -20 0 20 40 60 80 100 120 140 160
RDS(on), Drain-to-Source On-Resistance
(Normalized)
TJ, Junction Temperature (°C)
ID= 12 A
VGS = 10 V
1
10
100
1000
10 000
0 100 200 300 400 500
C, Capacitance (pF)
VDS, Drain-to-Source Voltage (V)
Ciss
Coss
Crss
VGS = 0 V, f = 1 MHz
Ciss = Cgs+ Cgd, Cdsshorted
Crss = Cgd
Coss = Cds+ Cgd
0
2
4
6
8
10
12
50
500
5000
0 100200300400500
Eoss (μJ)
Coss (pF)
VDS
Coss
Eoss
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SiHP25N50E
www.vishay.com Vishay Siliconix
S22-0948-Rev. E, 21-Nov-2022 4Document Number: 91626
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 8 - Typical Source-Drain Diode Forward Voltage
Fig. 9 - Maximum Safe Operating Area
Fig. 10 - Maximum Drain Current vs. Case Temperature
Fig. 11 - Typical Drain-to-Source Voltage vs. Temperature
0
4
8
12
16
20
24
0 20406080100120
VGS, Gate-to-Source Voltage (V)
Qg, Total Gate Charge (nC)
VDS= 400 V
VDS= 250 V
VDS= 100 V
0.1
1
10
100
0.2 0.4 0.6 0.8 1.0 1.2 1.4
ISD, Reverse Drain Current (A)
VSD, Source-Drain Voltage (V)
TJ= 150 °C
TJ= 25 °C
VGS = 0 V
0.01
0.1
1
10
100
1101001000
I
D
, Drain Current (A)
V
DS
, Drain-to-Source Voltage (V)
* V
GS
> minimum V
GS
at which R
DS(on)
is specied
Limited by R
DS(on)
*
1 ms
I
DM
Limited
T
C
= 25 °C
T
J
= 150 °C
Single Pulse
BVDSS Limited
10 ms
100 μs
Operation in this Area
Limited by R
DS(on)
0
6
12
18
24
30
25 50 75 100 125 150
ID, Drain Current (A)
TC, Case Temperature (°C)
450
475
500
525
550
575
600
625
650
-60 -40 -20 0 20 40 60 80 100 120 140 160
VDS, Drain-to-Source Breakdown Voltage (V)
TJ, Junction Temperature (°C)
ID= 250 μA
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SiHP25N50E
www.vishay.com Vishay Siliconix
S22-0948-Rev. E, 21-Nov-2022 5Document Number: 91626
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Fig. 12 - Normalized Thermal Transient Impedance, Junction-to-Case
Fig. 13 - Switching Time Test Circuit
Fig. 14 - Switching Time Waveforms
Fig. 15 - Unclamped Inductive Test Circuit
Fig. 16 - Unclamped Inductive Waveforms
Fig. 17 - Basic Gate Charge Waveform
Fig. 18 - Gate Charge Test Circuit
0.01
0.1
1
0.0001 0.001 0.01 0.1 1
Normalized Effective Transient
Thermal Impedance
Pulse Time (s)
Duty Cycle = 0.5
0.2
0.1
0.05
0.02
Single Pulse
VDS
90 %
10 %
VGS
td(on) trtd(off) tf
R
G
I
AS
0.01 Ω
t
p
D.U.T
L
V
DS
+
-V
DD
10 V
Vary t
p
to obtain
required I
AS
IAS
VDS
VDD
VDS
tp
QGS QGD
QG
V
G
Charge
10 V
D.U.T.
3 mA
VGS
VDS
IGID
0.3 µF
0.2 µF
50 kΩ
12 V
Current regulator
Current sampling resistors
Same type as D.U.T.
+
-
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SiHP25N50E
www.vishay.com Vishay Siliconix
S22-0948-Rev. E, 21-Nov-2022 6Document Number: 91626
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Fig. 19 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package / tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91626.
P.W. Period
dI/dt
Diode recovery
dV/dt
Ripple 5 %
Body diode forward drop
Re-applied
voltage
Reverse
recovery
current
Body diode forward
current
VGS = 10 Va
ISD
Driver gate drive
D.U.T. lSD waveform
D.U.T. VDS waveform
Inductor current
D = P.W.
Period
+
-
+
+
+
-
-
-
Peak Diode Recovery dV/dt Test Circuit
VDD
dV/dt controlled by Rg
Driver same type as D.U.T.
ISD controlled by duty factor “D”
D.U.T. - device under test
D.U.T. Circuit layout considerations
Low stray inductance
Ground plane
Low leakage inductance
current transformer
Rg
Note
a. VGS = 5 V for logic level devices
VDD
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Package Information
www.vishay.com Vishay Siliconix
Revison: 04-Nov-2021 1Document Number: 66542
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
TO-220-1
Note
M* = 0.052 inches to 0.064 inches (dimension including protrusion), heatsink hole for HVM
DIM. MILLIMETERS INCHES
MIN. MAX. MIN. MAX.
A 4.24 4.65 0.167 0.183
b 0.69 1.02 0.027 0.040
b(1) 1.14 1.78 0.045 0.070
c 0.36 0.61 0.014 0.024
D 14.33 15.85 0.564 0.624
E 9.96 10.52 0.392 0.414
e 2.41 2.67 0.095 0.105
e(1) 4.88 5.28 0.192 0.208
F 1.14 1.40 0.045 0.055
H(1) 6.10 6.71 0.240 0.264
J(1) 2.41 2.92 0.095 0.115
L 13.36 14.40 0.526 0.567
L(1) 3.33 4.04 0.131 0.159
Ø P 3.53 3.94 0.139 0.155
Q 2.54 3.00 0.100 0.118
ECN: E21-0621-Rev. D, 04-Nov-2021
DWG: 6031
M
*
3
2
1
L
L(1)
D
H(1)
Q
Ø P
A
F
J(1)
b(1)
e(1)
e
E
b
C
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Legal Disclaimer Notice
www.vishay.com Vishay
Revision: 01-Jan-2022 1Document Number: 91000
Disclaimer
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RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
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“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
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Vishay SiHP25N50E User manual

Type
User manual

The Vishay SiHP25N50E is a high-performance N-Channel MOSFET designed to offer low figure-of-merit (FOM) and reduced switching and conduction losses. It features avalanche energy-rated (UIS) and is suitable for hard-switched topologies, power factor correction power supplies (PFC), switch-mode power supplies (SMPS), computing, and lighting applications. The device’s low input and output capacitances, coupled with its fast-switching speed, make it ideal for high-frequency applications.

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