Vishay IRF740 User manual

Brand: Vishay

Model: IRF740

Type: User manual

Vishay IRF740 is a power MOSFET designed for fast switching applications. It features a low on-resistance of 0.55Ω, a maximum drain current of 40A, and a fast turn-on time of 14ns. Its dynamic dV/dt rating and repetitive avalanche capability make it suitable for inductive load switching and power factor correction circuits. Additionally, the TO-220AB package provides efficient heat dissipation, enabling the IRF740 to handle high power levels. With its ruggedized design and ease of paralleling, it is an excellent choice for various power switching applications.

IRF740

www.vishay.com Vishay Siliconix

S21-0853-Rev. D, 16-Aug-2021 1Document Number: 91054

For technical questions, contact: hvm@vishay.com

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

Power MOSFET

FEATURES

• Dynamic dV/dt rating

• Repetitive avalanche rated

• Fast switching

• Ease of paralleling

• Simple drive requirements

• Material categorization: for definitions of compliance

please see www.vishay.com/doc?99912

Note

This datasheet provides information about parts that are

RoHS-compliant and / or parts that are non RoHS-compliant. For

example, parts with lead (Pb) terminations are not RoHS-compliant.

Please see the information / tables in this datasheet for details

DESCRIPTION

Third generation power MOSFETs from Vishay provide the

designer with the best combination of fast switching,

ruggedized device design, low on-resistance and

cost-effectiveness.

The TO-220AB package is universally preferred for all

commercial-industrial applications at power dissipation

levels to approximately 50 W. The low thermal resistance

and low package cost of the TO-220AB contribute to its

wide acceptance throughout the industry.

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)

b. VDD = 50 V, starting TJ = 25 °C, L = 9.1 mH, Rg = 25 Ω, IAS = 10 A (see fig. 12)

c. ISD ≤ 10 A, dI/dt ≤ 120 A/μs, VDD ≤ VDS, TJ ≤ 150 °C

d. 1.6 mm from case

PRODUCT SUMMARY

VDS (V) 400

RDS(on) (Ω)V

GS = 10 V 0.55

Qg max. (nC) 63

Qgs (nC) 9.0

Qgd (nC) 32

Configuration Single

N-Channel MOSFET

TO-220AB

Available

ORDERING INFORMATION

Package TO-220AB

Lead (Pb)-free IRF740PbF

Lead (Pb)-free and halogen-free IRF740PbF-BE3

ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)

PARAMETER SYMBOL LIMIT UNIT

Drain-source voltage VDS 400 V

Gate-source voltage VGS ± 20

Continuous drain current VGS at 10 V TC = 25 °C ID

ATC = 100 °C 6.3

Pulsed drain current a IDM 40

Linear derating factor 1.0 W/°C

Single pulse avalanche energy bEAS 520 mJ

Repetitive avalanche current a IAR 10 A

Repetitive avalanche energy aEAR 13 mJ

Maximum power dissipation TC = 25 °C PD125 W

Peak diode recovery dV/dt cdV/dt 4.0 V/ns

Operating junction and storage temperature range TJ, Tstg -55 to +150 °C

Soldering recommendations (peak temperature) dFor 10 s 300

Mounting torque 6-32 or M3 screw 10 lbf · in

1.1 N · m

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IRF740

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S21-0853-Rev. D, 16-Aug-2021 2Document Number: 91054

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Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)

b. Pulse width ≤ 300 μs; duty cycle ≤ 2 %

THERMAL RESISTANCE RATINGS

PARAMETER SYMBOL TYP. MAX. UNIT

Maximum junction-to-ambient RthJA -62

°C/WCase-to-sink, flat, greased surface RthCS 0.50 -

Maximum junction-to-case (drain) RthJC -1.0

SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT

Static

Drain-source breakdown voltage VDS VGS = 0 V, ID = 250 μA 400 - - V

VDS temperature coefficient ΔVDS/TJ Reference to 25 °C, ID = 1 mA - 0.49 - V/°C

Gate-source threshold voltage VGS(th) VDS = VGS, ID = 250 μA 2.0 - 4.0 V

Gate-source leakage IGSS V

GS = ± 20 V - - ± 100 nA

Zero gate voltage drain current IDSS

VDS = 400 V, VGS = 0 V - - 25 μA

VDS = 320 V, VGS = 0 V, TJ = 125 °C - - 250

Drain-source on-state resistance RDS(on) V

GS = 10 V ID = 6.0 A b - - 0.55 Ω

Forward transconductance gfs VDS = 50 V, ID = 6.0 A b 5.8 - - S

Dynamic

Input capacitance Ciss VGS = 0 V,

VDS = 25 V,

f = 1.0 MHz, see fig. 5

- 1400 -

pFOutput capacitance Coss -330-

Reverse transfer capacitance Crss -120-

Total gate charge Qg

VGS = 10 V ID = 10 A, VDS = 320 V,

see fig. 6 and 13 b

--63

nC Gate-source charge Qgs --9.0

Gate-drain charge Qgd --32

Turn-on delay time td(on)

VDD = 200 V, ID = 10 A

Rg = 9.1 Ω, RD = 20 Ω, see fig. 10 b

-14-

Rise time tr -27-

Turn-off delay time td(off) -50-

Fall time tf -24-

Gate input resistance Rgf = 1 MHz, open drain 0.8 - 5.9 Ω

Internal drain inductance LD

Between lead,

6 mm (0.25") from

package and center of

die contact

-4.5-

Internal source inductance LS-7.5-

Drain-Source Body Diode Characteristics

Continuous source-drain diode current ISMOSFET symbol

showing the

integral reverse

p - n junction diode

--10

Pulsed diode forward current aISM --40

Body diode voltage VSD TJ = 25 °C, IS = 10 A, VGS = 0 V b --2.0V

Body diode reverse recovery time trr TJ = 25 °C, IF = 10 A, dI/dt = 100 A/μs b - 370 790 ns

Body diode reverse recovery charge Qrr -3.88.2μC

Forward turn-on time ton Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)

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S21-0853-Rev. D, 16-Aug-2021 3Document Number: 91054

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TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

Fig. 1 - Typical Output Characteristics, TC = 25 °C

Fig. 2 - Typical Output Characteristics, TC = 150 °C

Fig. 3 - Typical Transfer Characteristics

Fig. 4 - Normalized On-Resistance vs. Temperature

Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage

Fig. 6 - Typical Gate Charge vs. Drain-to-Source Voltage

, Drain-to-Source Voltage (V)

, Drain Current (A)

91054_01

Bottom

To p

VGS

15 V

10 V

8.0 V

7.0 V

6.0 V

5.5 V

5.0 V

4.5 V

20 µs Pulse Width

TC = 25 °C

4.5 V

101

100

10-1 100101

91054_02

4.5 V

Bottom

To p

VGS

15 V

10 V

8.0 V

7.0 V

6.0 V

5.5 V

5.0 V

4.5 V

20 µs Pulse Width

TC = 150 °C

101

100

10-1 100101

DS,

Drain-to-Source Voltage (V)

, Drain Current (A)

20 µs Pulse Width

VDS = 50 V

25 °C

150 °C

91054_03

101

100

10-1

ID, Drain Current (A)

VGS, Gate-to-Source Voltage (V)

5678910

= 10 A

= 10 V

91054_04

3.0

0.0

0.5

1.0

1.5

2.0

2.5

- 60 - 40 - 20 0 20 40 60 80 100 120 140 160

Junction Temperature (°C)

DS(on)

, Drain-to-Source On Resistance

(Normalized)

iss

rss

oss

= 0 V, f = 1 MHz

iss

= C

+ C

, C

Shorted

rss

= C

oss

= C

+ C

91054_05

2500

2000

1500

1000

500

Capacitance (pF)

DS,

Drain-to-Source Voltage (V)

91054_06

= 10 A

= 200 V

For test circuit

see figure 13

= 80 V

= 320 V

QG, Total Gate Charge (nC)

VGS, Gate-to-Source Voltage (V)

015 75

6045

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IRF740

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S21-0853-Rev. D, 16-Aug-2021 4Document Number: 91054

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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

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Fig. 7 - Typical Source-Drain Diode Forward Voltage

Fig. 8 - Maximum Safe Operating Area

Fig. 9 - Maximum Drain Current vs. Case Temperature

Fig. 10a - Switching Time Test Circuit

Fig. 10b - Switching Time Waveforms

91054_07

101

100

, Source-to-Drain Voltage (V)

, Reverse Drain Current (A)

0.50 1.100.900.70 1.50

1.30

25 °C

150 °C

= 0 V

10-1

91054_08

10 µs

100 µs

1 ms

10 ms

Operation in this area limited

by RDS(on)

TC = 25 °C

TJ = 150 °C

Single Pulse

ID, Drain Current (A)

103

VDS, Drain-to-Source Voltage (V)

0.1 110 102103

25 25 2 525

0.1

102

91054_09

ID, Drain Current (A)

TC, Case Temperature (°C)

25 1501251007550

Pulse width ≤ 1 µs

Duty factor ≤ 0.1 %

VGS

D.U.T.

10 V

VDS

VDD

VDS

90 %

10 %

VGS

td(on) trtd(off) tf

91054_11

0 - 0.5

0.2

0.1

0.05

0.01

Single Pulse

(Thermal Response)

PDM

Notes:

1. Duty Factor, D = t1/t2

2. Peak Tj = PDM x ZthJC + TC

0.02

Thermal Response (ZthJC)

0.1

10-2

t1, Rectangular Pulse Duration (S)

10-5 10-4 10-3 10-2 0.1 1 10

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IRF740

www.vishay.com Vishay Siliconix

S21-0853-Rev. D, 16-Aug-2021 5Document Number: 91054

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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

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Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case

Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms

Fig. 12c - Maximum Avalanche Energy vs. Drain Current

Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit

0.01 Ω

D.U.T

-V

10 V

Var y t

to obtain

required I

IAS

VDS

VDD

VDS

91054_12c

Bottom

To p

4.5 A

5.3 A

10 A

VDD = 50 V

1200

200

400

600

800

1000

25 150

125

10075

Starting T

, Junction Temperature (°C)

, Single Pulse Energy (mJ)

QGS QGD

Charge

10 V

D.U.T.

3 mA

VGS

VDS

IGID

0.3 µF

0.2 µF

50 kΩ

12 V

Current regulator

Current sampling resistors

Same type as D.U.T.

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IRF740

www.vishay.com Vishay Siliconix

S21-0853-Rev. D, 16-Aug-2021 6Document Number: 91054

For technical questions, contact: hvm@vishay.com

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

Fig. 14 - For N-Channel

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon

Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and

reliability data, see www.vishay.com/ppg?91054.

P.W. Period

dI/dt

Diode recovery

dV/dt

Ripple ≤ 5 %

Body diode forward drop

Re-applied

voltage

Reverse

recovery

current

Body diode forward

current

VGS = 10 Va

ISD

Driver gate drive

D.U.T. lSD waveform

D.U.T. VDS waveform

Inductor current

D = P.W.

Period

Peak Diode Recovery dV/dt Test Circuit

VDD

• dV/dt controlled by Rg

• Driver same type as D.U.T.

• ISD controlled by duty factor “D”

• D.U.T. - device under test

D.U.T. Circuit layout considerations

• Low stray inductance

• Ground plane

• Low leakage inductance

current transformer

Note

a. VGS = 5 V for logic level devices

VDD

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Package Information

www.vishay.com Vishay Siliconix

Revison: 04-Nov-2021 1Document Number: 66542

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TO-220-1

Note

• M* = 0.052 inches to 0.064 inches (dimension including protrusion), heatsink hole for HVM

DIM. MILLIMETERS INCHES

MIN. MAX. MIN. MAX.

A 4.24 4.65 0.167 0.183

b 0.69 1.02 0.027 0.040

b(1) 1.14 1.78 0.045 0.070

c 0.36 0.61 0.014 0.024

D 14.33 15.85 0.564 0.624

E 9.96 10.52 0.392 0.414

e 2.41 2.67 0.095 0.105

e(1) 4.88 5.28 0.192 0.208

F 1.14 1.40 0.045 0.055

H(1) 6.10 6.71 0.240 0.264

J(1) 2.41 2.92 0.095 0.115

L 13.36 14.40 0.526 0.567

L(1) 3.33 4.04 0.131 0.159

Ø P 3.53 3.94 0.139 0.155

Q 2.54 3.00 0.100 0.118

ECN: E21-0621-Rev. D, 04-Nov-2021

DWG: 6031

L(1)

H(1)

Ø P

J(1)

b(1)

e(1)

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Revision: 01-Jan-2022 1Document Number: 91000

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Vishay IRF740 User manual

Vishay IRF740 User manual

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