Neoway N25 User guide

Hardware User Guide

Issue 1.3 Date 2020-09-18

N25 Hardware User Guide

Copyright

i

No part of this document may be reproduced or transmitted in any form or by any means without prior written

consent of Neoway Technology Co., Ltd.

is the trademark of Neoway Technology Co., Ltd.

All other trademarks and trade names mentioned in this document are the property of their respective

holders.

Notice

This document provides guide for users to use N25.

This document is intended for system engineers (SEs), development engineers, and test engineers.

THIS GUIDE PROVIDES INSTRUCTIONS FOR CUSTOMERS TO DESIGN THEIR APPLICATIONS.

PLEASE FOLLOW THE RULES AND PARAMETERS IN THIS GUIDE TO DESIGN AND COMMISSION.

NEOWAY WILL NOT TAKE ANY RESPONSIBILITY OF BODILY HURT OR ASSET LOSS CAUSED BY

IMPROPER OPERATIONS.

THE INFORMATION IN THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE DUE TO

PRODUCT VERSION UPDATE OR OTHER REASONS.

EVERY EFFORT HAS BEEN MADE IN PREPARATION OF THIS DOCUMENT TO ENSURE ACCURACY

OF THE CONTENTS, BUT ALL STATEMENTS, INFORMATION, AND RECOMMENDATIONS IN THIS

DOCUMENT DO NOT CONSTITUTE A WARRANTY OF ANY KIND, EXPRESS OR IMPLIED.

Neoway provides customers complete technical support. If you have any question, please contact your

account manager or email to the following email addresses:

[email protected]

Website: http://www.neoway.com

 
N25 Hardware User Guide 
Contents 
 
Copyright © Neoway Technology Co., Ltd 
ii 
 
Contents 
About N25 .................................................................................................. 1 
1 Product Overview ......................................................................................................................... 1 
2 Block Diagram .............................................................................................................................. 1 
3 Basic Features ............................................................................................................................. 2 
Module Pins ............................................................................................... 4 
1 Pad Layout ................................................................................................................................... 4 
2 Pin Description ............................................................................................................................. 5 
Application Interfaces ................................................................................ 8 
1 Power Supply ............................................................................................................................... 8 
1.1 VBAT .................................................................................................................................... 8 
1.2 VDD_2P8 ............................................................................................................................ 11 
1.3 VRTC .................................................................................................................................. 11 
2 Control Interfaces ........................................................................................................................ 11 
2.1 PWRKEY_N ....................................................................................................................... 11 
2.2 RESET_N .......................................................................................................................... 14 
3 Peripheral Interfaces .................................................................................................................. 15 
3.1 UART ................................................................................................................................. 15 
3.2 USIM .................................................................................................................................. 18 
3.3 ADC ................................................................................................................................... 19 
4 RF Interface ................................................................................................................................ 20 
4.1 Antenna Design ................................................................................................................. 20 
4.2 Antenna Assembling .......................................................................................................... 22 
5 GPIO .......................................................................................................................................... 23 
6 Other Interfaces ......................................................................................................................... 23 
6.1 WAKEUP_IN...................................................................................................................... 23 
6.2 WAKEUP_OUT ................................................................................................................. 24 
6.3 STATUS ............................................................................................................................. 24 
Electric Feature and Reliability ................................................................ 25 
1 Nominal Values .......................................................................................................................... 25 
2 Current Features ........................................................................................................................ 25 
3 Temperature Feature .................................................................................................................. 26 
4 ESD Protection ........................................................................................................................... 26 
RF Features ............................................................................................. 27 
1 Operating Bands ........................................................................................................................ 27 
2 TX Power and RX Sensitivity ..................................................................................................... 27 
Mechanical Features ............................................................................... 29 
1 Dimensions ................................................................................................................................. 29 
2 Label ........................................................................................................................................... 29 
3 Package ..................................................................................................................................... 30 

N25 Hardware User Guide

Contents

iii

6.3.1 Tape & Reel Packaging ..................................................................................................... 30

6.3.2 Moisture-Sensitive ............................................................................................................. 32

7 Mounting N25 onto Application Board ..................................................... 33

7.1 Bottom Dimensions .................................................................................................................... 33

7.2 Application Foot Print ................................................................................................................. 34

7.3 Stencil ......................................................................................................................................... 34

7.4 Solder Paste ............................................................................................................................... 34

7.5 SMT Profile ................................................................................................................................. 35

8 Safety Recommendations ....................................................................... 37

Conformity and Compliance .................................................................... 38

A.1 Approvals ................................................................................................................................... 38

A.2 Chinese Notice........................................................................................................................... 38

A.2.1 CCC Class A Digital Device Notice ................................................................................... 38

A.2.2 Environmental Protection Notice ....................................................................................... 38

Abbreviation ............................................................................................ 39

N25 Hardware User Guide

Table of Figures

iv

Table of Figures

Figure 1-1 Block diagram ................................................................................................................... 2

Figure 2-1 Pin definition of N25 .......................................................................................................... 4

Figure 3-1 Recommended circuit design 1 ........................................................................................ 9

Figure 3-2 Recommended schematic design 2 ................................................................................. 9

Figure 3-3 Reference design of startup controlled by button ............................................................ 11

Figure 3-4 Reference design of startup controlled by MCU ............................................................. 12

Figure 3-5 Reference design of automatic start once powered up .................................................. 12

Figure 3-6 Startup timing .................................................................................................................. 13

Figure 3-7 Shutdown timing ............................................................................................................. 13

Figure 3-8 Reset controlled by button .............................................................................................. 14

Figure 3-9 Reset circuit with triode separating ................................................................................. 14

Figure 3-10 Reset timing of N25 ...................................................................................................... 15

Figure 3-11 UART connection .......................................................................................................... 16

Figure 3-12 Recommended level shifting circuit 1 ........................................................................... 16

Figure 3-13 Recommended level shifting circuit 2 ........................................................................... 17

Figure 3-14 Recommended level shifting circuit 3 ........................................................................... 18

Figure 3-15 Reference design of USIM card interface ..................................................................... 19

Figure 3-16 L network ...................................................................................................................... 20

Figure 3-17 T network ...................................................................................................................... 20

Figure 3-18 Pi network ..................................................................................................................... 21

Figure 3-19 Recommended RF PCB design ................................................................................... 21

Figure 3-20 Specifications of MM9329-2700RA1 ............................................................................ 22

Figure 3-21 RF connections ............................................................................................................. 22

Figure 3-22 Reference design of WAKEUP ..................................................................................... 23

Figure 3-23 Driving LED with a triode .............................................................................................. 24

Figure 6-1 N25 dimensions (Unit: mm) ............................................................................................ 29

Figure 6-2 N25 Label ....................................................................................................................... 30

N25 Hardware User Guide

Table of Figures

v

Figure 7-1 N25 bottom dimensions (Unit: mm) ................................................................................ 33

Figure 7-2 Recommended PCB foot print (Unit: mm) ...................................................................... 34

Figure 7-3 SMT furnace temperature curve ..................................................................................... 35

N25 Hardware User Guide

Table of Tables

vi

Table of Tables

Table 1-1 Variants and bands ............................................................................................................. 1

Table 2-1 IO definition ........................................................................................................................ 5

Table 2-2 Pin Description ................................................................................................................... 5

Table 4-1 Operating conditions of N25 ............................................................................................. 25

Table 4-2 Current consumption of N25 (Typical) .............................................................................. 25

Table 4-3 Temperature features of N25 ............................................................................................ 26

Table 4-4 N25 ESD protection .......................................................................................................... 26

Table 5-1 Operating bands of N25 ................................................................................................... 27

Table 5-2 RF TX power of N25 ......................................................................................................... 27

Table 5-3 RX sensitivity of N25 Cat NB1/Cat NB2 ........................................................................... 28

N25 Hardware User Guide

About This Document

vii

About This Document

Scope

This document is applicable to N25 series.

It defines the features, indicators, and test standards of the N25 module and provides reference for the

hardware design of each interface.

Reference designs in this document are only for reference. Design applications based on the actual

scenarios and conditions. Please contact Neoway technical support team for further technical support.

Audience

This document is intended for system engineers (SEs), development engineers, and test engineers.

Change History

Issue

Date

Change

Changed By

1.0

2019-02

Initial draft

Huang Jianlong

1.1

2019-04

⚫ Updated startup timing, shutdown timing, and

reset timing

⚫ Added the caution of supply voltage

Huang Jianlong

1.2

2020-02

⚫ Added Cat NB2

⚫ Added functions related to 3GPP Release 4

⚫ Changed the thickness of the module

⚫ Changed the operating temperature range

⚫ Changed the reset schematic diagram

⚫ Changed the startup timing

⚫ Changed the remarks of UART1_RXD

Zhao Rongzhou

1.3

2020-05

⚫ Corrected the wireless rate of NB-IoT

⚫ Corrected the tolerance information of the module

dimensions.

Zhao Rongzhou.

N25 Hardware User Guide

About This Document

viii

Conventions

Symbol

Indication

This warning symbol means danger. You are in a situation that could cause fatal

device damage or even bodily damage.

Means reader be careful. In this situation, you might perform an action that could

result in module or product damages.

Means note or tips for readers to use the module

Related Documents

Neoway_N25_Datasheet

Neoway_N25_Product_Specifications

Neoway_N25_AT_Command_Mannual

Neoway_N25_EVK_User_Guide

N25 Hardware User Guide

Chapter 1 About N25

1

1 About N25

N25 is an industrial-grade NB-IoT plus GPRS module. This chapter provides a basic introduction about

its variants and bands, block diagram, and features.

1.1 Product Overview

N25 series include multiple variants. Table 1-1 lists the variants and bands supported.

Table 1-1 Variants and bands

Model

Variant

Network Type

Band

N25

N25-CN-011AS1

Cat NB/GPRS

Cat NB1/Cat NB2: HD-FDD: B3, B5, B8

GPRS: 900/1800MHz

N25-EU-011AS1

Cat NB/GPRS

Cat NB1/Cat NB2: HD-FDD: B3, B5, B8, B20, B28

GPRS: 850/900/1800/1900MHz

Featured with ultra-low power consumption, extensive coverage and simple peripheral circuits, N25 is

well applicable to IoT applications that requires low data rate and low power consumption. It adopts

52-pin LGA package and its dimensions are 24 mm x 20 mm x 2.45 mm, which can meet the comact

product design requirement .

It provides the following hardware resources and functionalities:

⚫ UART interfaces, used for data communication, firmware update, and commissioning

⚫ Compatibility with 1.8 V/3.0V USIM card

⚫ STATUS (working status) /WAKEUP_IN (PSM wakeup) /RESET_N/ADC

1.2 Block Diagram

N25 consists of the following functionality modules:

⚫ Power management unit

⚫ Clock unit

⚫ Digital interfaces (USIM, UART)

N25 Hardware User Guide

Chapter 1 About N25

2

⚫ Analog interface (ADC)

⚫ RF section

Figure 1-1 Block diagram

1.3 Basic Features

Parameter

Description

Physical features

⚫ Dimensions: (24.0±0.10) mm × (20±0.10) mm × (2.45±0.10) mm

⚫ Package: 52-pin LGA

⚫ Weight: around 1.8 g

Temperature ranges

Operating: -40°C to +85°C

Storage: -45°C to +90°C

Operating voltage

VBAT: 3.4V to 4.3V, TYP: 3.8V

MIPS processor

Main frequency: 192 MHz, 16KB L2 cache

Memory

RAM: 32 Mb

ANT

Power

Manager

Flash Analog

Baseband Digital

Baseband

RF Front-end-module 26MHz

Crystal

Digital Iterface

USIM UART

SIM

VBAT

RF transceiver

32.768

KHz

Crystal

RESET_N

PWRKEY_N

ADC

ADC0

N25 Hardware User Guide

Chapter 1 About N25

3

ROM: 32 Mb

Band

B3, B5, B8, B20, B28

Wireless rate

LTE Cat NB1: 26 Kbps (DL) /62.5 Kbps (UL)

LTE Cat NB2: 127 Kbps (DL)/158.5 Kbps (UL)

GPRS: 85.6 Kbps (DL/UL)

Transmit power

LTE: +23 dBm+/-2 dBm (Power Class 3)

GPSR 850/900: 33 dBm+/-2dB

GPSR 1800/1900: 30 dBm+/-2dB

Application interfaces

4G antenna, 50 Ω characteristic impedance

1 UART interface with hardware flow control, used to send AT commands

1 USIM interface, compatible with 1.8V/3V USIM card

1 ADC interface

2*2 mm eSIM (Optional)

AT commands

3GPP Rel-13

3GPP Rel-14

Neoway extended commands

SMS

TEXT/PDU Point to Point/Cell Broadcast

Cloud platform

China Mobile OneNet, China Telecom IoT Cloud, Huawei OceanConnect

Protocol

TCP/IP, PPP, UDP, HTTP, HTTPS, FTP, LWM2M, CoAP, DTLS, SMS

Certificates and

Approvals

CCC*, SRRC*, RoHS*

China Mobile

* indicates in development

N25 Hardware User Guide

Chapter 2 Module Pins

4

2 Module Pins

There are 52 pins on N25 and their pads are introduced in LGA package.

2.1 Pad Layout

Figure 2-1 shows the pad layout of N25.

Figure 2-1 Pin definition of N25

N25

Top View

26

25

24

23

22

21

20

19

18

16

17

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

27

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

51

50

52

28

USIM_DET

ANT

ANT_BT

GND

VBAT

VRTC

USIM_GND

USIM_CLK

USIM_DATA

USIM_RESET

USIM_VCC

RESERVED

UART1_RTS

UART1_CTS

UART1_RXD

UART1_TXD

RESERVED

GND

ADC0

GND

NET_LIGHT

GPIO1

GPIO2

GPIO3

WAKEUP_OUT

RESET_N

WAKEUP_IN

PWRKEY_N

STATUS

RESERVED

VDD_2P8

RESERVED

DWBUG_UART_TXD

DWBUG_UART_RXD

N25 Hardware User Guide

Chapter 2 Module Pins

5

2.2 Pin Description

Table 2-1 lists the definition of IO types.

Table 2-1 IO definition

IO Type

DO

Digital output, COMS logic level

DI

Digital input, COMS logic level

PO

Power output

PI

Power input

AO

Analog output

AI

Analog input

Level Feature

P1

1.8V/3.0V dual-voltage SIM

interface

1.8 V level feature:

VIH=1.26V~1.8V

VIL=-0.3V~0.36V

VOH=1.44V~1.8V

VOL=0V~0.4V

3.0 V level feature:

VIH=2V~3V

VIL=-0.3V~0.57V

VOH=2.28V~3V

VOL=0V~0.4V

P2

2.8V digital IO

VIH =2.1V~2.8V, VIL = 0V~0.7V

VOH=2.1~2.8V, VOL=0V~0.7V

P3

1.1V of V_RTC power domain

VIH min=0.83V VIH max= 1.41V

VIL min=-0.3V VIL max= 0.36V

Table 2-2 Pin Description

Signal

I/O

Function

Level

Remarks

Power Supply Pins

VBAT

16,

17

PI

Main power

input

Vmax=4.3V

VRTC

15

PI

RTC backup

input

Vmax=1.4V

Leave this pin floating if it is

not used.

VDD_2P8

41

PO

2.8V power

output

Vnorm=2.8V

Imax=50mA

Used only for level shifting.

Leave this pin floating if it is

not used.

GND

13, 18, 19, 20, 21, 23, 24, 26, 30, 32

Ensure that all GND pins are

connected to the ground.

N25 Hardware User Guide

Chapter 2 Module Pins

6

Control Interfaces

RESET_N

38

DI

Reset input

P3

Triggered by low level

PWRKEY_N

40

DI

ON/OFF button

P3

Triggered by low level to start

or shut down the module

UART Interface

UART1_TXD

1

DO

Data

transmitting

P2

Used for data transmission.

Leave these pins floating if

they are not used.

UART1_RXD

2

DI

Data receiving

P2

UART1_CTS

3

DI

Clear to send

P2

UART1_RTS

4

DO

Request to

send

P2

DEBUG_UART Interface

DEBUG_UART_TXD

51

DO

Data

transmitting

P2

Used for commissioning.

Leave these pins floating if

they are not used.

DEBUG_UART_RXD

52

DI

Data receiving

P2

USIM interface

USIM_VCC

9

PO

USIM power

output

IOmax =50mA

USIM_VCC

USIM_RESET

10

DO

USIM reset

P1

USIM_DATA

11

DIO

USIM data IO

P1

USIM_CLK

12

DO

USIM clock

P1

USIM_DET

14

DI

USIM card

presence

detect

P2

ADC interface

ADC0

31

AI

ADC input

Leave this pin floating if it is

not used.

Max input 1.8V

Antenna Interface

ANT

25

AI/O

Antenna

50 Ω impedance for traces

ANT_BT

22

AI/O

BT/Wi-Fi

antenna

50 Ω impedance for traces

Others

WAKEUP_OUT

37

DO

Wake up MCU

P2

Leave this pin floating if it is

not used.

N25 Hardware User Guide

Chapter 2 Module Pins

7

WAKEUP_IN

39

DI

PSM wakeup

input

P3

Input high level for 1 second

at this pin and the module

wakes up.

STATUS

42

DO

Power status

indicator

P2

Leave this pin floating if it is

not used.

NET_LIGHT

33

DO

Network status

indicator

P2

Leave this pin floating if it is

not used.

GPIO_1

34

IO

GPIO

P2

Leave this pin floating if it is

not used.

GPIO_2

35

IO

GPIO

P2

Leave this pin floating if it is

not used.

GPIO_3

36

IO

GPIO

P2

Leave this pin floating if it is

not used.

Reserved Pins

RESERVED

5, 6, 7, 8, 27, 28, 29, 43, 44, 45, 46, 47, 48,

49, 50

Leave these pins floating. Do

not connect them to ground

or power supply.

N25 Hardware User Guide

Chapter 3 Application Interfaces

8

3 Application Interfaces

N25 provides power supply, communications, RF, and other interfaces to meet customers requirements

in different application scenarios.

This chapter describes how to design each interface and provides reference designs and guidelines.

3.1 Power Supply

The schematic design and PCB layout of the power supply are the most critical part in application

design and they determine the performance of the final product. Please read the guidelines to design

power supply and comply with the correct design principles to obtain the optimal circuit performance.

Signal

I/O

Function

Remarks

VBAT

16, 17

PI

Main power input

3.4V to 4.3V (TYP: 3.8V)

VDD_2P8

41

PO

2.8V power output

Output max. 50 mA, used only for level shifting.

Add ESD protector when using this pin.

GND

13, 18, 19, 20, 21, 23, 24, 26, 30, 32

Connect all GND pins to the ground plane.

3.1.1 VBAT

The power supply design consists of two parts: schematic design and PCB layout.

Schematic Design

N25 adopts a 3.4V-4.3V voltage input supplied by a battery and the typical voltage is 3.8V. Figure 3-1

shows the schematic design of N25 power supply.

RF indicators are affected by power conditions. If the supply voltage of VBAT_RF ranges 3.1V to 3.4V, the RF

function can work but the RF indicators might not meet requirements.

N25 Hardware User Guide

Chapter 3 Application Interfaces

9

Figure 3-1 Recommended circuit design 1

⚫ The maximum input voltage is 4.3 V and the typical value is 3.8V.

⚫ The protection voltage across TVS1 should not exceed the maximum input voltage the module

can bear.

Place TVS diode close to the input interface of the power supply to clamp the surge voltage

before it enters back-end circuits. Therefore, the back-end components and the module are

protected.

⚫ A large bypass tantalum capacitor (220 μF or 100 μF) or aluminum capacitor (470 μF or 1000

μF) is expected at C1 to reduce voltage drops during bursts. Its maximum safe operating voltage

should be higher than 1.5 times the voltage across the power supply.

⚫ Place a bypass capacitor of low-ESR close to the module to filter out high-frequency noise from

the power supply.

A controllable power supply is preferable if the module is used in harsh conditions. Figure 3-2 shows

the recommended schematic design.

Figure 3-2 Recommended schematic design 2

S

G

D

Q2

Q1

BC

E

VIN (3.8V) VBAT

PWR_EN

C1 R4 C7C6C5C4C3

C2

R2

R1

TVS2

10 uF 0.1 uF 10 kΩ

47 kΩ

10 uF 0.1 uF 100 pF 33 pF470 uF

4.7 kΩ

Power Supply N25 Module

TVS1 C1 C2 C3 C4

Close to the pin of the module

VBAT

Test point

I_max

C5

N25 Hardware User Guide

Chapter 3 Application Interfaces

10

Schematic Design Guidelines

⚫ Select an enhanced p-MOSFET at Q1, of which the maximum safe operating voltage and drain

current is high and Rds is low.

⚫ Select a common NPN transistor or a digital NPN transistor at Q2. Reserve enough resistance

tolerances at R1 and R2 in design, especially for the situation in which operating voltage of the

bipolar transistor might increase in low temperature.

⚫ Place TVS2 close to the input interface of the power supply to clamp the surge voltage before it

enters back-end circuits. Therefore, the back-end components and the module are protected.

⚫ Place C3 close to the module. A large bypass tantalum capacitor (220 μF or 100 μF) or

aluminum capacitor (470 μF or 1000 μF) is expected at C1 to reduce voltage drops during

bursts. Its maximum safe operating voltage should be higher than 1.5 times the voltage across

the power supply.

⚫ Place a low-ESR bypass capacitor close to the module to filter out high-frequency noise from the

power supply.

PCB Layout Guidelines

Place an ESR capacitor at the output of the power supply to absorb surge current. Place a TVS diode

at the input of VBAT to protect back-end components. The layout of components and PCB trace are

critical to the hardware design of a device. Follow rules below in the power supply design:

⚫ TVS diodes dissipate the transient pulse power during a surge and can handle a peak pulse

current of dozens or more than 100 A. They have a short response time. Place the TVS as close

to the interface as possible to ensure that the surge voltage can be clamped before the pulse is

coupled to the neighbor traces.

⚫ Place bypass capacitors close to the power pin of the module to filter out the high-frequency

noise from the power supply.

⚫ Ensure that the width of PCB traces for VBAT circuits allows 2A current (GSM) and ensure no

obvious decrease of loop voltages. Trace width of VBAT should be at least 1 mm and the ground

plane should be as complete as possible. The traces of power supply circuit should be as short

and wide as possible.

⚫ Noise-sensitive circuits such as audio and RF, should be placed far away from power supply

circuits, especially when the DC-DC is adopted in the design. Connect GND pins and bottom

pads to ground to optimize heat sink and separate noise.

Never use a diode to make the drop voltage between a higher input and module power. Otherwise, Neoway will

not provide warranty for product issues caused by this. In this situation, the diode will obviously decrease the

module performances, or result in unexpected restarts, because the forward voltage of diode will vary greatly in

different temperature and current. The module might not work properly with a diode power supply.

N25 Hardware User Guide

Chapter 3 Application Interfaces

11

3.1.2 VDD_2P8

N25 provides one VDD_2P8 pin that outputs 2.8V@50 mA.

VDD_2P8 is enabled automatically when the module is awake or in running state.

It is recommended that VDD_2P8 is used for level shift only and an ESD protector should be added.

3.1.3 VRTC

VRTC is the input pin of the backup power for RTC. External power source can supply power for RTC

power supply with a maximum voltage of 1.4V.

3.2 Control Interfaces

Signal

I/O

Function

Remarks

RESET_N

38

DI

Reset input

Reset at low level

PWRKEY_N

40

DI

ON/OFF button

Triggered by low level to start or shut down the

module.

3.2.1 PWRKEY_N

N25 allows startup by the following controls:

⚫ Button

⚫ MCU

⚫ Automatic start once powered up

Figure 3-3 Reference design of startup controlled by button

ESD N25 module

PWRKEY_N

S1

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