Neoway N75 User guide

Hardware User Guide

Issue 1.1 Date 2020-11-17

N75 Hardware User Guide

Copyright

i

No part of this document may be reproduced or transmitted in any form or by any means without prior written

consent of Neoway Technology Co., Ltd.

is the trademark of Neoway Technology Co., Ltd.

All other trademarks and trade names mentioned in this document are the property of their respective

holders.

Notice

This document provides a guide for users to use N75.

This document is intended for system engineers (SEs), development engineers, and test engineers.

THIS GUIDE PROVIDES INSTRUCTIONS FOR CUSTOMERS TO DESIGN THEIR APPLICATIONS.

PLEASE FOLLOW THE RULES AND PARAMETERS IN THIS GUIDE TO DESIGN AND COMMISSION.

NEOWAY WILL NOT TAKE ANY RESPONSIBILITY OF BODILY HURT OR ASSET LOSS CAUSED BY

IMPROPER OPERATIONS.

THE INFORMATION IN THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE DUE TO

PRODUCT VERSION UPDATE OR OTHER REASONS.

EVERY EFFORT HAS BEEN MADE IN PREPARATION OF THIS DOCUMENT TO ENSURE ACCURACY

OF THE CONTENTS, BUT ALL STATEMENTS, INFORMATION, AND RECOMMENDATIONS IN THIS

DOCUMENT DO NOT CONSTITUTE A WARRANTY OF ANY KIND, EXPRESS OR IMPLIED.

Neoway provides customers complete technical support. If you have any question, please contact your

account manager or email to the following email addresses:

[email protected]

Website: http://www.neoway.com

 
N75 Hardware User Guide 
Contents 
 
Copyright © Neoway Technology Co., Ltd 
ii 
 
Contents 
About N75 .................................................................................................. 1 
1 Product Overview ......................................................................................................................... 1 
2 Block Diagram .............................................................................................................................. 2 
3 Basic Features ............................................................................................................................. 3 
Module Pins ............................................................................................... 5 
1 Pad Layout ................................................................................................................................... 5 
2 Pin Description ............................................................................................................................. 6 
Application Interfaces .............................................................................. 12 
1 Power Interfaces ........................................................................................................................ 12 
1.1 VBAT .................................................................................................................................. 12 
1.2 DVDD_1P8 ........................................................................................................................ 17 
2 Control Interfaces ....................................................................................................................... 17 
2.1 PWRKEY_N ...................................................................................................................... 17 
2.2 RESET_N .......................................................................................................................... 20 
3 Peripheral Interfaces .................................................................................................................. 21 
3.2 USB ................................................................................................................................... 22 
3.3 USIM .................................................................................................................................. 24 
3.4 UART ................................................................................................................................. 25 
3.5 SDC ................................................................................................................................... 28 
3.6 I2S/PCM ............................................................................................................................ 31 
3.7 SPI ..................................................................................................................................... 36 
3.8 I2C ..................................................................................................................................... 38 
4 Network and Connection ............................................................................................................ 42 
4.1 Ethernet ............................................................................................................................. 42 
4.2 WLAN ................................................................................................................................ 44 
4.3 Bluetooth ........................................................................................................................... 47 
5 RF Interface ................................................................................................................................ 49 
5.1 ANT_MAIN/ANT_DIV antenna interface ........................................................................... 49 
5.2 ANT_GNSS Interface ........................................................................................................ 51 
5.3 Antenna Assembling .......................................................................................................... 54 
6 GPIO .......................................................................................................................................... 55 
7 MUX Interfaces .......................................................................................................................... 56 
8 Other Interfaces ......................................................................................................................... 59 
8.1 GNSS_LNA_EN ................................................................................................................ 59 
8.2 ADC ................................................................................................................................... 59 
8.3 RING .................................................................................................................................. 59 
8.4 DTR ................................................................................................................................... 60 
8.5 USB_BOOT ....................................................................................................................... 62 
Electric Feature and Reliability ................................................................ 63 
1 Electric Features ........................................................................................................................ 63 

N75 Hardware User Guide

Contents

iii

4.2 Temperature Features ................................................................................................................ 65

4.3 ESD Protection ........................................................................................................................... 65

5 RF Features ............................................................................................. 66

5.1 Operating Bands ........................................................................................................................ 66

5.2 TX Power and RX Sensitivity ..................................................................................................... 67

5.3 GNSS Features .......................................................................................................................... 68

6 Mechanical Features ............................................................................... 70

6.1 Dimensions ................................................................................................................................. 70

6.2 Label ........................................................................................................................................... 71

6.3 Packing ....................................................................................................................................... 71

6.3.1 Reel&Tape ......................................................................................................................... 71

6.3.2 Moisture ............................................................................................................................. 73

7 Mounting N75 onto the Application Board ............................................... 74

7.1 Bottom Dimensions .................................................................................................................... 74

7.2 Application Foot Print ................................................................................................................. 75

7.3 Stencil ......................................................................................................................................... 75

7.4 Solder Paste ............................................................................................................................... 75

7.5 SMT Furnace Temperature Curve .............................................................................................. 76

8 Safety Recommendations ....................................................................... 77

Conformity and Compliance .................................................................... 78

A.1 Approvals ................................................................................................................................... 78

A.2 American Notice ......................................................................................................................... 78

A.2.1 Modify ................................................................................................................................ 78

A.2.2 FCC Class A Digital Device Notice ................................................................................... 78

A.2.3 FCC Class B Digital Device Notice ................................................................................... 79

Abbreviation ............................................................................................ 80

N75 Hardware User Guide

Table of Figures

iv

Table of Figures

Figure 1-1 Block Diagram .................................................................................................................. 2

Figure 2-1 N75 pin definition (Top View) ............................................................................................ 5

Figure 3-1 Current peaks and voltage drops (GSM/GPRS) ............................................................ 13

Figure 3-2 Recommended design 1 ................................................................................................. 13

Figure 3-3 Recommended design 2 ................................................................................................. 14

Figure 3-4 Recommended design 3 ................................................................................................. 15

Figure 3-5 Recommended design 4 ................................................................................................. 15

Figure 3-6 Reference design of startup controlled by button ........................................................... 18

Figure 3-7 Reference design of startup controlled by MCU ............................................................. 18

Figure 3-8 Reference design of automatic start once powered up .................................................. 18

Figure 3-9 N75 on/off timing ............................................................................................................. 20

Figure 3-10 Reset controlled by button ............................................................................................ 20

Figure 3-11 Reset circuit with transistor separating ......................................................................... 21

Figure 3-12 Reset timing of N75 ...................................................................................................... 21

Figure 3-13 USB connection ............................................................................................................ 22

Figure 3-14 Reference design of USB OTG function ....................................................................... 23

Figure 3-15 Reference design of USIM card interface ..................................................................... 24

Figure 3-16 Reference design of UART connection (with flow control) ........................................... 25

Figure 3-17 Reference design of UART connection (without flow control) ...................................... 26

Figure 3-18 Recommended level shifting circuit 1 ........................................................................... 26

Figure 3-19 Recommended level shifting circuit 2 ........................................................................... 27

Figure 3-20 Recommended level shifting circuit 3 ........................................................................... 27

Figure 3-21 SD connection .............................................................................................................. 29

Figure 3-22 SDC SDR timing ........................................................................................................... 30

Figure 3-23 SDC DDR timing ........................................................................................................... 30

Figure 3-24 I2S connection .............................................................................................................. 32

Figure 3-25 I2S timing ...................................................................................................................... 32

 
N75 Hardware User Guide 
Table  of  Figures 
 
Copyright © Neoway Technology Co., Ltd 
v 
 
Figure 3-26 PCM connection ........................................................................................................... 33 
Figure 3-27 PCM sync signal timing in primary mode ..................................................................... 34 
Figure 3-28 PCM data input timing in primary mode ....................................................................... 34 
Figure 3-29 PCM data output timing in primary mode ..................................................................... 34 
Figure 3-30 PCM sync signal timing in auxiliary mode .................................................................... 35 
Figure 3-31 PCM data input timing in auxiliary mode ...................................................................... 35 
Figure 3-32 PCM data output timing in auxiliary mode .................................................................... 35 
Figure 3-33 SPI connection .............................................................................................................. 37 
Figure 3-34 SPI timing ..................................................................................................................... 37 
Figure 3-35 I2C connection .............................................................................................................. 39 
Figure 3-36 I2C data transmission ................................................................................................... 39 
Figure 3-37 I2C timing ...................................................................................................................... 40 
Figure 3-38 SGMII connection ......................................................................................................... 42 
Figure 3-39 Connection between MDIO and PHY ........................................................................... 43 
Figure 3-40 MDIO input timing ......................................................................................................... 44 
Figure 3-41 MDIO output timing ....................................................................................................... 44 
Figure 3-42 WLAN connection ......................................................................................................... 45 
Figure 3-43 SDIO SDR timing .......................................................................................................... 46 
Figure 3-44 SDIO DDR timing .......................................................................................................... 46 
Figure 3-45 Bluetooth connection .................................................................................................... 48 
Figure 3-46 L network ...................................................................................................................... 49 
Figure 3-47 Split capacitor network.................................................................................................. 49 
Figure 3-48 Pi network ..................................................................................................................... 50 
Figure 3-49 Recommended RF PCB design 1 ................................................................................ 51 
Figure 3-50 GNSS RF structure ....................................................................................................... 51 
Figure 3-51 Reference Design of Passive GNSS Antenna .............................................................. 52 
Figure 3-52 Reference design of active GNSS antenna .................................................................. 53 
Figure 3-53 Reference layout of GNSS antenna traces .................................................................. 54 
Figure 3-54 Specifications of MM9329-2700RA1 ............................................................................ 55 
Figure 3-55 RF connections ............................................................................................................. 55 
Figure 3-56 Pulse wave for an incoming call ................................................................................... 59 

N75 Hardware User Guide

Table of Figures

vi

Figure 3-57 RING indicator for SMS ................................................................................................ 60

Figure 3-58 Process of entering sleep mode ................................................................................... 60

Figure 3-59 Incoming call service process ....................................................................................... 61

Figure 3-60 Outgoing call service process ....................................................................................... 61

Figure 3-61 Process of exiting from sleep mode ............................................................................. 61

Figure 3-62 Reference design of USB_BOOT ................................................................................. 62

Figure 6-1 N75 dimensions .............................................................................................................. 70

Figure 6-2 N75 label ......................................................................................................................... 71

Figure 7-1 Bottom view .................................................................................................................... 74

Figure 7-2 Recommended Application Foot Print (Top View) .......................................................... 75

Figure 7-3 SMT furnace temperature curve ..................................................................................... 76

N75 Hardware User Guide

Table of Tables

vii

Table of Tables

Table 1-1 Variant and frequency bands .............................................................................................. 1

Table 2-1 IO types and level features................................................................................................. 6

Table 2-2 Pin description .................................................................................................................... 7

Table 3-1 DVDD_1P8 electrical features ......................................................................................... 17

Table 3-2 Compliant standards of peripheral interfaces ................................................................... 21

Table 3-3 SD card feature parameters ............................................................................................. 28

Table 3-4 Timing parameters of SDC interface ................................................................................ 31

Table 3-5 Timing parameters of I2S interface .................................................................................. 33

Table 3-6 PCM work modes ............................................................................................................. 33

Table 3-7 Parameters of PCM timing in primary mode .................................................................... 34

Table 3-8 Parameters of PCM timing in auxiliary mode ................................................................... 36

Table 3-9 Timing parameters of SPI interface .................................................................................. 38

Table 3-10 I2C feature parameters .................................................................................................. 38

Table 3-11 I2C timing parameters (standard mode) ......................................................................... 40

Table 3-12 I2C timing parameters (fast mode) ................................................................................. 41

Table 3-13 I2C timing parameters (fast mode plus) ......................................................................... 41

Table 3-14 SDIO/WLAN feature parameters .................................................................................... 45

Table 3-15 Timing parameters of SDIO/WLAN interface ................................................................. 47

Table 3-16 MUX pins ........................................................................................................................ 56

Table 4-1 Electric features ................................................................................................................ 63

Table 4-2 Current consumption of N75 ............................................................................................ 63

Table 4-3 Temperature features ....................................................................................................... 65

Table 4-4 ESD protection features ................................................................................................... 65

Table 5-1 Operating Bands .............................................................................................................. 66

Table 5-2 RF TX power .................................................................................................................... 67

N75 Hardware User Guide

About This Document

viii

About This Document

Scope

This document is applicable to the N75 series.

It defines the features, indicators, and test standards of the N75 module and provides reference for the

hardware design of each interface.

Reference designs in this document are only for reference. Customers should design applications

based on actual scenarios and conditions. Please contact Neoway FAE if you have any questions or

doubts.

Audience

This document is intended for system engineers (SEs), development engineers, and test engineers.

Change History

Issue

Date

Change

Changed By

1.0

2015-09

Initial draft

Wang Qiang

1.1

2020-01

⚫ Deleted B14 from N75-NA and N75-A

⚫ Changed N75-E to N75-EA and change the

GSM/GPRS/EDGE band to 900/1800 MHz

⚫ Added N75-LA and N75-NF

⚫ Deleted N75-JP

⚫ Added the wireless rate of TDD-LTE in section 1.3

⚫ Changed the units of t(sync) and t(syncd) from ns to μs

in Table 3-7 and changed the units of t(auxsync),

t(auxsynca), and t(auxsyncd) from ns to μs in Table 3-8

⚫ Updated the RF features

Dong Liuting

N75 Hardware User Guide

About This Document

ix

Conventions

Symbol

Indication

This warning symbol means danger. You are in a situation that could cause fatal

device damage or even bodily damage.

Means reader be careful. In this situation, you might perform an action that could

result in module or product damages.

Means note or tips for readers to use the module

Category

Band

GNSS1

NA

North

America

Cat4

FDD-LTE: B2, B4, B5, B7, B12, B13, B25, B26, B66,

B71

UMTS: B2, B4, B5

GSM/GPRS/EDGE: 850/1900 MHz

support

NF

North

America

Cat4

FDD-LTE: B2, B4, B5, B7, B12, B13, B14, B25, B26,

B66, B71

UMTS: B2, B4, B5

GSM/GPRS/EDGE: 850/1900 MHz

Not

support

A

North

America

Cat4

FDD-LTE: B2, B4, B5, B12, B66

UMTS: B2, B4, B5

support

EA

European

Union

Cat4

FDD-LTE: B1, B3, B5, B7, B8, B20, B28

TDD-LTE: B38, B40

UMTS: B1, B5, B8

GSM/GPRS/EDGE: 900/1800 MHz

support

LA

Latin

America

Cat4

FDD-LTE: B1, B2, B3, B4, B5, B7, B8, B10, B28, B66

TDD-LTE: B38, B40, B41

UMTS: B1, B2, B4, B5, B8

GSM/GPRS/EDGE: 850/900/1800/1900 MHz

support

1

GNSS optional for some variants

N75 Hardware User Guide

Chapter 1 About N75

2

1.2 Block Diagram

N75 consists of the following functionality units:

⚫ Baseband

⚫ MCP

⚫ Power management unit

⚫ 19.2 MHz crystal oscillator

⚫ RF section

⚫ Digital interfaces (USIM, SPI, I2C, SGMII, SDIO, ADC, GPIO, UART, USB)

Figure 1-1 Block Diagram

VBAT

RF transceiver

19.2M

crystal

RF Front-end

(PA/ASW/DUP/SAW)

ANT_MAIN ANT_DIV ANT_GNSS

PWRKEY

RESET

MCP

NAND

LPDDR2

SDRAM

Base Band

MEMORY SUPPORT

RFFE I/F S

CONNECTIVITY

SPMI

VDDs

TRX

TRX&MIPI

Input PM

Output PM

Interfaces

ADC

PM_GPIOs

VBAT

UART

SPI

I2C

ADC

USB

SGMII

SDIO

UIM

GPIO

I2S/PCM

Power

Manager

VDDs for

MCP

VDDs

for PA/ASW

N75 Hardware User Guide

Chapter 1 About N75

3

1.3 Basic Features

Parameter

Description

Physical features

Dimensions: (30.0±0.1) mm × (28.0±0.1) mm × (2.8±0.2) mm

Package: 100-pin LGA

Weight: around 5.3g

Temperature

ranges

Operating: -35°C to +75°C

Extended: -40°C to +85°C

Storage: -45°C to +90°C

Operating voltage

VBAT: 3.3V to 4.3V, TYP: 3.8V

Current

Flight mode

1.24 mA

Sleep Mode

GSM DRX=6: 2.2 mA

GSM DRX=9: 1.45 mA

WCDMA DRX=2: 2.64 mA

WCDMA DRX=9: 1.54 mA

LTE (Paging Cycle 320 ms): 6.5 mA

LTE (Paging Cycle 2.56s): 1.67 mA

Active

VBAT: 2A Max

Processor

ARM Cortex-A7 processor, 1.3 GHz main frequency

Memory

ROM+RAM:

⚫ 2 Gb+1 Gb

⚫ 4 Gb+2 Gb

Operating bands

See Table 1-1.

Wireless rate

GPRS: Max 85.6 Kbps(DL) / Max 85.6 Kbps(UL)

EDGE: Max 236.8 Kbps(DL) / Max 236.8 Kbps(UL)

WCDMA: DC-HSPA+, Max 42 Mbps (DL)/Max 5.76 Mbps (UL)

FDD-LTE: non-CA cat4, Max 150 Mbps(DL)/Max 50 Mbps (UL)

TDD-LTE: non-CA cat4, Max 130 Mbps(DL)/Max 35 Mbps (UL)

Transmit power

GSM850: (33 dBm±2 dB) (Power Class 4)

PCS1900: (30 dBm±2 dB) (Power Class 1)

EDGE 850 MHz: (27 dBm±3 dB) (Power Class E2)

EDGE1900 MHz: (26 dBm±3 dB) (Power Class E2)

UMTS: (24 dBm+1/-3 dB) (Power Class 3)

LTE: (23 dBm±2 dB) (Power Class 3)

Application

interface

2G/3G/4G antenna interface, diversity antenna interface, GNSS antenna

interface

50Ω impedance

Two UART interfaces: one is an ordinary serial port, and one is used for

Bluetooth by default

N75 Hardware User Guide

Chapter 1 About N75

4

One I2C interface, supporting only master mode

One SPI interface, supporting only master mode and max. 50 MHz

One USIM interface, 1.8V/3.0V

One USB2.0 interface, OTG function requires external 5V DC-DC

Two 15-bit ADC interfaces, detectable voltage ranging from 0.1 to 1.7V

One I2S/PCM interface used to connect to CODEC chipset

One SDIO interface, used for WLAN

One SGMII/MDIO interface, used for Ethernet

Four GPIO interfaces

AT command

Neoway extended commands

Data

PPP, RNDIS, ECM, RMNET

Protocol

TCP, UDP, MQTT, FTP/FTPS, HTTP/HTTP(S), SSL, TLS

Certification

approval

FCC, PTCRB, AT&T, CE-R*, GCF, RoHS*, NCC*, RCM*

N75 Hardware User Guide

Chapter 2 Module Pins

5

2 Module Pins

There are 100 pins on N75 and their pads are introduced in the LGA package.

2.1 Pad Layout

Figure 2-1 shows the pad layout of the N75 module.

Figure 2-1 N75 pin definition (Top View)

N75 Hardware User Guide

Chapter 2 Module Pins

6

2.2 Pin Description

Table 3-1 lists the definition of IO types

Table 2-1 IO types and level features

IO Type

B

Digital input/output, COMS logic level

DO

Digital output, COMS logic level

DI

Digital input, COMS logic level

PO

Power output

PI

Power supply input

AI

Analog input

AIO

Analog input/output

OD

Open drain

Level Feature

I/O

Pin type

Voltage Feature

Current Feature

P1

USIM1 interface voltage,

compatible with 1.8V/3.0V

1.8V

VIH=1.26V~2.1V

VIL=-0.3V~0.36V

VOH=1.44V~1.8V

VOL=0V~0.4V

3.0V

VIH=2V~3.15V,

VIL=-0.3V~0.57V

VOH=2.28V~2.85V

VOL=0V~0.4V

2 mA to 16 mA,

adjustable at a

spacing of 2 mA

P2

USIM2 and MDIO interface

voltage, compatible with

1.8V/3.0V

1.8V

VIH=1.26V~2.1V

VIL=-0.3V~0.36V

VOH=1.44V~1.8V

VOL=0V~0.4V

3.0V

VIH=2V~3.15V,

VIL=-0.3V~0.57V

VOH=2.28V~2.85V

VOL=0V~0.4V

P3

1.8V digital IO voltage

VIH min=1.2V, VIL max= 0.3V

VOH min=1.35V, VOL max= 0.45V

P4

SDC interface voltage,

compatible with 1.8V/3.0V

1.8V:

VIH=1.27V~2V,

VIL= -0.3V~0.58V

VOH=1.4V~1.8V,

VOL=0V~0.45V

3.0V:

VIH=1.8V~3.15V,

VIL= -0.3V~0.7V

VOH=2.1V~2.85V,

VOL=0V~0.36V

P7

GPIO of PM chipset can be

divided into three types: 1.2V,

1.8V, and VBAT. They are

used for output because their

IO cannot adapt automatically.

VIH=0.65*VIO~(VIO+0.3V),

VIL=-0.3V~0.35*VIO

VOH=(VIO-0.45)V~VIO

VOL=0V~0.45V

(VIO is GPIO voltage, 1.2V/1.8V/VBAT)

When VIO is 1.8V

High: 0.9 mA

Medium: 0.6 mA

Low: 0.15 mA

N75 Hardware User Guide

Chapter 2 Module Pins

7

P8

Level of GPIO for power

management chipset, fixed to

1.8V

VIH=1.26V~2.1V

VIL=-0.3V~0.63V

VOH=1.35V~1.8V

VOL=0V~0.45V

High: 0.9 mA

Medium: 0.6 mA

Low: 0.15 mA

Table 2-2 Pin description

Signal

I/O

Function

Level

Feature

Remarks

Power Interface

VBAT

27, 28,

29

PI

Main power supply input

Vmax=4.3V

Supply at most 2A

DVDD_1P8

45

PO

1.8V power output

Vnorm=1.8V

Imax=50 mA

Used only for level

shifting.

Leave this pin floating

if it is not used.

DVDD_XO_1P8

53

PO

1.8V power output

Vnorm=1.8V

Imax=20 mA

Used to pull up the

crystal oscillator of

the external WLAN

module

Leave this pin floating

if it is not used.

GND

1, 14, 17, 20, 26,

30, 31, 44, 49, 74,

75, 77, 91, 93, 95,

97, 98, 99, 100

Ground

Connect all GND pins

to the ground plane.

Control Interfaces

RESET_N

32

DI

Module reset input

P3

Triggered by a low

level to reset the

module.

PWRKEY_N

33

DI

ON/OFF button

(recommended)

P3

Triggered by a low

level

Embedded with diode

switch and a 200 kΩ

pull-up resistor

Around 0.8V when

the pin is floating

UART Interface

UART5_TXD

46

DO

UART5 data transmitting

P3

Used for data

transmission. Leave

them floating if they

UART5_RXD

47

DI

UART5 data receiving

P3

N75 Hardware User Guide

Chapter 2 Module Pins

8

are not used.

USIM interface

USIM1_VCC

35

PO

USIM1 power output

P1 Imax=50

mA

The module is

compatible with 1.8V

and 3.0V USIM cards.

Connect DATA pin to

USIM_VCC through a

10 kΩ pull-up resistor.

Leave them floating if

they are not used.

USIM1_DATA

36

IO

USIM data IO

P1

USIM1_CLK

37

DO

USIM1 clock output

P1

USIM1_RESET

38

DO

USIM1 reset

P1

USIM1_DET

39

DI

USIM1 detect

P3

USB interface

VBUS

40

PI

Charging voltage check

3.3V to 5.2V,

TYP: 5V

In compliance with

USB2.0 protocol

Used for firmware

download and data

transmission.

USB_DM

41

AIO

USB data minus

USB_DP

42

AIO

USB data plus

USB_ID

43

AI

OTG detect

Leave this pin floating

if it is not used.

ADC interface

ADC2

88

AI

Analog-to-digital signal

conversion

Vmax=1.7V;

Vmin=0.1V

15-bit, detectable

voltage ranging from

0.1V to 1.7V

Leave this pin floating

if it is not used.

ADC1

89

AI

Analog-to-digital signal

conversion

Vmax=1.7V;

Vmin=0.1V

15-bit, detectable

voltage ranging from

0.1V to 1.7V

Leave this pin floating

if it is not used.

SGMII interface

SGMII_TX_N

15

AO

SGMII transmit minus

Leave this pin floating

if it is not used.

SGMII_TX_P

16

AO

SGMII transmit plus

SGMII_RX_N

18

AI

SGMII receive minus

SGMII_RX_P

19

AI

SGMII receive plus

MDIO Control Interfaces

SGMII_VCC

21

PO

USIM2 power output

P2

For MDIO data line to

be connected through

a pull-up resistor

SGMII_MDIO_CLK

22

DO

SGMII clock output

P2

Multiplexed as USIM2

N75 Hardware User Guide

Chapter 2 Module Pins

9

SGMII_MDIO_DATA

23

B

SGMII data IO

P2

Leave them floating if

they are not used.

ETH_REST_N

24

DO

Ethernet PHY reset

P2

ETH_INT_N

25

DI

Ethernet PHY interrupt

P2

I2C interface

I2C_4_SDA

81

OD

I2C data signal

P3

It is connected

through a 2.2 kΩ

internal pull-up

resistor.

Leave this pin floating

if it is not used.

I2C_4_SCL

82

OD

I2C clock

P3

I2S/PCM interface

I2S_1_SCLK

9

DO

I2S serial clock

P3

Multiplexed as PCM

Leave this pin floating

if it is not used.

I2S_1_DOUT

10

DO

I2S data transmit

P3

I2S_1_DIN

11

DI

I2S data receive

P3

I2S_1_WS

12

B

I2S word select

P3

I2S_MCLK

64

DO

I2S main clock

P3

12.288 MHz by

default

WLAN interface

WLAN_SDIO_CMD

54

B

SDIO data IO

P3

Leave this pin floating

if it is not used.

WLAN_SDIO_CLK

55

DO

SDIO clock

P3

Leave this pin floating

if it is not used.

WLAN_SDIO_DATA_0

56

B

SDIO data0 IO

P3

Leave this pin floating

if it is not used.

WLAN_SDIO_DATA_1

57

B

SDIO data1 IO

P3

Leave this pin floating

if it is not used.

WLAN_SDIO_DATA_2

58

B

SDIO data2 IO

P3

Leave this pin floating

if it is not used.

WLAN_SDIO_DATA_3

59

B

SDIO data3 IO

P3

Leave this pin floating

if it is not used.

WAKE_ON_WIRELESS

60

DO

WLAN wakeup

P3

Leave this pin floating

if it is not used.

WLAN_SLEEP_CLK

61

DO

Wi-Fi sleep clock

P8

Leave this pin floating

if it is not used.

WLAN_EN

62

DO

WLAN enable signal

P3

Leave this pin floating

if it is not used.

WLAN_PWR_EN

63

DO

Control of WLAN

P8

Leave this pin floating

N75 Hardware User Guide

Chapter 2 Module Pins

10

external power

if it is not used.

WCI_LTE_RXD/USB_B

OOT

48

DI

LTE/WLAN co-exist

UART data

receive/forcible

download mode control

P3

Do not pull this pin

high during the

startup of the module.

Otherwise, the

module enters

USB_BOOT mode.

WCI_LTE_TXD

50

DO

LTE/WLAN co-exist

UART data transmit

P3

Leave this pin floating

if it is not used.

BT interface

BT_UART_TXD

69

DO

Data TX of Bluetooth

UART

P3

Used for Bluetooth

data transmission.

Leave them floating if

they are not used.

BT_UART_RXD

70

DI

Data RX of Bluetooth

UART

P3

BT_UART_CTS

71

DI

Clear to send

P3

BT_UART_RTS

72

DO

Request to send

P3

BT_EN

73

DO

Bluetooth enable

P8

BT_WAKEUP_HOST

51

DI

Bluetooth wakeup host

P3

Leave this pin floating

if it is not used.

BT_WAKEUP_SLAVE

52

DO

Bluetooth wakeup slave

P3

Leave this pin floating

if it is not used.

BT_PWR_EN

78

DO

Control of Bluetooth

external power

P3

Leave this pin floating

if it is not used.

SDC interface

SDC_PWR_EN

2

DO

Control of SDC external

power

P7

Dedicated SD card

interface.

Leave them floating if

they are not used.

SDC_DATA2

3

B

SDC data2 IO

P4

SDC_DATA3

4

B

SDC data3 IO

P4

SDC_CMD

5

B

SDC command

P4

SDC_CLK

6

DO

SDC clock output

P4

SDC_DATA0

7

B

SDC data0 IO

P4

SDC_DATA1

8

B

SDC data1 IO

P4

SDC_DET

96

DI

SD card detect

P3

Leave this pin floating

if it is not used.

SPI interface

SPI_CLK_BLSP2

84

DO

Clock signal

P3

Used only in host

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