Altera Corporation iii
Preliminary
Contents
About this Manual
Revision History ......................................................................................................................................... v
How to Contact Altera ............................................................................................................................... v
Typographic Conventions....................................................................................................................... vi
Chapter 1. Overview
Introduction............................................................................................................................................. 1-1
General Description................................................................................................................................ 1-1
Board Component Blocks................................................................................................................. 1-2
Block Diagram ................................................................................................................................... 1-4
Handling the Board........................................................................................................................... 1-4
Chapter 2. Board Components
Introduction............................................................................................................................................. 2-1
Board Overview...................................................................................................................................... 2-1
Featured FPGA (U20)............................................................................................................................. 2-5
I/O and Clocking Resources ........................................................................................................... 2-6
MAX II CPLD .......................................................................................................................................... 2-7
Configuration, Status, and Setup Elements ...................................................................................... 2-17
Configuration................................................................................................................................... 2-17
FPGA Programming Over USB ............................................................................................... 2-17
FPGA Programming from Flash Memory.............................................................................. 2-19
Flash Programming over USB Interface ................................................................................. 2-19
Status Elements................................................................................................................................ 2-20
Board Specific LEDs .................................................................................................................. 2-20
Power Display ............................................................................................................................ 2-21
Setup Elements ................................................................................................................................ 2-21
JTAG Control DIP Switch ......................................................................................................... 2-22
MAX II Device Control DIP Switch......................................................................................... 2-22
System Reset & Configuration Switches ................................................................................ 2-23
POWER SELECT Rotary Switch .............................................................................................. 2-24
PGM CONFIG SELECT Rotary Switch................................................................................... 2-25
Speaker Header (J5) ................................................................................................................... 2-26
Clocking Circuitry ................................................................................................................................ 2-26
Cyclone III FPGA Clock Inputs..................................................................................................... 2-26
Cyclone III FPGA Clock Outputs.................................................................................................. 2-27
Oscillators......................................................................................................................................... 2-30
General User Interfaces........................................................................................................................ 2-30
User-Defined Push Button Switches............................................................................................. 2-30
User-Defined DIP Switches ........................................................................................................... 2-31
User-Defined LEDs ......................................................................................................................... 2-32