Vishay IRF9510 is a P-Channel MOSFET designed to provide the best combination of fast switching, ruggedized device design, low on-resistance, cost-effectiveness, and dynamic dV/dt rating. It features a maximum drain-source voltage of -100 V, a typical on-resistance of 8.7 Ω, a maximum continuous drain current of -16 A at 25 °C, and a repetitive avalanche energy rating of 200 mJ. It also offers fast switching speeds, ease of paralleling, simple drive requirements, and is RoHS-compliant and halogen-free.
Vishay IRF9510 is a P-Channel MOSFET designed to provide the best combination of fast switching, ruggedized device design, low on-resistance, cost-effectiveness, and dynamic dV/dt rating. It features a maximum drain-source voltage of -100 V, a typical on-resistance of 8.7 Ω, a maximum continuous drain current of -16 A at 25 °C, and a repetitive avalanche energy rating of 200 mJ. It also offers fast switching speeds, ease of paralleling, simple drive requirements, and is RoHS-compliant and halogen-free.
IRF9510
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S21-0852-Rev. C, 16-Aug-2021 1Document Number: 91072
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Power MOSFET
FEATURES
• Dynamic dV/dt rating
• Repetitive avalanche rated
•P-channel
• 175 °C operating temperature
• Fast switching
• Ease of paralleling
• Simple drive requirements
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
Note
*
This datasheet provides information about parts that are
RoHS-compliant and / or parts that are non RoHS-compliant. For
example, parts with lead (Pb) terminations are not RoHS-compliant.
Please see the information / tables in this datasheet for details
DESCRIPTION
Third generation power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
The TO-220AB package is universally preferred for all
commercial-industrial applications at power dissipation
levels to approximately 50 W. The low thermal resistance
and low package cost of the TO-220AB contribute to its
wide acceptance throughout the industry.
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
b. VDD = -25 V, starting TJ = 25 °C, L = 18 mH, Rg = 25 Ω, IAS = -4.0 A (see fig. 12)
c. ISD ≤ -4.0 A, dI/dt ≤ 75 A/μs, VDD ≤ VDS, TJ ≤ 175 °C
d. 1.6 mm from case
PRODUCT SUMMARY
VDS (V) -100
RDS(on) (Ω)V
GS = -10 V 1.2
Qg max. (nC) 8.7
Qgs (nC) 2.2
Qgd (nC) 4.1
Configuration Single
S
G
D
P-Channel MOSFET
TO-220AB
GD
S
Available
Available
ORDERING INFORMATION
Package TO-220AB
Lead (Pb)-free IRF9510PbF
Lead (Pb)-free and halogen-free IRF9510PbF-BE3
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER SYMBOL LIMIT UNIT
Drain-source voltage VDS -100 V
Gate-source voltage VGS ± 20
Continuous drain current VGS at 10 V TC = 25 °C ID
-4.0
ATC = 100 °C -2.8
Pulsed drain current a IDM -16
Linear derating factor 0.29 W/°C
Single pulse avalanche energy bEAS 200 mJ
Repetitive avalanche current a IAR -4.0 A
Repetitive avalanche energy aEAR 4.3 mJ
Maximum power dissipation TC = 25 °C PD43 W
Peak diode recovery dV/dt cdV/dt -5.5 V/ns
Operating junction and storage temperature range TJ, Tstg -55 to +175 °C
Soldering recommendations (peak temperature) dFor 10 s 300
Mounting torque 6-32 or M3 screw 10 lbf · in
1.1 N · m
IRF9510
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Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
b. Pulse width ≤ 300 μs; duty cycle ≤ 2 %
THERMAL RESISTANCE RATINGS
PARAMETER SYMBOL TYP. MAX. UNIT
Maximum junction-to-ambient RthJA -62
°C/WCase-to-sink, flat, greased surface RthCS 0.50 -
Maximum junction-to-case (drain) RthJC -3.5
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Static
Drain-source breakdown voltage VDS VGS = 0 V, ID = -250 μA -100 - - V
VDS temperature coefficient ΔVDS/TJ Reference to 25 °C, ID = -1 mA - - 0.091 - V/°C
Gate-source threshold voltage VGS(th) VDS = VGS, ID = -250 μA -2.0 - -4.0 V
Gate-source leakage IGSS V
GS = ± 20 V - - ± 100 nA
Zero gate voltage drain current IDSS
VDS = -100 V, VGS = 0 V - - -100 μA
VDS = -80 V, VGS = 0 V, TJ = 150 °C - - -500
Drain-source on-state resistance RDS(on) V
GS = -10 V ID = -2.4 A b --1.2Ω
Forward transconductance gfs VDS = -50 V, ID = -2.4 A b 1.0 - - S
Dynamic
Input capacitance Ciss VGS = 0 V,
VDS = -25 V,
f = 1.0 MHz, see fig. 5
- 200 -
pFOutput capacitance Coss -94-
Reverse transfer capacitance Crss -18-
Total gate charge Qg
VGS = -10 V ID = -4.0 A, VDS = -80 V,
see fig. 6 and 13 b
--8.7
nC Gate-source charge Qgs --2.2
Gate-drain charge Qgd --4.1
Turn-on delay time td(on)
VDD = -50 V, ID = -4.0 A,
Rg = 24 Ω, RD = 11 Ω, see fig. 10 b
-10-
ns
Rise time tr -27-
Turn-off delay time td(off) -15-
Fall time tf -17-
Gate input resistance Rgf = 1 MHz, open drain 1.5 - 7.9 Ω
Internal drain inductance LD
Between lead,
6 mm (0.25") from
package and center of
die contact
-4.5-
nH
Internal source inductance LS-7.5-
Drain-Source Body Diode Characteristics
Continuous source-drain diode current ISMOSFET symbol
showing the
integral reverse
p - n junction diode
---4.0
A
Pulsed diode forward current aISM ---16
Body diode voltage VSD TJ = 25 °C, IS = -4.0 A, VGS = 0 V b ---5.5V
Body diode reverse recovery time trr TJ = 25 °C, IF = -4.0 A, dI/dt = 100 A/μsb- 82 160 ns
Body diode reverse recovery charge Qrr - 0.15 0.30 μC
Forward turn-on time ton Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
D
S
G
S
D
G
IRF9510
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TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Fig. 1 - Typical Output Characteristics, TC = 25 °C
Fig. 2 - Typical Output Characteristics, TC = 175 °C
Fig. 3 - Typical Transfer Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
- VDS, Drain-to-Source Voltage (V)
- ID, Drain Current (A)
91072_01
20 µs Pulse Width
TC = 25 °C
- 4.5 V
100101
101
100
Bottom
To p
VGS
- 15 V
- 10 V
- 8.0 V
- 7.0 V
- 6.0 V
- 5.5 V
- 5.0 V
- 4.5 V
- V
DS,
Drain-to-Source Voltage (V)
- I
D
, Drain Current (A)
101
100
100101
20 µs Pulse Width
TC = 175 °C
91072_02
- 4.5 V
Bottom
To p
VGS
- 15 V
- 10 V
- 8.0 V
- 7.0 V
- 6.0 V
- 5.5 V
- 5.0 V
- 4.5 V
- V
GS,
Gate-to-Source Voltage (V)
- I
D
, Drain Current (A)
20 µs Pulse Width
VDS = - 50 V
101
100
5678910
4
25 °C
175 °C
91072_03
I
D
= - 4.0 A
V
GS
= - 10 V
3.0
0.0
0.5
1.0
1.5
2.0
2.5
TJ, Junction Temperature (°C)
RDS(on), Drain-to-Source On Resistance
(Normalized)
91072_04
- 60- 40 - 20 0 20 40 60 80 100 120140 160 180
350
280
210
140
0
70
100101
Capacitance (pF)
- V
DS,
Drain-to-Source Voltage (V)
Ciss
Crss
Coss
VGS = 0 V, f = 1 MHz
Ciss = Cgs + Cgd, Cds Shorted
Crss = Cgd
Coss = Cds + Cgd
91072_05
Q
G
, Total Gate Charge (nC)
- V
GS
, Gate-to-Source Voltage (V)
20
16
12
8
0
4
0210
86
4
V
DS
= - 20 V
V
DS
= - 50 V
For test circuit
see figure 13
V
DS
= - 80 V
91072_06
I
D
= - 4.0 A
IRF9510
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Fig. 7 - Typical Source-Drain Diode Forward Voltage
Fig. 8 - Maximum Safe Operating Area
Fig. 9 - Maximum Drain Current vs. Case Temperature
Fig. 10a - Switching Time Test Circuit
Fig. 10b - Switching Time Waveforms
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
101
100
- V
SD
, Source-to-Drain Voltage (V)
- I
SD
, Reverse Drain Current (A)
1.0 5.0
4.03.0
2.0
25 °C
175 °C
V
GS
= 0 V
91072_07
10-1
100 µs
1 ms
10 ms
Operation in this area limited
by RDS(on)
- V
DS
, Drain-to-Source Voltage (V)
- I
D
, Drain Current (A)
TC = 25 °C
TJ = 175 °C
Single Pulse
10-2
102
0.1
2
5
0.1
2
5
1
2
5
10
2
5
25
125
10 25
10225
103
91072_08
150
- I
D
, Drain Current (A)
T
C
, Case Temperature (°C)
25
91072_09
1251007550
0.0
1.0
2.0
3.0
4.0
175
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
R
D
V
GS
R
G
D.U.T.
- 10 V
+
-
V
DS
V
DD
VGS
10 %
90 %
VDS
td(on) trtd(off) tf
10
1
0.1
10-2
10-5 10-4 10-3 10-2 0.1 1 10
PDM
t1
t2
t1, Rectangular Pulse Duration (s)
Thermal Response (ZthJC)
Notes:
1. Duty Factor, D = t1/t2
2. Peak Tj = PDM x ZthJC + TC
Single Pulse
(Thermal Response)
0.2
0.05
0.02
0.01
91072_11
0.1
D = 0.5
IRF9510
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Fig. 12a - Unclamped Inductive Test Circuit
Fig. 12b - Unclamped Inductive Waveforms
Fig. 12 c- Maximum Avalanche Energy vs. Drain Current
Fig. 13a - Basic Gate Charge Waveform
Fig. 13b - Gate Charge Test Circuit
R
G
I
AS
0.01 Ω
t
p
D.U.T
L
V
DS
+
-V
DD
- 10 V
Vary tp to obtain
required IAS
IAS
VDS
VDD
VDS
tp
25 150
125
10075
50
700
0
200
300
400
500
600
Starting TJ, Junction Temperature (°C)
EAS, Single Pulse Energy (mJ)
Bottom
To p
ID
- 1.6 A
- 2.8 A
- 4.0 A
VDD = - 25 V
91072_12c
100
175
QGS QGD
QG
VG
Charge
- 10 V
D.U.T.
- 3 mA
VGS
VDS
IGID
0.3 µF
0.2 µF
50 kΩ
12 V
Current regulator
Current sampling resistors
Same type as D.U.T.
+
-
IRF9510
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S21-0852-Rev. C, 16-Aug-2021 6Document Number: 91072
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
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Fig. 14 - For P-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91072.
P.W. Period
dI/dt
Diode recovery
dV/dt
Body diode forward drop
Body diode forward
current
Driver gate drive
Inductor current
D = P.W.
Period
+
-
-
-
-
+
+
+
Peak Diode Recovery dV/dt Test Circuit
• dV/dt controlled by Rg
• D.U.T. - device under test
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
Rg
• Compliment N-Channel of D.U.T. for driver
VDD
• ISD controlled by duty factor “D”
Note
Note
a. VGS = - 5 V for logic level and - 3 V drive devices
VGS = - 10 Va
D.U.T. lSD waveform
D.U.T. VDS waveform
VDD
Re-applied
voltage
Ripple ≤ 5 % ISD
Reverse
recovery
current
Package Information
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Revison: 04-Nov-2021 1Document Number: 66542
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
TO-220-1
Note
• M* = 0.052 inches to 0.064 inches (dimension including protrusion), heatsink hole for HVM
DIM. MILLIMETERS INCHES
MIN. MAX. MIN. MAX.
A 4.24 4.65 0.167 0.183
b 0.69 1.02 0.027 0.040
b(1) 1.14 1.78 0.045 0.070
c 0.36 0.61 0.014 0.024
D 14.33 15.85 0.564 0.624
E 9.96 10.52 0.392 0.414
e 2.41 2.67 0.095 0.105
e(1) 4.88 5.28 0.192 0.208
F 1.14 1.40 0.045 0.055
H(1) 6.10 6.71 0.240 0.264
J(1) 2.41 2.92 0.095 0.115
L 13.36 14.40 0.526 0.567
L(1) 3.33 4.04 0.131 0.159
Ø P 3.53 3.94 0.139 0.155
Q 2.54 3.00 0.100 0.118
ECN: E21-0621-Rev. D, 04-Nov-2021
DWG: 6031
M
*
3
2
1
L
L(1)
D
H(1)
Q
Ø P
A
F
J(1)
b(1)
e(1)
e
E
b
C
Legal Disclaimer Notice
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Revision: 09-Jul-2021 1Document Number: 91000
Disclaimer
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© 2021 VISHAY INTERTECHNOLOGY, INC. ALL RIGHTS RESERVED
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Vishay IRF9510 is a P-Channel MOSFET designed to provide the best combination of fast switching, ruggedized device design, low on-resistance, cost-effectiveness, and dynamic dV/dt rating. It features a maximum drain-source voltage of -100 V, a typical on-resistance of 8.7 Ω, a maximum continuous drain current of -16 A at 25 °C, and a repetitive avalanche energy rating of 200 mJ. It also offers fast switching speeds, ease of paralleling, simple drive requirements, and is RoHS-compliant and halogen-free.
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