WinSystems PCM-CTC User manual

OP ERA TIONS MAN UAL

PCM- CTC

Win Sys tems® re serves the right to make changes in the cir cuitry

and speci fi ca tions at any time with out no tice.

©Copy right 1994 by Win Sys tems. All Rights Re served.

RE VI SION HIS TORY

P/N 403- 0198- 000

ECO Num ber Date Code Rev Level

Origi nated 940217 B

99-52 990430 B1

WinSystems - "The Embedded Systems Authority"

TABLE OF CONTENTS

Section Paragraph Title Page

Visual Index

Section 1 General Information 1-1

Features 1-1

General Description 1-1

Specifications 1-1

Section 2 PCM-CTC Technical Reference 2-1

Introduction 2-1

I/O Address Selection 2-1

Interrupt Routing Selection 2-2

External Connections 2-4

Connection/Jumper Summary 2-5

Appendix A Datasheet Reprints

8254 Datasheet

8259 Datasheet

Appendix B PCM-CTC Schematic Diagram

Warranty and Repair Information

Visual Index – Quick Reference

For the convenience of the user, a copy of the Visual Index has been provided with direct links to

connector and jumper configuration data.

J1

I/O Connector

Channels 0-3

J2

I/O Connector

Channels 4-5

J3

Wire- wrap Header

Channels 0-3

J5

Wire-wrap Header

Channels 4-5

J4

+5V enable to J1

J6

Routing Header

Channels 0-2

J7

Routing Header

Channels 3-5

J8

I/O Address

Selection

J10

Interrupt Routing

Header

J11

Bus Clock Source

Selection

990430 OPERATIONS MANUAL PCM-CTC

i

1 GENERAL INFORMATION

1.1 FEATURES

n Six in de pend ent 16- Bit Counter/Tim ers

n Full in put/out put buff er ing for all Clock, Gate and out put sig nals

n Jumper se lecta ble daisy- chaining for cas cad ing counts

n Util izes in dus try stan dard 8254 tim ers

n Counts fre quen cies up to 8Mhz

n On board 8259 pro vides in ter rupt iden ti fi ca tion

n Aux il iary In ter rupt in puts

n PC/104 stack through de sign

n Jumper se lecta ble I/O ad dress

n +5 Volt only op era tion

n Mul ti ple in ter nal or ex ter nal clock se lec tion

1.2 General Description

The PCM- CTC card is de signed to solve the com mon tim ing prob lems in in dus trial sys tems de s ign.

Six in de pend ent 16- bit chan nels are ca pa ble of fre quency/event count ing from DC to 8MHz, p ulse

marker or square- wave gen era tion, time in ter val meas ure ments, and one- shot simu la tion. Al l six

chan nels have a buff ered clock, Gate and out put avail able. Jumper se lecta ble rout ing head er s al low

source se lec tion and cas cad ing to pro vide maxi mum flexi bil ity.

1.3 SPECIFICATIONS

1.3.1 Electrical

Bus In ter face : PC/104 8- Bit stack through

Power Re quire ments: +5V +/-5% at 40 mA typi cal

1.3.2 Mechanical

Di men sions : 3.6 X 3.8 X 0.6"

PC Board : FR4 Ep oxy glass with 2 sig nal lay ers with screened com po nent

leg end and plated through holes.

Jump ers : 0.025" square posts on 0.10" cen ters.

990430 OPERATIONS MANUAL PCM-CTC Page 1-1

Con nec tors : J1 I/O - RN type IDH- 26- LP

J2 I/O - RN type IDH- 8- LP

1.3.3 Environmental

Op er at ing Tem pera ture : -40° to 85° C

Non- Condensing Hu mid ity : 5% to 95%

Page 1-2 OPERATIONS MANUAL PCM-CTC 990430

WinSystems - "The Embedded Systems Authority"

2 PCM-CTC Technical Reference

2.1 Introduction

This sec tion of the man ual is in tended to pro vide suf fi cient in for ma tion for the con figu ra tion,

in stal la tion, and pro gram ming of the PCM- CTC mod ule. for an swers to ques tions not ade qua tely

cov ered in this sec tion, con tact the Win Sys tems Tech ni cal Sup port group via tele phone at ( 817) 274-

7553, via FAX at (817) 548- 1358 or through the sup port BBS at (817) 861- 8739. Ap pen di ces C a nd D

pro vide tech ni cal da tasheet re prints on the 8254 coun ter timer chips and the 8259 In ter rupt con trol ler

IC. Ref er to these docu ments for de tailed pro gram ming, and reg is ter map ping in for ma tion.

The PCM- CTC is a multi- purpose coun ter/timer mod ule al low ing event count ing, pre ci sion tim ing

in ter vals and a va ri ety of hard ware and soft ware con trolled modes of op era tion. Six 16- Bi t coun ter

chan nels are ter mi nated at two I/O con nec tors. Each chan nel may use an in de pend ent ex ter nal clock

source or any chan nel may use one of two on board clock sources. The gates for each timer are ex t er nally

avail able and may be con trolled from ex ter nal hard ware or from the out put of an other chan ne l. All of

the coun ter out puts are avail able as ex ter nal buff ered out puts and may also serve as in ter rupt sources

when en abled with the on board 8259 in ter rupt con trol ler. Two aux il iary in ter rupt in put p ins are also

avail able.

2.2 I/O Address Select

990430 OPERATIONS MANUAL PCM-CTC Page 2-1

1 o o 2

3 o o 4

5 o o 6

J8

I/O Address Select

Jumper J8

The Base ad dress of the PCM- CTC is set via user instal la ble jump ers on J8. The ta ble

be low shows the J8 jump er ing and the I/O ad dresses of the on- board de vices.

2.3

Interrupt Routing Select

All of the coun ter/timer out put pins as well as 2 aux il iary in put pins are routed to the

on- board 8259 in ter rupt con trol ler. The in ter rupt out put from the 8259 is then routed to a

user con figu ra tion block at J10 al low ing se lec tion of any of 6 PC/104 in ter rupt pins to ca rry

the in ter rupt to the proc es sor. The pic to rial on the fol low ing il lus trates the in ter rup t

rout ing.

Page 2-2 OPERATIONS MANUAL PCM-CTC 990430

WinSystems - "The Embedded Systems Authority"

J8

Jump er ing

CH0- CH2

Counter/Timer

Ad dress

CH3- CH5

Counter/Timer

Ad dress

In ter rupt

Con trol ler

Ad dress

IN TAK

I/O Port

Ad dress

1-2, 3-4, 5-6 100H 104H 108H 10CH

3-4, 5-6 110H 114H 118H 11CH

1-2, 5-6 120H 124H 128H 12CH

5-6 130H 134H 138H 13CH

1-2, 3-4 140H 144H 148H 14CH

3-4 150H 154H 158H 15CH

1-2 160H 164H 168H 16CH

none 170H 174H 178H 17CH

2 4 6 8 10 12

o o o o o o

1 3 5 7 9 11

J10

2.3.1 Interrupt usage

Due to the limi ta tions of the PC/104 bus which does not al low for slaved in ter rupt con trol le rs on the

bus, a spe cial tech nique is re quired to util ize the on board in ter rupt con trol ler and to ob tain a unique

vec tor cor re spond ing to the source of the in ter rupt. The fol low ing steps il lus trate how t o over come this

short com ing us ing the spe cial ca pa bili ties of the PCM- CTC

1. Ini tial ize the in ter rupt con trol ler on board the PCM- CTC as if it were a mas ter con trol ler. Pro gram the base vec tor

number as 0.

The fol low ing ini tiali za tion pseudo- code dem on strates the con trol ler setup.

out PIC_BASE,13H ; Edge trig gered, sin gle mode

out PIC_BASE+1,0 ; Base vec tor of 0

out PIC_BASE+1,0dh ; Buff ered mode mas ter

out PIC_BASE,+1,0ffh ; Mask all in ter rupts

2. In stall the in ter rupt serv ice rou tine for the main in ter rupt con trol ler to serv ice PCM - CTC re quests at the ap pro -

pri ate vec tor de pend ing on the rout ing of J10.

3. Un mask the in ter rupt at the main in ter rupt con trol ler to which the PCM- CTC's in ter rupt is routed.

4. Pro gram the PCM- CTC coun ter/tim ers for the de sired mode(s) of op era tion.

5. Un mask the de sired in ter rupt in puts to the PCM- CTC's in ter rupt con trol ler.

6. When an in ter rupt oc curs the in ter rupt serv ice rou tine is sues two reads from the IN TAK I/O port. The first value

read is ig nored. The sec ond value read will be the in ter rupt number on the PCM- CTC re quir ing serv ice ,a jump to the

ap pro pri ate han dler can be cal cu lated us ing this value.

7. Bef ore ex it ing the in ter rupt serv ice rou tine is sue the EOI (End of in ter rupt) com mand to both in ter rupt con trol -

lers.

990430 OPERATIONS MANUAL PCM-CTC Page 2-3

WinSystems - "The Embedded Systems Authority"

IRQ0

IRQ1

IRQ2

IRQ3

IRQ4

IRQ5

IRQ6

IRQ7

Interrupt

CH0 OUT

CH1 OUT

CH2 OUT

CH3 OUT

CH4 OUT

CH5 OUT

1 o o 2

3 o o 4

5 o o 6

7 o o 8

9 o o 10

11 o o 12

IRQ2

IRQ7

IRQ6

IRQ5

IRQ4

IRQ3

PC/104 BUS

J10

8259 Interrupt Controller 8254 Counter/timer outputs

Auxillary

Interrupt Inputs

PCM-CTC Interrupt Routing

J2 Pin 13

J2 Pin 15

2.4 External Connections

The PCM- CTC al lows for nearly un lim ited ver sa til ity in con nect ing to the out side world. A ll of the

Clock, Gate, and Out put lines are buff ered and avail able for in ter con nec tion via the I/O con nec tors at J1

and J2. In par al lel with the I/O con nec tors are two wire- wrap head ers at J3 and J5 re spec ti vely which

al low for ad di tional in ter con nec tion ca pa bil ity. A pic to rial of the I/O con nec tors, t he rout ing head ers J6

and J7 are shown be low:

Note : that the I/O sig nals at J1, J2, J3, and J5 are all buff ered us ing in vert ing Schmidt trig gered

gates. When mak ing ex ter nal con nec tions keep in mind that the sig nals are in verted from the in put or

out put po lar ity at the coun ter timer it self.

When used with the TRM- 500-3 ter mi na tion board a jumper placed on J4 will route 5 Volts to pin

25 of J1, al low ing the ter mi na tion board to be pow ered from the PCM- CTC di rectly through th e I/O

ca ble.

Page 2-4 OPERATIONS MANUAL PCM-CTC 990430

WinSystems - "The Embedded Systems Authority"

1 o o 2

3 o o 4

5 o o 6

7 o o 8

9 o o 10

11 o o 12

13 o o 14

15 o o 16

17 o o 18

19 o o 20

21 o o 22

23 o o 24

25 o o 26

1 o o 2

3 o o 4

5 o o 6

7 o o 8

9 o o 10

11 o o 12

13 o o 14

15 o o 16

1 o

2 o

3 o

4 o

5 o

6 o

7 o

8 o

9 o

10 o

11 o

12 o

1 o

2 o

3 o

4 o

5 o

6 o

7 o

8 o

1 o o 2

3 o o 4

5 o o 6

7 o o 8

9 o o 10

11 o o 12

13 o o 14

15 o o 16

17 o o 18

19 o o 20

1 o o 2

3 o o 4

5 o o 6

7 o o 8

9 o o 10

11 o o 12

13 o o 14

15 o o 16

17 o o 18

19 o o 20

CLK 0

GATE 0

OUT 0

CLK 1

GATE 1

OUT 1

CLK 2

GATE 2

OUT 2

CLK 3

GATE 3

OUT 3

CLK 4

GATE 4

OUT 4

CLK 5

GATE 5

OUT 5

Counter/Timer 1

Counter/Timer 2

J6

J7

J3

J5

J1

J2

1 2

o o

J4

+5V

INT 6

INT 7

/2

1 o

2 o

3 o

14.318 Mhz Bus Osc.

CPU Clock

J11

2.5 Connector/Jumper Summary

Con nec tor De scrip tion Page Ref er ence

Jumper

J1 I/O Con nec tor Chan nels 0-3 2-4

J2 I/O Con nec tor Chan nels 4-5 2-4

J3 Wire- Wrap header Chan nels 0-3 2-4

J4 +5 Volt en able to J1 2-4

J5 Wire- wrap header Chan nels 4-5 2-4

J6 Rout ing Header Chan nels 0-2 2-4

J7 Rout ing Header Chan nels 3-5 2-4

J8 I/O Ad dress Se lect 2-1, 2-2

J9 PC/104 Bus con nec tor N/A

J10 In ter rupt rout ing header 2-2, 2-3

J11 Bus Clock source se lect 2-4

990430 OPERATIONS MANUAL PCM-CTC Page 2-5

WinSystems - "The Embedded Systems Authority"

Appendix A

Datasheet Reprint

Printable datasheet in PDF format intel8254.pdf

Printable datasheet in PDF format intel8259a.pdf

990430 OPERATIONS MANUAL PCM-CTC

Appendix B

PCM-CTC Schematic Diagram

990430 OPERATIONS MANUAL PCM-CTC

8

7

6

5

4

3

2

1

D D

C C

B B

A A

B

WINSYSTEMS

400-0198-000

Friday, April 30, 1999

1 1

B

PCM-CTC

{Cage Code}

Size

Scale

CAGE Code

DWG NO

Rev

Sheet

of

SD0 D0

SD1 D1

SD2 D2

SD3 D3 P10

SD4 D4

SD5 D5

SD6 D6

SD7 D7 FREQ P12

D0

DIR D1

D2 P18 P14

D3 P17

D4 INT0

D5 P11

GND D6 P06

SD7 D7 P16 P15

+5 SD6 INT1

IRQ2 SD5 /IOR P13

SD4 /IOW P08

SD3 A0 P07

SD2 A1 INT2

SD1

SD0 /CS0

GND

AEN P20

/IOW

/IOR P22

P24

FREQ

CPUCLK

IRQ7 D0 P25

IRQ6 A9 D1

IRQ5 A8 D2 P00

IRQ4 A7 D3 P01 P23

IRQ3 A6 D4 INT3

A5 D5

A4 D6 P36 P21

A3 D7 P02

+5 A2 INT4

14MHZ A1 /IOR P30

GND A0 /IOW P38

GND GND A0 P37

A1 INT5 P32

/CS1

P34 INT6

INT7

IRQ2

IRQ7 P35

IRQ6

IRQ5

IRQ4 P33

CPUCLK IRQ3

INT

P31

CKS /CS0

A9 /CS1

A2 /CS2

A3 /INTA

A4 DIR P00 P10 P20 P30

A5 X1 D0 INT0 P01 P11 P21 P31

A6 X2 D1 INT1 P02 P12 P22 P32

A7 /RDB D2 INT2 X1 P13 P23 P33

A8 /IOR D3 INT3 X2 P14 P24 P34

A1 FREQ D4 INT4 X3 P15 P25 P35

AEN X3 D5 INT5 P06 P16 INT6 P36

D6 INT6 P07 P17 INT7 P37

D7 INT7 P08 P18 P38

A0

/CS2

X1 /RDB

X2 /IOW

X3

INT

/INTA

+5

GND

14MHZ

VCCVCC VCCVCC

VCC

J9

PC104

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10

A11

A12

A13

A14

A15

A16

A17

A18

A19

A20

A21

A22

A23

A24

A25

A26

A27

A28

A29

A30

A31

A32

B1

B2

B3

B4

B5

B6

B7

B8

B9

B10

B11

B12

B13

B14

B15

B16

B17

B18

B19

B20

B21

B22

B23

B24

B25

B26

B27

B28

B29

B30

B31

B32

IOCHCK

SD7

SD6

SD5

SD4

SD3

SD2

SD1

SD0

IOCHRDY

AEN

SA19

SA18

SA17

SA16

SA15

SA14

SA13

SA12

SA11

SA10

SA9

SA8

SA7

SA6

SA5

SA4

SA3

SA2

SA1

SA0

GND

RESET

+5V

IRQ2

-5V

DRQ2

-12V

OWS

+12V

GND

SMEMW

SMEMR

IOW

IOR

DACK3

DRQ3

DACK1

DRQ1

DACK0

CLK

IRQ7

IRQ6

IRQ5

IRQ4

IRQ3

DACK2

T/C

BALE

+5V

OSC

GND

U5

82C54

8

7

6

5

4

3

2

1

22

23

19

20

21

9

11

10

15

14

13

18

16

17

D0

D1

D2

D3

D4

D5

D6

D7

RD

WR

A0

A1

CS

CLK0

G0

OUT0

CLK1

G1

OUT1

CLK2

G2

OUT2

U7

82C54

8

7

6

5

4

3

2

1

22

23

19

20

21

9

11

10

15

14

13

18

16

17

D0

D1

D2

D3

D4

D5

D6

D7

RD

WR

A0

A1

CS

CLK0

G0

OUT0

CLK1

G1

OUT1

CLK2

G2

OUT2

U6

8259A

11 18

10 19

9 20

8 21

7 22

6 23

5 24

4 25

27

1

3

2

16

17

26

12

13

15

D0 IR0

D1 IR1

D2 IR2

D3 IR3

D4 IR4

D5 IR5

D6 IR6

D7 IR7

A0

CS

RD

WR

SP/EN

INT

INTA

CAS0

CAS1

CAS2

J1

1

3

5

7

9

11

13

15

17

19

21

23

25

2

4

6

8

10

12

14

16

18

20

22

24

26

J4

1 2

J2

1

3

5

7

9

11

13

15

2

4

6

8

10

12

14

16J10

1

3

5

2

4

6

7

9

11

8

10

12

U4

74HCT245

2

3

4

5

6

7

8

9

19

1

18

17

16

15

14

13

12

11

A1

A2

A3

A4

A5

A6

A7

A8

G

DIR

B1

B2

B3

B4

B5

B6

B7

B8

U8

22V10

1

2

3

4

5

6

7

8

9

10

11 13

14

15

16

17

18

19

20

21

22

23

CLK

I

I I

IO

J8

1

3

5

2

4

6

RP4

10K 10P 9R

2

3

4

5

6

7

8

9

1

10

RP1

10K 10P 9R

2

3

4

5

6

7

8

9

1

10

RP2

10K 10P 9R

2

3

4

5

6

7

8

9

1

10

RP3

10K 10P 9R

2

3

4

5

6

7

8

9

1

10

J3

1

2

3

4

5

6

7

8

9

10

11

12

J5

1

2

3

4

5

6

7

8

U1A

74HC14

12

U1B

74HC14

34

U1C

74HC14

5 6

U1D

74HC14

98

U1E

74HC14

1110

U1F

74HC14

13 12

U2A

74HC14

12

U2B

74HC14

34

U2C

74HC14

5 6

U2D

74HC14

98

U2E

74HC14

1110

U2F

74HC14

13 12

U3A

74HC14

12

U3B

74HC14

34

U3C

74HC14

5 6

U3D

74HC14

98

U3E

74HC14

1110

U3F

74HC14

13 12

J6

1

3

5

7

9

11

13

15

2

4

6

8

10

12

14

16

17

19

18

20

J7

1

3

5

7

9

11

13

15

2

4

6

8

10

12

14

16

17

19

18

20

R1

10K

C7

22UF

C2

.1UF

12

C6

.1UF

12

C5

.1UF

12

C8

.1UF

12

C3

.1UF

12

C1

.1UF

12

C4

.1UF

12

C9

.1UF

12

C10

.1UF

12

J11

2

13

WARRANTY

WinSystems warrants that for a period of two (2) years from the date of shipment any Products and Software

purchased or licensed hereunder which have been developed or manufactured by WinSystems shall be free of any

material defects and shall perform substantially in accordance with WinSystems' specifications therefore. With

respect to any Products or Software purchased or licensed hereunder which have been developed or manufactured

by others, WinSystems shall transfer and assign to Customer any warranty of such manufacturer or developer held

by WinSystems, provided that the warranty, if any, may be assigned. The sole obligation of WinSystems for any

breach of warranty contained herein shall be, at its option, either (i) to repair or replace at its expense any materially

defective Products or Software, or (ii) to take back such Products and Software and refund the Customer the

purchase price and any license fees paid for the same. Customer shall pay all freight, duty, broker's fees, insurance

changes and other fees and charges for the return of any Products or Software to WinSystems under this warranty.

WinSystems shall pay freight and insurance charges for any repaired or replaced Products or Software thereafter

delivered to Customer within the United States. All fees and costs for shipment outside of the United States shall be

paid by Customer. The foregoing warranty shall not apply to any Products or Software which have been subject to

abuse, misuse, vandalism, accidents, alteration, neglect, unauthorized repair or improper installations.

THERE ARE NO WARRANTIES BY WINSYSTEMS EXCEPT AS STATED HEREIN. THERE ARE NO

OTHER WARRANTIES EXPRESS OR IMPLIED INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, IN NO

EVENT SHALL WINSYSTEMS BE LIABLE FOR CONSEQUENTIAL, INCIDENTAL, OR SPECIAL

DAMAGES INCLUDING, BUT NOT LIMITED TO, DAMAGES FOR LOSS OF DATA, PROFITS OR

GOODWILL. WINSYSTEMS' MAXIMUM LIABILITY FOR ANY BREACH OF THIS AGREEMENT OR

OTHER CLAIM RELATED TO ANY PRODUCTS, SOFTWARE, OR THE SUBJECT MATTER

HEREOF, SHALL NOT EXCEED THE PURCHASE PRICE OR LICENSE FEE PAID BY CUSTOMER

TO WINSYSTEMS FOR THE PRODUCTS OR SOFTWARE OR PORTION THEREOF TO WHICH

SUCH BREACH OR CLAIM PERTAINS.

WARRANTY SERVICE

All products returned to WinSystems must be assigned a Return Material Authorization (RMA) number. To obtain

this number, please call or FAX WinSystems' factory in Arlington, Texas and provide the following information:

1. Description and quantity of the product(s) to be returned including its serial number.

2. Reason for the return.

3. Invoice number and date of purchase (if available), and original purchase order number.

4. Name, address, telephone and FAX number of the person making the request.

5. Do not debit WinSystems for the repair. WinSystems does not authorize debits.

After the RMA number is issued, please return the products promptly. Make sure the RMA number is visible on the

outside of the shipping package.

The customer must send the product freight prepaid and insured. The product must be enclosed in an anti-static bag

to protect it from damage caused by static electricity. Each bag must be completely sealed. Packing material must

separate each unit returned and placed as a cushion between the unit(s) and the sides and top of the shipping

container. WinSystems is not responsible for any damage to the product due to inadequate packaging or static

electricity.

WinSystems PCM-CTC User manual

WinSystems PCM-CTC User manual

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