Renesas EVK5X2503 Operating instructions

Brand: Renesas

Model: EVK5X2503

Type: Operating instructions

This manual is also suitable for

EVK5X2503SOCK

Introduction

The MicroClock evaluation board is designed to support the 5X2503 and 5L2503 MicroClock devices. The board provides a convenient

way of evaluating and configuring the MicroClock devices for the purpose of validation and measurement on all outputs.

For details of product operation, refer to the product datasheet.

Evaluation Board Overview

The MicroClock evaluation board is ready with all of the necessary components and connections to test the functionality of the

configuration. A programmed device is placed on the evaluation board ready for validation (see Figure 1).

Figure 1. Evaluation Board Overview

Table 1. MicroClock Family Products

Product Description Package

5X2503 1.8V integrated with an internal 26M crystal. 12-DFN

5L2503 1.8V using an external 26M crystal. 12-DFN

MicroClock® 5X2503 / 5L2503 Family Evaluation Board

User Manual

MicroClock® 5X2503 / 5L2503 Family Evaluation Board User Manual

Table 2. Socket Evaluation Board Descriptions

Label Number Label Name Description

1 Device ID Define the evaluation board supports for 5X2503 or 5L2503.

2 Probing Nodes Test points for single-ended outputs; SE1, SE2, SE3 and Reference with

GND test points in between.

3 Power Supply Nodes Applying external power supply with 1.8V for the core and output voltage.

GND node is placed next to the VDD node.

4 26MHz Crystal Crystal with 8pF load is populated for 5L2503. For 5X2503; the crystal is

not populated.

5 Jumper A switch jumper to control OE1 function.

6LEDs

Two LED lights to indicate the OTP burn process (for more information,

see the MicroClock 5X2503 / 5L2503 Family Development Kit User

Manual).

7 SMA connector for OUT1 Additional frequency test connector using SMA for OUT1.

8 MicroClock Part MicroClock device; either 5X2503 or 5L2503.

9 SMA Connector for PPS Mode on OUT1 SMA connector for PPS mode validation.

10 Part Indication Indication for device orientation.

11 DIP Switch Used to configure the device in different modes (software mode as default

for I2C control; hardware mode as output pin control selection).

MicroClock® 5X2503 / 5L2503 Family Evaluation Board User Manual

Figure 2. Evaluation Board Schematic

D D

C C

B B

A A

FEMALE connector FEMALE connector

BURNDONE

GND for SE

outputs

1 inch traceline on

SE1, SE2 and, SE3

Drain (Pin3) Source (Pin2)

Gate (Pin1)

Drain (Pin3) Source (Pin2)

Gate (Pin1)

GND for Power

GND for SE

outputs

GND for SE

outputs

Silkscreen

as VPP

SSM3J338R

Pls make sure they match to the

location of connectors from USB

board

USB P2 connectorUSB P1 connector

USB P4 connector

No populated

unless for PPS

OTP burn

AADVARK

Header Alignment:

Single pin header above

and below the center pin

of 3-pin header so that

center pin can be jumped

with the surrounding 4

pins, shown as left

VDD1P8V

GND

This device is

placed as a symbol

for for socket

REG_COMP1

VDD33

Node#3

REG_COMP

Node#1

Node#2

6V5

Socket_GND_trace

6v5_en

LED_Burn

Node#4Node#5

LED_DONE

VDD33

6V5

VDD_USB1p8_J7

VDD_USB1p8_J6

6v5_en

LED_Burn

LED_DONE

SDA_DFC0SDA_DFC0_socket

VDD_SEx_BF-FET

Note#4

VDD_External VDD_1p8_BF-FET

OE1_12

TP_SE1

SE_2_12

Pin10_Vddout2

SE_3_12

INV_OE1

SMA_OE1

SE_1_12

TP_SE3

VDD_SEx

OE1

SW2

SW1

SW3

SDA_chip

SCL_chip

OE1

OE1_12

SMA_OE1

TP_SE2

OE_R1

INV_OE1

SW3

Pin6_Vddout1

VDD_1p8

SCL_chip

SDA_chip

SW_control

SCL_AADVAR

SDA_AADVAR

VDD_1p8_BF-FET

VDD33 Pin6_Vddout1

Pin4_Vdd-Xtal

SCL_chip

SDA_chip

Pin5_Vdd-Xtal OE1_12

SE_2_12

SE_3_12

SE_1_12

Pin10_Vddout2

CLKINB/X2

CLKIN/X1X1

GND

CLKIN/X1

Pin5_Vdd-Xtal

CLKINB/X2

Pin4_Vdd-Xtal

GND

VDD_External_TP

VDD_1p8

VDD_SEx

OE1

VDD_1p8

VDD_SEx VDD_SEx

GND

SCL_DFC_socket

Socket_GND_trace

LED_DONE

LED_Burn

6v5_en

Title

Size Document Number R e v

Date: Sheet of

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LT1317 Boost Reg

Custom

11Friday, October 20, 2017

Title

Size Document Number R e v

Date: Sheet of

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LT1317 Boost Reg

Custom

11Friday, October 20, 2017

Title

Size Document Number R e v

Date: Sheet of

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LT1317 Boost Reg

Custom

11Friday, October 20, 2017

1.5K

R170

TC7SZ125FE

2 4

LED_GREEN

5X2503

SDA

SCL

VSS3

VSS4

VDD18

VDDOUT1

6OUT1 7

OE1 8

OUT2 9

VDDOUT2 10

OUT3 11

VSS12 12

R34

2.2

1 2

200K

1 2

GNDGND

25 MHz 8 pF_NP

JP1

Header_3Pin

R24

2.2

1 2

R33

220

R43

0_NP

R38 100

1 2

TP9

C151 uF

R13

200K

10 uF

R21

1 2

TP1SE3_TP

C1010 uF

TP18

R35

1 2

C90.1 uF

R42

0_NP

TP11 VDD1P8

C13100pF_NP

R160

R370

R12

1 2

10uH

1 2

R20

1 2

C16

0.1 uF_NP

1 2

DIODE SCHOTTKY

1 2

C520.1 uF

R27

1 2

R14

0_NP

1 2

J2X

R44

1 2

TP12

R39 100

1 2

LT1317B

VIN 6

SHDN#

GND

4SW 5

LBI

7FB 2

LBO 8

J1X

TP2

C12

0.1 uF_NP

MOS-P

2 3

TP5SE1_TP

R19

0_NP

1 2

R26

1 2

TP8

VDDSE2

LED_RED

1500pF

1 2

R300_NP

C111 uF

C74.7pF

R36

10k

R290

10K

LED

MOS-P

2 3

1 2

TP17

237K_1%

R11

0_NP

1 2

R32

220

TP16

TE_AMP_4-175638-0

566

10 10

DIP_SW8

VCC

VEE

s4 4

s3 3

s2 2

s1 1

s5 5

s6 6

s7 7

s8 8

R45

1 2

20K

R40 10K

1 2

JP3

CON2

1M_1%

1 2

FB1

BLM18AG601SN1D

1 2

R23

1 2

C514.7pF

R47

0_NP

1 2

C14100pF_NP

TE_AMP_4-175638-0

566

10 10

R15

0_NP

1 2

JP4

Header_10Pin_NP

10 uF

JP2

CON2

R100

R46

0_NP

1 2

TP3SE2_TP

R180

TP7

VDDSE1

TE_AMP_4-175638-0

910

C54NP

XU1

5X2503

SDA

SCL

VSS3

VSS4

VDD18

VDDOUT1

6OUT1 7

OE1 8

OUT2 9

VDDOUT2 10

OUT3 11

VSS12 12

TP6

R25

1 2

R41 10K

1 2

C504.7pF

TP4

C53NP

C50.1 uF

R28

10k

TP10

TP14

VP_I2C

TP15

10uH

1 2

C40.1 uF

R22

0_NP

1 2

TP13

R31

0_NP

1 2

MicroClock® 5X2503 / 5L2503 Family Evaluation Board User Manual

OE1 pin on MicroClock evaluation board provides multiple functions. See the description in below (Figure 3). Note that the OTP program

pin is an additional function for the MicroClock development kit. Refer to development kit user guide for further information.

Figure 3. Jumper Setup

Termination Options

Table 3. Termination Options for Single-ended Output –1

Signal Type Series Resistor, R4

LVCMOS 33Ω

Table 4. Termination Options for Single-ended Output –2

Signal Type Series Resistor, R2

LVCMOS 33Ω

Table 5. Termination Options for Single-ended Output –3

Signal Type Series Resistor, R1

LVCMOS 33Ω

OTP Program Pin

GND Pin

Control by DIP Switch Pin

VDD Pin

MicroClock® 5X2503 / 5L2503 Family Evaluation Board User Manual

Figure 4. 5X2503 Evaluation Board (Board without Crystal)

Figure 5. 5L2503 Evaluation Board (Board Populated with a 26MHz Crystal)

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without notice, at IDT’s sole discretion. Performance specifications and operating parameters of the described products are determined in an independent state and are not guaranteed to perform the same

way when installed in customer products. The information contained herein is provided without representation or warranty of any kind, whether express or implied, including, but not limited to, the suitability

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MicroClock® 5X2503 / 5L2503 Family Evaluation Board User Manual

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