Emerson 752I User manual

Category
Networking
Type
User manual
Katana
®
752i: Intelligent CompactPCI Blade for cPSB
User’s Manual
from Emerson Network Power
â„¢
Embedded Computing
April 2008
The information in this manual has been checked and is believed to be accurate and reli-
able. HOWEVER, NO RESPONSIBILITY IS ASSUMED BY EMERSON NETWORK POWER,
EMBEDDED COMPUTING FOR ITS USE OR FOR ANY INACCURACIES. Specifications are sub-
ject to change without notice. EMERSON DOES NOT ASSUME ANY LIABILITY ARISING OUT
OF USE OR OTHER APPLICATION OF ANY PRODUCT, CIRCUIT, OR PROGRAM DESCRIBED
HEREIN. This document does not convey any license under Emerson patents or the rights of
others.
Emerson. Consider It Solved is a trademark, and Business-Critical Continuity, Emerson Net-
work Power, and the Emerson Network Power logo are trademarks and service marks of
Emerson Network Power, Embedded Computing, Inc.
© 2008 Emerson Network Power, Embedded Computing, Inc.
Copyright © 2006-2008 Emerson Network Power, Embedded Computing, Inc. All rights reserved.
Revision Level: Principal Changes: Date:
10006024-00 Original release February 2006
10006024-01 Updates to page 10-4 March 2006
10006024-02 ECR01059: Added MTBF and RoHS cable info January 2007
10006024-03 Updated block diagram and FRU info July 2007
10006024-04 Updated format, Emerson contact and
regulatory info, and monitor section; changed
750GX to 750GL
April 2008
10006024-04 Katana®752i User’s Manual
i
Regulatory Agency Warnings & Notices
The Emerson Katana752i meets the requirements set forth by the Federal Communications
Commission (FCC) in Title 47 of the Code of Federal Regulations. The following information
is provided as required by this agency.
This device complies with part 15 of the FCC Rules. Operation is subject to the following
two conditions: (1) This device may not cause harmful interference, and (2) this device
must accept any interference received, including interference that may cause undesired
operation.
FCC RULES AND REGULATIONS — PART 15
This equipment has been tested and found to comply with the limits for a Class A digital
device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reason-
able protection against harmful interference when the equipment is operated in a commer-
cial environment. This equipment generates, uses and can radiate radio frequency energy
and, if not installed and used in accordance with the instructions, may cause harmful inter-
ference to radio communications. Operation of this equipment in a residential area is likely
to cause harmful interference, in which case the user will be required to correct the interfer-
ence at his own expense.
Caution: Making changes or modifications to the Katana752i hardware without the explicit consent
of Emerson Network Power could invalidate the user’s authority to operate this equipment.
EMC COMPLIANCE
The electromagnetic compatibility (EMC) tests used a Katana752i model that includes a
front panel assembly from Emerson Network Power.
Caution: For applications where the Katana752i is provided without a front panel, or where the front
panel has been removed, your system chassis/enclosure must provide the required
electromagnetic interference (EMI) shielding to maintain EMC compliance.
!
!
(continued)
Katana®752i User’s Manual 10006024-04
ii
EC Declaration of Conformity
According to EN 45014:1998
Manufacturer’s Name: Emerson Network Power
Embedded Computing
Manufacturer’s Address: 8310 Excelsior Drive
Madison, Wisconsin 53717
Declares that the following product, in accordance with the requirements of 2004/108/EEC, EMC
Directive and 1999/5/EC, RTTE Directive and their amending directives,
Product: Real-Time Processing Blade
Model Name/Number: Katana752i/10006008-xx
has been designed and manufactured to the following specifications:
EN55022:1998 Information Technology Equipment, Radio disturbance characteristics, Limits and
methods of measurement
EN55024:1998 Information Technology Equipment, Immunity characteristics, Limits and methods
of measurement
EN300386 V.1.3.2:2003-05 Electromagnetic compatibility and radio spectrum matters (ERM);
Telecommunication network equipment; EMC requirements
As manufacturer we hereby declare that the product named above has been designed to comply
with the relevant sections of the above referenced specifications. This product complies with the
essential health and safety requirements of the EMC Directive and RTTE Directive. We have an inter-
nal production control system that ensures compliance between the manufactured products and
the technical documentation.
Issue date: April 21, 2008
Bill Fleury
Compliance Engineer
10006024-04 Katana
®
752i User’s Manual
iii
Contents
1Overview
Components and Features . . . . . . . . . . . 1-1
Functional Overview . . . . . . . . . . . . . . . . 1-4
Additional Information . . . . . . . . . . . . . . 1-5
Product Certification . . . . . . . . . . . . . 1-5
RoHS Compliance. . . . . . . . . . . . . . . . 1-6
Terminology and Notation . . . . . . . . 1-6
Technical References. . . . . . . . . . . . . 1-6
2Setup
Electrostatic Discharge . . . . . . . . . . . . . . 2-1
Katana®752i Circuit Board. . . . . . . . . . . 2-1
Identification Numbers . . . . . . . . . . . 2-7
Connectors . . . . . . . . . . . . . . . . . . . . .2-7
Fuses. . . . . . . . . . . . . . . . . . . . . . . . . . .2-8
LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . .2-8
Katana®752i Setup . . . . . . . . . . . . . . . . . 2-9
Power Requirements . . . . . . . . . . . .2-10
Environmental Requirements . . . .2-10
Troubleshooting. . . . . . . . . . . . . . . . . . . 2-10
Technical Support . . . . . . . . . . . . . .2-11
Product Repair . . . . . . . . . . . . . . . . .2-11
3 Reset Logic
General Overview . . . . . . . . . . . . . . . . . . . 3-1
Reset Sources . . . . . . . . . . . . . . . . . . . . . . 3-3
CompactPCI Reset Enable . . . . . . . . 3-3
Power Monitor . . . . . . . . . . . . . . . . . . 3-3
750GL Processor Reset . . . . . . . . . . .3-3
4Processor
Processor Overview . . . . . . . . . . . . . . . . . 4-1
Features . . . . . . . . . . . . . . . . . . . . . . . .4-1
Physical Memory Map . . . . . . . . . . . .4-2
Processor Reset. . . . . . . . . . . . . . . . . . . . . 4-4
Processor Initialization. . . . . . . . . . . . . . . 4-4
Hardware Implementation Dependent
0 Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-5
Hardware Implementation Dependent
1 Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-6
Hardware Implementation Dependent
2 Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-7
Exception Handling . . . . . . . . . . . . . . . . . 4-8
Exception Processing. . . . . . . . . . . . . . . . .4-9
Cache Memory . . . . . . . . . . . . . . . . . . . . 4-11
L1 Cache . . . . . . . . . . . . . . . . . . . . . . 4-11
L2 Cache . . . . . . . . . . . . . . . . . . . . . . 4-11
JTAG/COP Headers. . . . . . . . . . . . . . . . . 4-13
5System Controller
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . .5-1
CPU Interface . . . . . . . . . . . . . . . . . . . . . . .5-2
SDRAM Controller . . . . . . . . . . . . . . . . . . .5-3
Device Controller Interface. . . . . . . . . . . .5-3
Internal (IDMA) Controller . . . . . . . . . . . .5-4
Timer/Counters . . . . . . . . . . . . . . . . . . . . .5-4
PCI Interface . . . . . . . . . . . . . . . . . . . . . . . .5-4
PCI Configuration Space. . . . . . . . . . 5-4
PCI Identification . . . . . . . . . . . . . . . . 5-5
PCI Read/Write. . . . . . . . . . . . . . . . . . 5-5
PCI Interface Registers . . . . . . . . . . . 5-5
Doorbell Registers . . . . . . . . . . . . . . . . . . .5-6
Outbound Doorbells . . . . . . . . . . . . . 5-6
Inbound Doorbells. . . . . . . . . . . . . . . 5-6
Watchdog Timer . . . . . . . . . . . . . . . . . . . .5-6
Reset. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-6
On-Card Memory . . . . . . . . . . . . . . . . . . . .5-7
User Flash . . . . . . . . . . . . . . . . . . . . . . 5-7
SDRAM. . . . . . . . . . . . . . . . . . . . . . . . . 5-7
EEPROMs. . . . . . . . . . . . . . . . . . . . . . . 5-8
I2C Interface . . . . . . . . . . . . . . . . . . . . . . . .5-8
GPIO Signal Definitions . . . . . . . . . . . . . 5-10
Console Serial Port . . . . . . . . . . . . . . . . . 5-11
6 Device Bus PLD
Reset Registers . . . . . . . . . . . . . . . . . . . . . .6-1
Interrupt Registers. . . . . . . . . . . . . . . . . . .6-2
Product Identification . . . . . . . . . . . . . . . .6-3
PCI Enumeration. . . . . . . . . . . . . . . . . . . . .6-3
Revision Registers . . . . . . . . . . . . . . . . . . .6-4
Board Configuration Registers. . . . . . . . .6-4
Other Registers. . . . . . . . . . . . . . . . . . . . . .6-6
7 Real-Time Clock
Block Diagram. . . . . . . . . . . . . . . . . . . . . . .7-1
Operation . . . . . . . . . . . . . . . . . . . . . . . . . .7-1
Clock Operation . . . . . . . . . . . . . . . . . . . . .7-2
Katana
®
752i User’s Manual 10006024-04
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8Local PCI Bus
PCI Enumeration. . . . . . . . . . . . . . . . . . . . .8-1
PCI ID Select and Interrupts . . . . . . . . . . .8-1
Geographical Addressing . . . . . . . . . . . . .8-2
PCI Bus Control Signals . . . . . . . . . . . . . . .8-2
9 PTMC Interface
PTMC Installation . . . . . . . . . . . . . . . . . . . .9-1
PTMC Connector Pinouts . . . . . . . . . . . . .9-3
10Ethernet Interfaces
Ethernet Address . . . . . . . . . . . . . . . . . . 10-1
Ethernet Ports . . . . . . . . . . . . . . . . . . . . . 10-2
Front Panel Ethernet Connector Pinouts . . .
10-2
Optional RMII PHY Devices. . . . . . . . . . 10-3
11IPMI Controller
SMB/IPMI Overview . . . . . . . . . . . . . . . . 11-1
I/O Interface . . . . . . . . . . . . . . . . . . . . . . 11-4
I2C Interfaces . . . . . . . . . . . . . . . . . . . . . 11-5
IPMI Message Protocol . . . . . . . . . . . . . 11-6
IPMI Network Function Codes . . . .11-8
IPMI Completion Codes . . . . . . . . .11-9
Zircon PM IPMI Commands . . . . .11-10
Get Sensor Reading (Sensor/Event) . . .
11-11
Master Write-Read I2C (Application) . .
11-14
Write Setting (OEM) . . . . . . . . . . .11-15
Read Setting (OEM) . . . . . . . . . . . .11-16
Set Heartbeat (OEM) . . . . . . . . . . .11-17
Get Heartbeat (OEM). . . . . . . . . . .11-18
IPMI FRU Information . . . . . . . . . .11-19
IPMI Device SDR Repository . . . . .11-20
IPMI Event Messages . . . . . . . . . . .11-20
12Hot Swap
Hot Swap Logic (HSL) PLD. . . . . . . . . . . 12-1
cPCI Functionality. . . . . . . . . . . . . . . . . . 12-2
Hot Swap LED and Ejector Switch Control . .
12-2
cPCI Hot Swap. . . . . . . . . . . . . . . . . .12-2
Non-cPCI Hot Swap . . . . . . . . . . . . .12-4
Timing Considerations . . . . . . . . . . . . . 12-5
HEALTHY* Signal . . . . . . . . . . . . . . . . . . 12-6
13CT Bus Interface
PICMG 2.15 Configuration 2 . . . . . . . . 13-1
Katana®752i CT Bus Options. . . . . . . . 13-2
Clocking. . . . . . . . . . . . . . . . . . . . . . . . . . 13-2
Signal Control . . . . . . . . . . . . . . . . . . . . . 13-3
CT Bus Routing Without the T8110 (option
1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-4
CT Bus Routing With the T8110 Installed
(option 2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-6
Local CT Bus Operation. . . . . . . . . . 13-7
H.110 CT Bus Operation. . . . . . . . . 13-8
14Backplane Signals
Overview . . . . . . . . . . . . . . . . . . . . . . . . . 14-1
Pinouts . . . . . . . . . . . . . . . . . . . . . . . . . . . 14-2
15Monitor
Command-Line Features. . . . . . . . . . . . 15-1
Basic Operation . . . . . . . . . . . . . . . . . . . 15-3
Power-Up/Reset Sequence . . . . . . 15-3
Power-Up Timing. . . . . . . . . . . . . . . 15-5
POST Diagnostic Results . . . . . . . . 15-6
Monitor SDRAM Usage . . . . . . . . . . 15-6
Monitor Recovery and Updates . . . . . . 15-7
Recovering the Monitor . . . . . . . . . 15-7
Updating the Monitor via TFTP . . . 15-7
Resetting Environment Variables . 15-8
Monitor Command Reference . . . . . . . 15-8
Command Syntax . . . . . . . . . . . . . . 15-8
Command Help . . . . . . . . . . . . . . . . 15-9
Typographic Conventions . . . . . . . 15-9
Boot Commands . . . . . . . . . . . . . . . . . . 15-9
bootbus. . . . . . . . . . . . . . . . . . . . . . . 15-9
bootcrc . . . . . . . . . . . . . . . . . . . . . . 15-10
bootd . . . . . . . . . . . . . . . . . . . . . . . . 15-10
bootelf. . . . . . . . . . . . . . . . . . . . . . . 15-10
bootm . . . . . . . . . . . . . . . . . . . . . . . 15-10
bootp . . . . . . . . . . . . . . . . . . . . . . . . 15-10
bootv . . . . . . . . . . . . . . . . . . . . . . . . 15-11
bootvx . . . . . . . . . . . . . . . . . . . . . . . 15-11
rarpboot . . . . . . . . . . . . . . . . . . . . . 15-11
tftpboot. . . . . . . . . . . . . . . . . . . . . . 15-11
Contents (continued)
10006024-04 Katana
®
752i User’s Manual
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JFFS2 File Systems. . . . . . . . . . . . . . . . . 15-12
ls . . . . . . . . . . . . . . . . . . . . . . . . . . . .15-12
fsinfo. . . . . . . . . . . . . . . . . . . . . . . . .15-12
fsload . . . . . . . . . . . . . . . . . . . . . . . .15-12
chpart. . . . . . . . . . . . . . . . . . . . . . . .15-12
Memory Commands . . . . . . . . . . . . . . 15-12
cmp. . . . . . . . . . . . . . . . . . . . . . . . . .15-13
cp . . . . . . . . . . . . . . . . . . . . . . . . . . .15-13
find . . . . . . . . . . . . . . . . . . . . . . . . . .15-13
md. . . . . . . . . . . . . . . . . . . . . . . . . . .15-13
mm . . . . . . . . . . . . . . . . . . . . . . . . . .15-14
nm. . . . . . . . . . . . . . . . . . . . . . . . . . .15-14
mw . . . . . . . . . . . . . . . . . . . . . . . . . .15-14
Flash Commands . . . . . . . . . . . . . . . . . 15-15
cp . . . . . . . . . . . . . . . . . . . . . . . . . . .15-15
erase. . . . . . . . . . . . . . . . . . . . . . . . .15-15
flinfo . . . . . . . . . . . . . . . . . . . . . . . . .15-15
protect . . . . . . . . . . . . . . . . . . . . . . .15-16
EEPROM / I2C Commands. . . . . . . . . . 15-16
eeprom . . . . . . . . . . . . . . . . . . . . . .15-16
icrc32 . . . . . . . . . . . . . . . . . . . . . . . .15-17
iloop . . . . . . . . . . . . . . . . . . . . . . . . .15-17
imd . . . . . . . . . . . . . . . . . . . . . . . . . .15-17
ipmifirmload . . . . . . . . . . . . . . . . . .15-17
imm . . . . . . . . . . . . . . . . . . . . . . . . .15-17
imw. . . . . . . . . . . . . . . . . . . . . . . . . .15-17
inm . . . . . . . . . . . . . . . . . . . . . . . . . .15-17
iprobe. . . . . . . . . . . . . . . . . . . . . . . .15-18
Ethernet Controller EEPROM Commands . .
15-18
initeth4rom. . . . . . . . . . . . . . . . . . .15-18
filleth4rom . . . . . . . . . . . . . . . . . . .15-18
showeth4rom . . . . . . . . . . . . . . . . .15-18
Environment Parameter Commands 15-18
envinit . . . . . . . . . . . . . . . . . . . . . . .15-19
printenv . . . . . . . . . . . . . . . . . . . . . .15-19
saveenv . . . . . . . . . . . . . . . . . . . . . .15-19
setenv. . . . . . . . . . . . . . . . . . . . . . . .15-19
Test Commands . . . . . . . . . . . . . . . . . . 15-20
diags. . . . . . . . . . . . . . . . . . . . . . . . .15-20
mtest . . . . . . . . . . . . . . . . . . . . . . . .15-20
um. . . . . . . . . . . . . . . . . . . . . . . . . . .15-20
Other Commands. . . . . . . . . . . . . . . . . 15-20
autoscr . . . . . . . . . . . . . . . . . . . . . . .15-20
base . . . . . . . . . . . . . . . . . . . . . . . . .15-20
bdinfo . . . . . . . . . . . . . . . . . . . . . . . 15-20
coninfo . . . . . . . . . . . . . . . . . . . . . . 15-21
crc16 . . . . . . . . . . . . . . . . . . . . . . . . 15-21
crc32 . . . . . . . . . . . . . . . . . . . . . . . . 15-21
echo . . . . . . . . . . . . . . . . . . . . . . . . . 15-21
enumpci . . . . . . . . . . . . . . . . . . . . . 15-21
fpledoff . . . . . . . . . . . . . . . . . . . . . .15-21
fruget. . . . . . . . . . . . . . . . . . . . . . . .15-21
frugetuser . . . . . . . . . . . . . . . . . . . . 15-21
frusetuser . . . . . . . . . . . . . . . . . . . . 15-22
gethvr . . . . . . . . . . . . . . . . . . . . . . . 15-22
getmonver . . . . . . . . . . . . . . . . . . . 15-22
getpcimemsize . . . . . . . . . . . . . . .15-22
getpcimode . . . . . . . . . . . . . . . . . . 15-23
getphysloc . . . . . . . . . . . . . . . . . . . 15-23
getspr . . . . . . . . . . . . . . . . . . . . . . . 15-23
go . . . . . . . . . . . . . . . . . . . . . . . . . . . 15-23
help . . . . . . . . . . . . . . . . . . . . . . . . . 15-23
iminfo . . . . . . . . . . . . . . . . . . . . . . . 15-23
isdram . . . . . . . . . . . . . . . . . . . . . . . 15-24
loop . . . . . . . . . . . . . . . . . . . . . . . . . 15-24
memmap . . . . . . . . . . . . . . . . . . . . 15-24
moninit . . . . . . . . . . . . . . . . . . . . . . 15-24
pci. . . . . . . . . . . . . . . . . . . . . . . . . . . 15-24
reset. . . . . . . . . . . . . . . . . . . . . . . . . 15-25
run . . . . . . . . . . . . . . . . . . . . . . . . . . 15-25
setpcimemsize. . . . . . . . . . . . . . . . 15-25
setpcimode. . . . . . . . . . . . . . . . . . . 15-25
setspr . . . . . . . . . . . . . . . . . . . . . . . . 15-26
script . . . . . . . . . . . . . . . . . . . . . . . . 15-26
showmac. . . . . . . . . . . . . . . . . . . . .15-26
showpci . . . . . . . . . . . . . . . . . . . . . . 15-26
showtemp. . . . . . . . . . . . . . . . . . . . 15-26
sleep. . . . . . . . . . . . . . . . . . . . . . . . . 15-26
vdhcp. . . . . . . . . . . . . . . . . . . . . . . . 15-26
version. . . . . . . . . . . . . . . . . . . . . . . 15-27
Environment Variables . . . . . . . . . . . . 15-27
Troubleshooting. . . . . . . . . . . . . . . . . . 15-30
Download Formats. . . . . . . . . . . . . . . . 15-30
Binary. . . . . . . . . . . . . . . . . . . . . . . . 15-30
Motorola S-Record . . . . . . . . . . . . 15-30
16Acronyms
Katana
®
752i User’s Manual 10006024-04
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10006024-04 Katana
®
752i User’s Manual
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Figures
Figure 1-1: General System Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4
Figure 2-1: Katana®752i Front Panel. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2
Figure 2-2: Component Map, Top (Rev. 03) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3
Figure 2-3: Component Map, Bottom (Rev. 03). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4
Figure 2-4: Jumper, Fuse, and Switch Locations, Top . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5
Figure 2-5: Fuse, and LED Locations, Bottom . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6
Figure 3-1: Katana®752i Reset Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2
Figure 3-2: 750GL Reset Logic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4
Figure 4-1: 750GL Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2
Figure 4-2: 750GL Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-3
Figure 5-1: MV64460 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2
Figure 5-2: I2C Interface Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-9
Figure 5-3: Standard Console Cable Wiring, #10007665-00 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-11
Figure 7-1: M41T00 Real-Time Clock Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-1
Figure 9-1: PTMC Module Location on Baseboard. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-1
Figure 10-1: RMII PHY to Transition Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-4
Figure 11-1: IPMB Connections Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-3
Figure 12-1: Hot Swap Controller Circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-4
Figure 13-1: Typical System Clocking Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-3
Figure 13-2: CT Signal Routing Diagram —T8110 Not Installed (option 1) . . . . . . . . . . . . . . . . . . . 13-5
Figure 13-3: CT Signal Routing Diagram —T8110 Installed (option 2) . . . . . . . . . . . . . . . . . . . . . . . 13-8
Figure 14-1: cPCI Connector Pin Assignments, J5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14-6
Figure 15-1: Example Monitor Start-up Display . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15-2
Figure 15-2: Power-up/Reset Sequence Flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15-4
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Tables
Table 1-1: Regulatory Agency Compliance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5
Table 1-2: Technical References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-7
Table 2-1: Circuit Board Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1
Table 2-2: LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8
Table 4-1: Katana®752i CPU Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1
Table 4-2: Katana®752i Address Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-4
Table 4-3: CPU Internal Register Initialization. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-4
Table 4-4: 750GL Exception Priorities. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-8
Table 4-5: Floating Point Exception Mode Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-10
Table 4-6: 750GL JTAG/COP Interface Pin Assignments, (P3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-13
Table 5-1: PCI Identification Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-5
Table 5-2: NVRAM Allocation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-8
Table 5-3: GPIO Signals Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-10
Table 5-4: Serial Console Port Pin Assignments, (P2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-11
Table 7-1: RTC Register Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-2
Table 8-1: ID Select Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-2
Table 8-2: Interrupt Connections for Katana®752i . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-2
Table 8-3: Geographical Address Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-2
Table 9-1: J1x PTMC Connector Pin Assignments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-3
Table 9-2: J2x PTMC Connector Pin Assignments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-5
Table 10-1: GbE Port LEDs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-2
Table 10-2: 82544EI Ethernet Port Pin Assignments, ETH4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-3
Table 10-3: MV64460 Ethernet Port Pin Assignments, ETH3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-3
Table 10-4: PTMC PHY Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-3
Table 11-1: Zircon PM General Purpose I/O Pin Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-4
Table 11-2: Zircon PM Analog-to-Digital Input Pin Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-5
Table 11-3: IPMB Slave Addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-6
Table 11-4: Format for IPMI Request Message . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-6
Table 11-5: Format for IPMI Response Message . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-7
Table 11-6: Network Function Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-8
Table 11-7: Completion Codes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-9
Table 11-8: Zircon PM IPMI Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-10
Table 11-9: Get Sensor Reading Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-12
Table 11-10: Master Write-Read I2C Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-14
Table 11-11: Write Setting Parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-15
Table 11-12: Read Setting Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-16
Table 11-13: Set Heartbeat Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-17
Table 11-14: Get Heartbeat Parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-18
Table 11-15: FRU Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-19
Table 11-16: IPMI Event Messages Generating Sensors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-20
Tables (continued)
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Table 11-17: Event Message Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-20
Table 11-18: System Firmware Progress OEM Event Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-21
Table 12-1: HSL PLD Register Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-1
Table 13-1: CT Clock Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-3
Table 13-2: Local CT Bus Bit Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-6
Table 14-1: cPCI Connector Pin Assignments, J1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14-2
Table 14-2: cPCI Connector Pin Assignments, J2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14-3
Table 14-3: cPSB Connector Pin Assignments, J3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14-4
Table 14-4: cPSB Connector Pin Assignments, J4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14-5
Table 15-1: Power-Up Timing for Booting from Soldered Flash. . . . . . . . . . . . . . . . . . . . . . . . . . . . 15-5
Table 15-2: Power-Up Timing for Booting from Socketed Flash . . . . . . . . . . . . . . . . . . . . . . . . . . . 15-5
Table 15-3: POST Diagnostics Results. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15-6
Table 15-4: Standard Environment Variables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15-27
Table 15-5: Optional Environment Variables. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15-29
10006024-04 Katana
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Registers
Register 4-1: 750GL Hardware Implementation Dependent, HID0. . . . . . . . . . . . . . . . . . . . . . . . . . . 4-5
Register 4-2: 750GL Hardware Implementation Dependent, HID1. . . . . . . . . . . . . . . . . . . . . . . . . . . 4-6
Register 4-3: 750GL Hardware Implementation Dependent, HID2. . . . . . . . . . . . . . . . . . . . . . . . . . . 4-7
Register 4-4: CPU Machine State (MSR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-9
Register 4-5: L2 Cache Control Register (L2CR). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-11
Register 6-1: Reset Event. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1
Register 6-2: Reset Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-2
Register 6-3: Interrupt Enable. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-2
Register 6-4: Interrupt Pending . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-3
Register 6-5: Product ID. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-3
Register 6-6: EReady. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-4
Register 6-7: Hardware Version . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-4
Register 6-8: PLD Version. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-4
Register 6-9: Board Configuration 3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-5
Register 6-10: Board Configuration 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-5
Register 6-11: Board Configuration 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-5
Register 6-12: IPMI Port Select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-6
Register 6-13: Programmable LED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-6
Register 10-1: MAC Calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-1
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10006024-04 Katana®752i User’s Manual
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Section 1
Overview
The Emerson Katana
®
752i is an intelligent input/output (I/O) processing blade for use in a
CompactPCI backplane. It is compatible with the CompactPCI Packet-Switched Backplane
(cPSB) and has two PCI Telecom Mezzanine Card (PTMC) sites that can support two tele-
communications interface cards, such as the Emerson PM/3Gv. The Katana®752i draws
processing power from its IBM PowerPC
®
750GL microprocessor, running at a speed of up
to 1GHz. A Marvell system controller serves as a PCI bridge. In the standard configuration,
the Katana®752i connects two Gigabit Ethernet ports to the front panel and two Gigabit
Ethernet ports to the J3 backplane connector, which (depending upon the configuration)
provides access to a rear transition module or cPSB. The Katana®752i supports various
memory configurations, user Flash memory, a front-panel serial port, and user I/O from the
PTMC sites. Optionally, the Katana®752i supports the H.110 Computer Telephony (CT) bus
and various clocking signals.
COMPONENTS AND FEATURES
The following is a brief summary of the Katana®752i hardware components and features:
CPU: The Katana®752i features an IBM 750GL central processing unit (CPU), operating at a rate
of up to 1GHz. The CPU is a 32-bit PowerPC RISC microprocessor with 32-kilobyte, Level-1,
data and instruction caches, as well as a one-megabyte, four-way, set-associative, Level-2
cache.
System Controller/PCI Bridge:
The Katana®752i employs a system controller/PCI bridge device from Marvell. The Discov-
ery
â„¢
III MV64460 is a single-chip solution that provides a high-speed (up to 200MHz) 60x
bus interface, double-data rate (DDR) SDRAM controller, two 66-MHz PCI interfaces (64
bits for CompactPCI, 32 bits for PTMC sites), three 10/100/1000BaseT Ethernet MAC con-
trollers, two multi-protocol serial controllers (MPSC), an interrupt controller, and 32 gen-
eral-purpose input/output (I/O) signals. The MV64460 also includes an inter-integrated
circuit (I
2
C) interface.
Overview: Components and Features
Katana®752i User’s Manual 10006024-04
1-2
SDRAM: The Katana®752i allows for a 72-bit Small-Outline Dual In-Line Memory Module (SO-
DIMM) of up to two gigabytes to support the CPU. (Please contact Emerson for the avail-
ability of one- and two-gigabyte SO-DIMMs.) This SDRAM operates at a speed of up to 200
MHz and has Error Checking and Correction (ECC) code.
Flash: The Katana®752i supports up to 128 megabytes soldered user Flash memory for the CPU.
The Flash bank is 32 bits wide, using two or four 16-bit wide devices. The Katana®752i also
supports 512 kilobytes of socketed Flash. The Flash memory conforms to the Intel
StrataFlash
â„¢
architecture. The CPU is capable of booting from either Flash memory.
H.110: The Katana®752i has an optional configuration that supports the H.110 Computer Tele-
phony (CT) bus in accordance with the PICMG 2.5 Computer Telephony Specification and
ECTF H.110 Specification, and it complies with Configuration 2 of the PICMG 2.15 PCI Tele-
com Mezzanine/Carrier Card Specification. The optional Agere Systems T8110 Time Slot
Interchanger (TSI) serves as a bridge between the H.110 and local CT bus.
Ethernet Ports: The Katana®752i provides four, 10/100/1000BaseT, Gigabit Media-Independent Interface
(GMII) Ethernet ports (three from the MV64460 system controller, one from the 82544EI
Ethernet controller). Two ports route to the front panel RJ45 connectors, and two ports
route to the J3 CompactPCI (cPCI) connector for use either by a rear transition module or a
cPCI packet-switched backplane (cPSB). Four PHY devices (three Broadcom BCM5461S,
one Intel 82544EI) provide the physical interface for these ports. Optionally, the
Katana®752i can support two Reduced Media-Independent (RMII) 10/100BaseT Ethernet
ports routed from the PTMC sites to connector J5. Two Micrel KS8721CL PHYs support
these ports.
Serial I/O: The MV64460 system controllers provides an asynchronous console serial port, which sup-
ports EIA-232 signal levels. This serial port is accessible via a mini-DB9 connector on the
Katana®752i front panel and the backplane connector J5.
CT Bus Clocks: Optionally, the Katana®752i can provide computer telephony (CT) bus clocking. One
option supports only the CT clocks (C8A, C8B, FRAMEA, FRAMEB, NETREF1, and NETFER2)
between J4 and the PTMC sites. A second option supports CT bus clocking plus CT data traf-
fic via an Agere Systems T8110 Time Slot Interchanger (TSI). This routes H.110 to the back-
plane connector J4.
Overview: Components and Features
10006024-04 Katana®752i User’s Manual
1-3
PTMC Sites: The Katana®752i has two standard PCI Telecom Mezzanine Card (PTMC) slots, which allow
for the use of two compatible PTMC boards, such as the Emerson PM/3Gv telecommunica-
tions interface card. (Refer to the PM/3Gv User’s Manual for details on the PM/3Gv.) The
Katana®752i complies with Configuration 2 of the PCI Telecom Mezzanine/Carrier Card Spec-
ification, PICMG 2.15.
IPMI: The Katana®752i supports an Intelligent Platform Management Interface (IPMI) by using a
Zircon PM controller device from QLogic Corporation.
Rear Transition Module:
An optional TmPIM rear transition module (RTM) can host two PCI Mezzanine Card
Input/Output Modules (PIMs). This RTM routes input/output signals from the Katana®752i
PMC slots to the PIM slots. It can also route two Ethernet ports and an EIA-232 serial port
from the J3 backplane connector to its rear panel. The Katana®752i also supports the
TM/cSpan-P16 and TM/cSpan-P8E RTMs from Emerson. See the appropriate RTM user man-
uals more information.
Overview: Functional Overview
Katana®752i User’s Manual 10006024-04
1-4
FUNCTIONAL OVERVIEW
The following block diagram provides a functional overview for the Katana®752i.
Figure 1-1: General System Block Diagram
J1 J2
J3 cPSB & I/O
Marvell
D-III
System
Controller
32/64/128
MB Flash
256/512MB
1GB/2GB
DDR SDRAM
512KB
Socketed
Flash
PMC Site #1
32 bit/33/66MHz PCI
64 User I/O
CT Bus per PT2MC
PMC Site #2
32 bit/33/66MHz PCI
64 User I/O
CT Bus per PT2MC
Opt J4 H.110 J5 I/O
RS232
μDB-9
RJ45
1000BaseT
CT Bus Clocks
User I/O
User I/O
NVRAM
IPMI
CTRL
FRU ROM
Voltage
Monitors
Temp
Sensors
Power Supply
& Monitoring
Switch
BCM
5461S
MAG
RTC
BCM
5461S
MAG
IBM
750GX
BCM
5461S
MAG
RJ45
1000BaseT
MAG
GbE
MAC/PHY
GMII
Clock
Buffer
Opt. TSI
T8110
PCI
Opt.
KS8721CL
Opt.
KS8721CL
J12
J11
J13
J22
J21 J23
J24
J14
RMII
RMII
3.3V
2.5V
1.5V
PCI
RS232
1000BaseT
I
2
C
CT Bus
CPCI
Power
PTMC Ethernet
Overview: Additional Information
10006024-04 Katana®752i User’s Manual
1-5
ADDITIONAL INFORMATION
This section lists the Katana®752i hardware’s regulatory certifications and briefly discusses
the terminology and notation conventions used in this manual. It also lists general technical
references.
Mean time between failures (MTBF) has been calculated at 500,674 hours using Telcordia
SR-232, Issue 1, Reliability Prediction for Electronic Equipment at 40
°C.
Product Certification
The Katana®752i hardware has been tested to comply with various safety, immunity, and
emissions requirements as specified by the Federal Communications Commission (FCC),
Underwriters Laboratories (UL), and others. The following table summarizes this compli-
ance.
Table 1-1: Regulatory Agency Compliance
Type: Specification:
Safety IEC60950/EN60950 – Safety of Information Technology
Equipment (Western Europe)
UL60950, CSA C22.2 No. 60950, Third Edition – Safety of
Information Technology Equipment, including Electrical
Business Equipment (BI-National)
Global IEC – CB Scheme Report IEC 60950, all country deviations
Environmental NEBS: Telecordia GR-63 –
Section 4.1.1 Transportation and Storage Environmental
Criteria;
Section 4.3 Equipment Handling Criteria;
Section 4.4.1 Earthquake Environment and Criteria;
Section 4.4.3 Office Vibration Environment and Criteria;
Section 4.4.4 Transportation Vibration Criteria
Section 4.5 Airborne Contaminants
EMC FCC Part 15, Class A – Title 47, Code of Federal Regulations,
Radio Frequency Devices
ICES 003, Class A – Radiated and Conducted Emissions, Canada
NEBS: Telecordia GR-1089 level 3 – Emissions and Immunity
(circuit pack level testing only)
ETSI EN300386 – Electromagnetic Compatibility and Radio
Spectrum Matters (ERM), Telecommunication Network
Equipment, Electromagnetic Compatibility (EMC) Requirements
Overview: Additional Information
Katana®752i User’s Manual 10006024-04
1-6
Emerson maintains test reports that provide specific information regarding the methods
and equipment used in compliance testing. Unshielded external I/O cables, loose screws, or
a poorly grounded chassis may adversely affect the Katana®752i hardware’s ability to com-
ply with any of the stated specifications.
The UL web site at ul.com has a list of Emerson’s UL certifications. To find the list, search in
the online certifications directory using Emerson’s UL file number, E190079. There is a list
for products distributed in the United States, as well as a list for products shipped to Can-
ada. To find the Katana®752i, search in the list for 10006008-xx, where xx changes with
each revision of the printed circuit board.
RoHS Compliance
The Katana®752i is compliant with the European Union’s RoHS (Restriction of Use of Haz-
ardous Substances) directive, created to limit harm to the environment and human health
by restricting the use of harmful substances in electrical and electronic equipment. Effec-
tive July 1, 2006, RoHS restricts the use of six substances: cadmium (Cd), mercury (Hg),
hexavalent chromium (Cr (VI)), polybrominated biphenyls (PBBs), polybrominated diphe-
nyl ethers (PBDEs), and lead (Pb). Configurations that are RoHS compliant are built with
lead-free solder. Configurations that are 5-of-6 are built with tin-lead solder per the lead-in-
solder RoHS exemption.
To obtain a certificate of conformity (CoC) for the Katana®752i, send an e-mail to
sales@artesyncp.com or call 1-800-356-9602. Please have the part number(s)
(e.g., C000####-##) for your configuration(s) available when contacting Emerson.
Terminology and Notation
Active low signals: An active low signal is indicated with an asterisk * after the signal name.
Byte, word: Throughout this manual byte refers to 8 bits, word refers to 16 bits, and long word refers to
32 bits, double long word refers to 64 bits.
PLD: This manual uses the acronym, PLD, as a generic term for programmable logic device (also
known as FPGA, CPLD, EPLD, etc.).
Radix 2 and 16: Hexadecimal numbers end with a subscript 16. Binary numbers are shown with a subscript
2.
Technical References
Further information on basic operation and programming of the Katana®752i components
can be found in the following documents.
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Emerson 752I User manual

Category
Networking
Type
User manual

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