Emerson PMPPC7448 User manual

PmPPC7448: PowerPC™-Based Processor PMC Module

User’s Manual

from Emerson Network Power

™

Embedded Computing

September 2007

The information in this manual has been checked and is believed to be accurate and reli-

able. HOWEVER, NO RESPONSIBILITY IS ASSUMED BY EMERSON NETWORK POWER,

EMBEDDED COMPUTING FOR ITS USE OR FOR ANY INACCURACIES. Specifications are sub-

ject to change without notice. EMERSON DOES NOT ASSUME ANY LIABILITY ARISING OUT

OF USE OR OTHER APPLICATION OF ANY PRODUCT, CIRCUIT, OR PROGRAM DESCRIBED

HEREIN. This document does not convey any license under Emerson patents or the rights of

others.

Emerson. Consider It Solved is a trademark, and Business-Critical Continuity, Emerson Net-

work Power, and the Emerson Network Power logo are trademarks and service marks of

Revision Level: Principal Changes: Date:

10006757-00 Original release October 2005

10006757-01 Artwork stitch, added “RoHS Compliance”,

updated memory map and monitor (version

1.4), added “Internal SRAM”

June 2006

10006757-02 Added caution for front panel reset switch;

updated “Monitor” chapter and environment

variables

September 2007

10006757-02 PmPPC7448 User’s Manual

i

Regulatory Agency Warnings & Notices

The Emerson PmPPC7448 meets the requirements set forth by the Federal Communica-

tions Commission (FCC) in Title 47 of the Code of Federal Regulations. The following infor-

mation is provided as required by this agency.

This device complies with part 15 of the FCC Rules. Operation is subject to the following two

conditions: (1) This device may not cause harmful interference, and (2) this device must

accept any interference received, including interference that may cause undesired opera-

tion.

FCC RULES AND REGULATIONS — PART 15

This equipment has been tested and found to comply with the limits for a Class B digital

device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reason-

able protection against harmful interference in a residential installation. This equipment

generates, uses and can radiate radio frequency energy and, if not installed and used in

accordance with the instructions, may cause harmful interference to radio communica-

tions. However, there is no guarantee that interference will not occur in a particular installa-

tion. If this equipment does cause harmful interference to radio or television reception,

which can be determined by turning the equipment off and on, the user is encouraged to

try to correct the interference by one or more of the following measures:

• Reorient or relocate the receiving antenna

• Increase the separation between the equipment and receiver

• Connect the equipment into an outlet on a circuit different from that to which the

receiver is connected

• Consult the dealer or an experienced radio/TV technician for help

Caution: Making changes or modifications to the PmPPC7448 hardware without the explicit consent

of Emerson Network Power could invalidate the user’s authority to operate this equipment.

EMC COMPLIANCE

The electromagnetic compatibility (EMC) tests used a PmPPC7448 model that includes a

front panel assembly from Emerson Network Power.

Caution: For applications where the PmPPC7448 is provided without a front panel, or where the

front panel has been removed, your system chassis/enclosure must provide the required

electromagnetic interference (EMI) shielding to maintain EMC compliance.

!

Regulatory Agency Warnings & Notices (continued)

PmPPC7448 User’s Manual 10006757-02

ii

EC Declaration of Conformity

According to EN 45014:1998

Manufacturer’s Name: Emerson Network Power

Embedded Computing

Manufacturer’s Address: 8310 Excelsior Drive

Madison, Wisconsin 53717

Declares that the following product, in accordance with the requirements of 2004/108/EEC, EMC

Directive and 1999/5/EC, RTTE Directive and their amending directives,

Product: PowerPC™-Based Processor PMC Module

Model Name/Number: PmPPC7448/10005277-xx

has been designed and manufactured to the following specifications:

EN55022:1998 Information Technology Equipment, Radio disturbance characteristics, Limits and

methods of measurement

EN55024:1998 Information Technology Equipment, Immunity characteristics, Limits and methods

of measurement

EN300386 V.1.3.1 Electromagnetic compatibility and radio spectrum matters (ERM);

Telecommunication network equipment; EMC requirements

As manufacturer we hereby declare that the product named above has been designed to comply

with the relevant sections of the above referenced specifications. This product complies with the

essential health and safety requirements of the EMC Directive and RTTE Directive. We have an inter-

nal production control system that ensures compliance between the manufactured products and

the technical documentation.

Issue date: September 26, 2007

Bill Fleury

Compliance Engineer

10006757-02 PmPPC7448 User’s Manual

iii

Contents

1Overview

Components and Features . . . . . . . . . . . 1-1

Functional Overview . . . . . . . . . . . . . . . . 1-3

Physical Memory Map . . . . . . . . . . . . . . . 1-4

Additional Information . . . . . . . . . . . . . . 1-6

Product Certification . . . . . . . . . . . . . 1-6

UL Certification. . . . . . . . . . . . . . . . . . 1-7

RoHS Compliance. . . . . . . . . . . . . . . . 1-8

Terminology and Notation . . . . . . . . 1-8

Technical References. . . . . . . . . . . . . 1-8

2Setup

Electrostatic Discharge . . . . . . . . . . . . . . 2-1

PmPPC7448 Circuit Board. . . . . . . . . . . . 2-1

Connectors . . . . . . . . . . . . . . . . . . . . .2-4

LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . .2-5

Front Panel . . . . . . . . . . . . . . . . . . . . . 2-6

Reset. . . . . . . . . . . . . . . . . . . . . . . . . . .2-7

PmPPC7448 Setup . . . . . . . . . . . . . . . . . . 2-8

Power Requirements . . . . . . . . . . . . .2-9

Environmental Considerations . . . . 2-9

Installing the Module. . . . . . . . . . . .2-10

Troubleshooting. . . . . . . . . . . . . . . . . . . 2-11

Technical Support . . . . . . . . . . . . . .2-12

Product Repair . . . . . . . . . . . . . . . . .2-13

3 Central Processing Unit

Processor Reset. . . . . . . . . . . . . . . . . . . . . 3-2

Processor Initialization. . . . . . . . . . . . . . . 3-2

Hardware Implementation Dependent

0 Register. . . . . . . . . . . . . . . . . . . . . . . 3-3

Hardware Implementation Dependent

1 Register. . . . . . . . . . . . . . . . . . . . . . . 3-5

Exception Handling . . . . . . . . . . . . . . . . . 3-6

Exception Processing. . . . . . . . . . . . . . . . 3-8

Machine State Register . . . . . . . . . . . 3-8

Cache Memory . . . . . . . . . . . . . . . . . . . . 3-10

L1 Cache. . . . . . . . . . . . . . . . . . . . . . .3-10

L2 Cache. . . . . . . . . . . . . . . . . . . . . . .3-11

4 On-Card Memory

Configuration

Boot Memory Configuration. . . . . . . . . . 4-1

User Flash. . . . . . . . . . . . . . . . . . . . . . . . . . 4-1

On-Card SDRAM . . . . . . . . . . . . . . . . . . . . .4-2

NVRAM Allocation . . . . . . . . . . . . . . . . . . .4-2

5System Controller

CPU Interface . . . . . . . . . . . . . . . . . . . . . . .5-2

CPU Interface Registers . . . . . . . . . . 5-2

Memory Interface. . . . . . . . . . . . . . . . . . . .5-2

DDR SDRAM Controller . . . . . . . . . . 5-2

Internal SRAM. . . . . . . . . . . . . . . . . . . 5-3

Device Controller Interface. . . . . . . . . . . .5-3

Device Control Registers . . . . . . . . . 5-4

Internal (IDMA) Controller . . . . . . . . . . . .5-4

Timer/Counter . . . . . . . . . . . . . . . . . . 5-4

PCI Interface . . . . . . . . . . . . . . . . . . . . . . . .5-4

PCI Configuration Space. . . . . . . . . . 5-5

PCI Subsystem Device and Vendor ID

Assignment. . . . . . . . . . . . . . . . . . . . . 5-5

PCI Read/Write. . . . . . . . . . . . . . . . . . 5-5

PCI Interface Registers . . . . . . . . . . . 5-7

PCI Bus Control Signals . . . . . . . . . . . . . . .5-7

PMC Connector Pinouts . . . . . . . . . . . . 5-10

P11 and P12 Pin Assignments . . . . 5-10

P13 and P14 Pin Assignments . . . . 5-11

PMC Connector . . . . . . . . . . . . . . . . 5-12

Doorbell Registers . . . . . . . . . . . . . . . . . 5-13

Outbound Doorbells . . . . . . . . . . . . 5-13

Inbound Doorbells. . . . . . . . . . . . . . 5-13

Monarch Functionality . . . . . . . . . . . . . 5-13

66 MHz Bus Operation. . . . . . . . . . . . . . 5-14

Watchdog Timer . . . . . . . . . . . . . . . . . . 5-14

Reset. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-14

6 Ethernet Interface

MV64460 Ethernet Registers. . . . . . . . . .6-1

Ethernet Address . . . . . . . . . . . . . . . . . . . .6-2

Ethernet Connection (P1) . . . . . . . . . . . . .6-2

7CPLD

Reset Registers . . . . . . . . . . . . . . . . . . . . . .7-1

Reset Event Register (RER). . . . . . . . 7-1

Reset Command Register (RCR) . . . 7-1

PCI Reset Out Enable Register (ROER) .

7-2

Interrupt Registers. . . . . . . . . . . . . . . . . . .7-3

Interrupt Enable Register (IER) . . . . 7-4

Contents (continued)

PmPPC7448 User’s Manual 10006757-02

iv

Interrupt Pending Register (IPR) . . . 7-4

Product ID Register (PIR). . . . . . . . . . . . . .7-5

EReady Register (ERdy) . . . . . . . . . . . . . . .7-5

Revision Registers . . . . . . . . . . . . . . . . . . .7-5

Hardware Version Register (HVR) . . 7-6

PLD Version Register (PVR) . . . . . . . 7-6

Board Configuration Registers. . . . . . . . .7-6

8 Serial Input/Output

Multi-Protocol Serial Controllers (MPSC)8-1

Serial DMA (SDMA) Channels. . . . . . . . . .8-1

Programmable Baud Rate. . . . . . . . . . . . .8-1

BRGx Configuration Register . . . . . . 8-1

BRGx Tuning Register . . . . . . . . . . . . 8-2

I2C Interface . . . . . . . . . . . . . . . . . . . . . . . .8-2

I/O Connection . . . . . . . . . . . . . . . . . . . . . .8-2

9 Real-Time Clock

Block Diagram. . . . . . . . . . . . . . . . . . . . . . .9-1

Operation. . . . . . . . . . . . . . . . . . . . . . . . . . .9-1

Clock Operation . . . . . . . . . . . . . . . . . . . . .9-2

10Development Mezzanine

Card

DMC Circuit Board . . . . . . . . . . . . . . . . . 10-1

Serial Numbers . . . . . . . . . . . . . . . . .10-2

Connectors . . . . . . . . . . . . . . . . . . . . . . . 10-3

P1 Connector Pin Assignments . . .10-3

P2 EIA-232 Interface . . . . . . . . . . . .10-6

PmPPC7448 to DMC JTAG . . . . . . . . . . 10-7

P3 JTAG/COP. . . . . . . . . . . . . . . . . . .10-7

P4 JTAG Chain Header . . . . . . . . . . .10-8

DMC Jumpers (JP1). . . . . . . . . . . . . . . . . 10-9

Jumper Setting Register . . . . . . . .10-10

Debug/Status LEDs . . . . . . . . . . . . . . . 10-10

DMC Setup. . . . . . . . . . . . . . . . . . . . . . . 10-11

Installing the DMC Card . . . . . . . .10-11

Troubleshooting. . . . . . . . . . . . . . . . . . 10-13

Technical Support . . . . . . . . . . . . .10-13

Product Repair . . . . . . . . . . . . . . . .10-13

11Monitor

Command-Line Features. . . . . . . . . . . . 11-1

Basic Operation. . . . . . . . . . . . . . . . . . . . 11-2

Power-up/Reset Sequence . . . . . . 11-2

POST Diagnostic Results . . . . . . . . 11-4

Monitor SDRAM Usage . . . . . . . . . . 11-4

Monitor Recovery and Updates . . . . . . 11-4

Recovering the Monitor . . . . . . . . . 11-4

Updating the Monitor via TFTP . . . 11-5

Restoring the PmPPC7448 Monitor

Using the KatanaQP . . . . . . . . . . . . 11-6

Resetting Environment Variables . 11-7

Accessing the Console Over Ethernet. 11-8

Monitor Command Reference . . . . . . . 11-8

Command Syntax . . . . . . . . . . . . . . 11-9

Command Help . . . . . . . . . . . . . . . . 11-9

Typographic Conventions . . . . . . . 11-9

Boot Commands . . . . . . . . . . . . . . . . . . 11-9

bootd . . . . . . . . . . . . . . . . . . . . . . . . . 11-9

bootelf. . . . . . . . . . . . . . . . . . . . . . . 11-10

bootm . . . . . . . . . . . . . . . . . . . . . . . 11-10

bootp . . . . . . . . . . . . . . . . . . . . . . . . 11-10

bootv . . . . . . . . . . . . . . . . . . . . . . . . 11-10

bootvx . . . . . . . . . . . . . . . . . . . . . . . 11-10

dhcp. . . . . . . . . . . . . . . . . . . . . . . . . 11-11

rarpboot . . . . . . . . . . . . . . . . . . . . . 11-11

tftpboot. . . . . . . . . . . . . . . . . . . . . . 11-11

Memory Commands . . . . . . . . . . . . . . 11-11

cmp . . . . . . . . . . . . . . . . . . . . . . . . . 11-11

cp . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-12

find . . . . . . . . . . . . . . . . . . . . . . . . . . 11-12

md . . . . . . . . . . . . . . . . . . . . . . . . . . 11-12

mm. . . . . . . . . . . . . . . . . . . . . . . . . .11-13

nm . . . . . . . . . . . . . . . . . . . . . . . . . . 11-13

mw . . . . . . . . . . . . . . . . . . . . . . . . . . 11-13

Flash Commands . . . . . . . . . . . . . . . . . 11-14

cp . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-14

erase . . . . . . . . . . . . . . . . . . . . . . . . 11-14

flinfo. . . . . . . . . . . . . . . . . . . . . . . . . 11-14

protect. . . . . . . . . . . . . . . . . . . . . . . 11-15

EEPROM/I2C Commands . . . . . . . . . . 11-15

eeprom . . . . . . . . . . . . . . . . . . . . . . 11-15

icrc32. . . . . . . . . . . . . . . . . . . . . . . . 11-16

iloop. . . . . . . . . . . . . . . . . . . . . . . . .11-16

imd. . . . . . . . . . . . . . . . . . . . . . . . . . 11-16

imm . . . . . . . . . . . . . . . . . . . . . . . . .11-16

imw . . . . . . . . . . . . . . . . . . . . . . . . . 11-16

inm . . . . . . . . . . . . . . . . . . . . . . . . . . 11-16

iprobe . . . . . . . . . . . . . . . . . . . . . . . 11-16

Environment Parameter Commands 11-17

printenv. . . . . . . . . . . . . . . . . . . . . .11-17

Contents (continued)

10006757-02 PmPPC7448 User’s Manual

v

saveenv . . . . . . . . . . . . . . . . . . . . . .11-17

setenv. . . . . . . . . . . . . . . . . . . . . . . .11-17

Test Commands . . . . . . . . . . . . . . . . . . 11-17

diags. . . . . . . . . . . . . . . . . . . . . . . . .11-18

mtest . . . . . . . . . . . . . . . . . . . . . . . .11-18

um. . . . . . . . . . . . . . . . . . . . . . . . . . .11-18

Other Commands. . . . . . . . . . . . . . . . . 11-18

autoscr . . . . . . . . . . . . . . . . . . . . . . .11-18

base . . . . . . . . . . . . . . . . . . . . . . . . .11-18

bdinfo. . . . . . . . . . . . . . . . . . . . . . . .11-18

coninfo. . . . . . . . . . . . . . . . . . . . . . .11-18

crc32. . . . . . . . . . . . . . . . . . . . . . . . .11-19

date. . . . . . . . . . . . . . . . . . . . . . . . . .11-19

echo . . . . . . . . . . . . . . . . . . . . . . . . .11-19

enumpci. . . . . . . . . . . . . . . . . . . . . .11-19

getmonver. . . . . . . . . . . . . . . . . . . .11-19

go . . . . . . . . . . . . . . . . . . . . . . . . . . .11-19

help. . . . . . . . . . . . . . . . . . . . . . . . . .11-20

iminfo. . . . . . . . . . . . . . . . . . . . . . . .11-20

isdram . . . . . . . . . . . . . . . . . . . . . . .11-20

loop . . . . . . . . . . . . . . . . . . . . . . . . . 11-20

memmap . . . . . . . . . . . . . . . . . . . . 11-20

moninit . . . . . . . . . . . . . . . . . . . . . . 11-20

pci. . . . . . . . . . . . . . . . . . . . . . . . . . . 11-21

ping . . . . . . . . . . . . . . . . . . . . . . . . . 11-21

reset. . . . . . . . . . . . . . . . . . . . . . . . . 11-21

run . . . . . . . . . . . . . . . . . . . . . . . . . . 11-21

script . . . . . . . . . . . . . . . . . . . . . . . . 11-22

showmac. . . . . . . . . . . . . . . . . . . . .11-22

showpci . . . . . . . . . . . . . . . . . . . . . . 11-22

sleep. . . . . . . . . . . . . . . . . . . . . . . . . 11-22

version. . . . . . . . . . . . . . . . . . . . . . . 11-22

Environment Variables . . . . . . . . . . . . 11-22

Troubleshooting. . . . . . . . . . . . . . . . . . 11-25

Download Formats. . . . . . . . . . . . . . . . 11-25

Binary. . . . . . . . . . . . . . . . . . . . . . . . 11-25

Motorola S-Record . . . . . . . . . . . . 11-25

12Acronyms

PmPPC7448 User’s Manual 10006757-02

vi

(blank page)

10006757-02 PmPPC7448 User’s Manual

vii

Figures

Figure 1-1: General System Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3

Figure 1-2: PmPPC7448 Memory Map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4

Figure 2-1: Component Map, Top (Rev. 06) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2

Figure 2-2: Component Map, Bottom (Rev. 06). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3

Figure 2-3: LED Locations, Bottom . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5

Figure 2-4: Front Panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6

Figure 2-5: Reset Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8

Figure 2-6: Module Location on Emerson CC1000-DM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10

Figure 2-7: Installing the Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-11

Figure 2-8: Serial Number and Product ID on Bottom Side . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-13

Figure 3-1: MPC7448 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2

Figure 5-1: MV64460 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1

Figure 5-2: PCI Device and Vendor ID. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-5

Figure 5-3: Example PCI0 Address Map, Monarch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-6

Figure 5-4: Example PCI0 Address Map, Non-Monarch (Default) . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-6

Figure 5-5: PCI JTAG Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-10

Figure 5-6: PMC Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-12

Figure 6-1: Front Panel Ethernet Connector (P1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-3

Figure 6-2: Ethernet Cable Assembly . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-3

Figure 8-1: Front Panel Serial Port Connector (P2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-2

Figure 8-2: Serial Cable Assembly (Emerson Part Number C0007662-00) . . . . . . . . . . . . . . . . . . . 8-3

Figure 9-1: M41T00 Real-Time Clock Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-1

Figure 10-1: DMC Component Maps, Top and Bottom (Revision 01) . . . . . . . . . . . . . . . . . . . . . . . 10-2

Figure 10-2: DMC P1 PCB-to-PCB Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-3

Figure 10-3: DMC P2 Mini-USB Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-6

Figure 10-4: PmPPC7448 to DMC JTAG Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-7

Figure 10-5: DMC P3 JTAG/COP Header. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-7

Figure 10-6: DMC P4 JTAG Chain Header. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-8

Figure 10-7: DMC JP1 Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-9

Figure 10-8: DMC Location on PmPPC7448 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-12

Figure 11-1: Example Monitor Start-up Display . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-2

Figure 11-2: Power-up/Reset Sequence Flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-3

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Tables

Table 1-1: Address Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5

Table 1-2: Regulatory Agency Compliance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6

Table 1-3: Technical References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-8

Table 2-1: Circuit Board Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1

Table 2-2: Power Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9

Table 2-3: Environmental Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9

Table 3-1: PmPPC7448 CPU Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1

Table 3-2: CPU Internal Register Initialization. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2

Table 3-3: MPC7448 Exception Priorities. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-7

Table 4-1: Memory Configuration Jumper. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1

Table 4-2: Flash Memory Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1

Table 4-3: NVRAM Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-3

Table 5-1: P11/P12 Pin Assignments—32-Bit PCI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-10

Table 5-2: P13/P14 Pin Assignments—64-Bit PCI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-11

Table 6-1: Ethernet Port Address Numbering. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-2

Table 6-2: Front Panel Ethernet Pin Assignments (P1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-3

Table 6-3: Ethernet Cable Wiring Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-3

Table 8-1: I2C Device Addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-2

Table 8-2: Front Panel Serial Port Pin Assignments (P2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-3

Table 8-3: Serial Cable Wiring Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-3

Table 9-1: RTC Register Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-2

Table 10-1: DMC Mechanical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-1

Table 10-2: DMC P1 Connector Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-3

Table 10-3: DMC P2 Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-6

Table 10-4: DMC P3 Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-8

Table 10-5: DMC P4 Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-9

Table 11-1: POST Diagnostic Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-4

Table 11-2: Standard Environment Variables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-22

Table 11-3: Optional Environment Variables. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-24

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Registers

Register 3-1: MPC7448 Hardware Implementation Dependent, HID0. . . . . . . . . . . . . . . . . . . . . . . . 3-3

Register 3-2: MPC7448 Hardware Implementation Dependent, HID1. . . . . . . . . . . . . . . . . . . . . . . . 3-5

Register 3-3: CPU Machine State Register (MSR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-9

Register 3-4: L2 Cache Control Register (L2CR). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-11

Register 7-1: Reset Event Register (RER) at 0xf820,0000 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-1

Register 7-2: Reset Command Register (RCR) at 0xf820,1000. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-2

Register 7-3: Reset Out Enable Register (ROER) at 0xf820,e000 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-2

Register 7-4: PmPPC7448 Interrupt Enable Register (IER) at 0xf820,2000 . . . . . . . . . . . . . . . . . . . . 7-4

Register 7-5: PmPPC7448 Interrupt Pending Register (IPR) at 0xf820,3000 . . . . . . . . . . . . . . . . . . . 7-4

Register 7-6: PmPPC7448 Product ID Register (PIR) at 0xf820,4000 . . . . . . . . . . . . . . . . . . . . . . . . . 7-5

Register 7-7: PmPPC7448 ERdy Register (ERdy) at 0xf820,5000. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-5

Register 7-8: Hardware Version Register (HVR) at 0xf820,7000 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-6

Register 7-9: PLD Version Register (PVR) at 0xf820,8000 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-6

Register 7-10: PmPPC7448 Board Configuration 3 (BCR3) at 0xf820,c000 . . . . . . . . . . . . . . . . . . . . . 7-6

Register 7-11: PmPPC7448 Board Configuration 1 (BCR1) at 0xf820,a000 . . . . . . . . . . . . . . . . . . . . . 7-7

Register 7-12: PmPPC7448 Board Configuration 0 (BCR0) at 0xf820,9000 . . . . . . . . . . . . . . . . . . . . . 7-7

Register 10-1: DMC Jumper Setting Register at 0xf820,6000. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-10

Register 10-2: DMC LED Register at 0xf820,d000 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-10

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Section 1

Overview

The Emerson PmPPC7448 module is a Processor PCI Mezzanine Card (PPMC). It is based on

the Freescale® Semiconductor PowerPC™ MPC7448 central processor unit and provides

additional processing power for the baseboard, which must be compatible with PPMC

architecture. The PmPPC7448 module supports various memory configurations, program-

mable user Flash memory, a PCI bridge/controller, three Ethernet interfaces, two serial

ports, as well as a real-time clock, and EEPROM.

COMPONENTS AND FEATURES

The following is a brief summary of the PmPPC7448 hardware components and features:

CPU: The Freescale MPC7448 RISC PowerPC microprocessor has an internal speed of up to 1.4

GHz and 166 MHz local bus speed. The MPC7448 includes 32 kilobytes separate level-one

(L1) data and instruction caches and 1 megabyte L2 cache. Standard power supply is 3.3

volts, with a configuration option for both 3.3 and 5 volts.

System Controller/PCI Bridge:

The Marvell® MV64460 (Discovery™III) is a single-chip solution that provides one PCI-X

bus, three integrated gigabit Ethernet Medium Access Control (MAC) controllers, two-

megabit integrated Synchronous Random Access Memory (SRAM), four Independent

Direct Memory Access (IDMA) engines and two XOR Direct Memory Access (DMA) engines.

The 64-bit PCI interface can operate up to 66 MHz (60X) or 133 MHz (PCI-X).

SDRAM: The PmPPC7448 includes a 32M x 72-bit Double Data Rate (DDR) Synchronous Dynamic

Random Access Memory (SDRAM) Small-Outline Dual In-line Memory Module (SO-DIMM).

Options include 256 megabytes, 512 megabytes, 1 gigabyte, and 2 gigabytes. The inter-

face implements eight additional bits to permit the use of error-correcting code (ECC). The

MV64460 bridge acts as the memory controller.

Flash: The PmPPC7448 includes Flash configuration options of 32 or 64 megabytes. The

PmPPC7448 is capable of booting from either an 8-bit, 32-pin PLCC ROM socket on the

Development Mezzanine Card (DMC) or from 32-bit soldered Flash (default).

Serial I/O: The PmPPC7448 includes up to two EIA-232 ports operating between 9600 and 115,200

baud. Serial port one is always routed to the Development Mezzanine Card (DMC) serial

connector; build options include connections to the front panel serial connector, or the P14

connector. When routed to P14, the port has the option of either EIA-232 or TTL signaling

levels. Serial port two is routed to P14 with the same signaling options.

Ethernet: The PmPPC7448 includes three Ethernet ports. Two Broadcom BCM5461S gigabit PHY

devices route Ethernet (ports 0 and 1) through connector P14. The Micrel KSZ8721CL

10/100 PHY device routes Ethernet (port 2) through a mini-USB connector on the front

panel. The Broadcom and Micrel devices are IEEE 802.3-compliant.

Overview: Components and Features

PmPPC7448 User’s Manual 10006757-02

1-2

Note: GbE ports (0 and 1) are routed through the PHYs directly to connector P14. Therefore, magnetics are

required on the Rear Transition Module (RTM) or baseboard.

CPLD: The PmPPC7448 uses a Complex Programmable Logic Device (CPLD) to implement various

memory-mapped registers and to control access to the Flash, ROM socket, and enumera-

tion of Monarch/non-Monarch systems.

RTC: The real-time clock is an ST®Microelectronics M41T00 Serial Access Timekeeper®.

Development Mezzanine Card (DMC):

The DMC is a custom, optional plug-on card mounted on the back of the PmPPC7448. This

card facilitates hardware and software development. See Chapter 10.

Overview: Functional Overview

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FUNCTIONAL OVERVIEW

The following block diagram provides a functional overview for the PmPPC7448:

Figure 1-1: General System Block Diagram

Motorola

MPC7448

Microprocessor

Flash

32/64 MB

10/100

Magnetics

10/100

PHY

GbE

PHY

GbE

PHY

Device

CPLD

EIA-232

Tranceivers

Marvell

Config.

SEEPROM

NVRAM

SEEPROM

8 KB

ST Micro

M41T00

RTC

DDR SDRAM

256 MB, 512 MB,

1 GB, 2 GB

SROM

P11

P12

P13

P14

512 K

Socketed

Flash

COP Debug

Jumpers

PLD JTAG

LEDs (4)

Development

Mezzanine Card

(DMC)

MPX Bus

up to 166 MHz

DMC Connector

MII

Device Bus

MPP Bits

DRAM Bus

133 MHz

Mini USB

Connector

Marvell

MV64460

System

Controller

Port 2

(portdbg)

Port 1

(portb)

Port 0

(porta)

GMII

Serial1

Serial2

I2C

PCI 0

1.1 V

Supply

1.25 V

Supply

1.8 V

Supply

1.5 V

Supply

2.5 V

Supply

3.3 V

Supply

Mini-USB

P2

Mini-USB

P1

Front Panel

PCI/PCI-X 64-bit PMC

(3.3 V only)

GPIO

Overview: Physical Memory Map

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PHYSICAL MEMORY MAP

Fig. 1-1 illustrates the PmPPC7448 memory map:

Figure 1-2: PmPPC7448 Memory Map

8000,0000

C000,0000

F810,0000

E800,0000

F800,0000

E9FF,FFFF

EBFF,FFFF

F820,0000

F830,0000

FFFF,FFFF

Hex Address

0000,0000

PCI 0

Memory

I/O

MV64460

CPLD

ROM Socket

Boot Mirror

Reserved

Flash

32 MB

Flash

64 MB

FF80,0000

Hex Address

F820,0000

Board Configuration Register 3

Reset Event Register

Reset Command Register

Interrupt Enable Register

Board Configuration Register 0

Board Configuration Register 1

DMC LED Register

PLD Version Register

Hardware Version Register

Jumper Settings Register

EREADY Register

Product ID Register

F820,1000

F820,2000

F820,4000

F820,5000

F820,6000

F820,7000

F820,8000

F820,9000

F820,A000

F820,B000

F820,C000

F820,D000

F820,E000

PCI Reset Out Enable Register

Reserved

MV64460 SRAM

F850,0000

F854,0000

Interrupt Pending Register

F820,3000

SDRAM

256 MB

SDRAM

512 MB

SDRAM

1 GB

0FFF,FFFF

1FFF,FFFF

3FFF,FFFF

Reserved

B000,0000

Reserved

SDRAM

2 GB

Overview: Physical Memory Map

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Table 1-1 summarizes the physical addresses for the PmPPC7448 and provides a reference

to more detailed information:

Table 1-1: Address Summary

1.If Monarch, read only; if non-Monarch, write only.

2.Depends on Flash size.

Hex Physical

Address:

Access

Mode: Description: See Page:

FF80,0000 R/W Boot Mirror –

F854,0000 – Reserved –

F850,0000 MV64460 SRAM 5-3

F830,0000 – Reserved –

F820,E000 R/W PCI Reset Out Enable register 7-2

F820,D000 W DMC LED register 10-10

F820,C000 R Board Configuration register 3 (BCR3) 7-6

F820,B000 – Reserved (BCR2) –

F820,A000 R/W Board Configuration register 1 (BCR1) 7-6

F820,9000 R Board Configuration register 0 (BCR0) 7-6

F820,8000 R PLD Version register (PVR) 7-6

F820,7000 R Hardware Version register (HVR) 7-6

F820,6000 R Jumper Settings register (JSR) 10-10

F820,5000 R/W

11

EReady (ERdy) register 7-5

F820,4000 R Product ID register (PIR) 7-5

F820,3000 R/W Interrupt Pending register (IPR) 7-4

F820,2000 R/W Interrupt Enable register (IER) 7-4

F820,1000 W Reset Command register (RCR) 7-2

F820,0000 R Reset Event register (RER) 7-1

F820,0000 R/W CPLD 7-1

F810,0000 R/W MV64460 5-5

F800,0000 R/W ROM Flash Socket 4-1

EBFF,FFFF – Reserved

2

–

E800,0000 R/W Flash (32 MB, 64 MB) 4-1, 11-14

C000,0000 – Reserved –

8000,0000 R/W PCI 0 — Memory and I/O Space 5-4

0000,0000 R/W SDRAM (256 MB, 512 MB, 1 GB, 2 GB) 4-2

Overview: Additional Information

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ADDITIONAL INFORMATION

This section lists the PmPPC7448 hardware regulatory certifications and briefly discusses

the terminology and notation conventions used in this manual. It also lists general technical

references.

Mean time between failures (MTBF) has been calculated at 309,632 hours using Telcordia

Issue 1 Method I Case 3.

Product Certification

The PmPPC7448 hardware has been tested to comply with various safety, immunity, and

emissions requirements as specified by the Federal Communications Commission (FCC),

Industry Canada (IC), Underwriters Laboratories (UL), and the European Union Directives

(CE mark). The following table summarizes this compliance:

Table 1-2: Regulatory Agency Compliance

Type: Specification:

Safety UL60950-1, CSA C22.2 No. 60950-1-03, 1st Edition – Safety of

Information Technology Equipment, including Electrical Business

Equipment (Bi-National)

IEC60950/EN60950 – Safety of Information Technology Equipment

(Western Europe)

AS/NZS 60950– Safety Standard for Australia and New Zealand

Environmental NEBS: Telcordia GR-63 –

Section 4.1 Transportation and Storage

Section 4.3 Equipment Handling

Section 4.4.3 Office Vibration

Section 4.4.4 Transportation Vibration

Section 4.5 Airborne Contaminants

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Emerson PMPPC7448 User manual

Emerson PMPPC7448 User manual

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