Texas Instruments TRF372017EVM (Rev. A) User guide

Type
User guide

Texas Instruments TRF372017EVM (Rev. A) is a high-performance, direct up-conversion device, integrating a high-linear, low-noise IQ modulator and an integer-fractional PLL/VCO. The device is capable of converting complex modulated signals from baseband or IF directly up to RF frequencies ranging from 300 MHz to 4.8 GHz. The PLL/VCO, along with the internal 2/4/8 divider configuration as shown in the following table, is used to obtain the desired frequency.

Texas Instruments TRF372017EVM (Rev. A) is a high-performance, direct up-conversion device, integrating a high-linear, low-noise IQ modulator and an integer-fractional PLL/VCO. The device is capable of converting complex modulated signals from baseband or IF directly up to RF frequencies ranging from 300 MHz to 4.8 GHz. The PLL/VCO, along with the internal 2/4/8 divider configuration as shown in the following table, is used to obtain the desired frequency.

User's Guide
SLWU068AOctober 2010Revised November 2010
TRF372017EVM
The TRF372017 is a high-performance, direct up-conversion device, integrating a high-linear, low-noise IQ
modulator and an integer-fractional PLL/VCO. The device is capable of converting complex modulated
signals from baseband or IF directly up to RF frequencies ranging from 300 MHz to 4.8 GHz. The
PLL/VCO, along with the internal 2/4/8 divider configuration as shown in the following table, is used to
obtain the desired frequency.
VCO Frequency Div by 2 Div by 4 Div by 8
Part
Number
Fmin Fmax Fmin Fmax Fmin Fmax Fmin Fmax
TRF372017 2400 4800 1200 2400 600 1200 300 600
This document outlines the basic procedures for connecting the evaluation module (EVM) to test
equipment for basic testing.
1 Power Requirements
The TRF372017 requires a 3.3-Vdc Vcc power supply through test-point TP2 and 5-Vdc Vcc power supply
through test-point TP5.
Removing jumper JP6 enables the onboard regulator. With the onboard regulator enabled, the 5-V supply
is regulated to provide 3.3 V, and no direct 3.3-V connection through TP2 is required. High-performance
analog measurements must not be performed using the onboard regulator.
2 TRF372017 Operating Procedures for Modulator and Internal VCO Mode
1. Connect the USB to the computer and the mini-USB to the EVM board.
2. Power-supply connections:
(a) Set the 3.3-V supply current limit to 450 mA.
(b) Set the 5-V supply current limit to 200 mA.
(c) Connect the 3.3-V supply to TP2, 5-V supply to TP5, and common ground to TP4.
(d) Switch on the Vcc 3.3-V supply.
(e) Switch on the Vcc 5-V supply.
3. Input connections: Use a DAC or an arbitrary waveform generator to provide I/Q input signals at 1.7
Vdc to J3/J4 and J9/J10. By default, the EVM ac couples the I/Q signals to the device.
4. Output connections:
(a) To measure the PLL output: Connect a spectrum analyzer to the SMA connector marked LON (J1)
or LOP (J5) to monitor the VCO output single-ended. These output nodes can be used for two
purposes:
(i) Check the PLL functionality and measure the frequency range.
(ii) Use the TRF372017 in the PLL/VCO mode alone.
(b) To measure the modulator output: Connect a spectrum analyzer to the SMA connector marked
RF_OUT (J6) to monitor the up-converted signal in the regular operational mode (default mode of
operation).
5. Run the TRF372017 GUI software.
6. Click Reset USB to reset the USB connection.
7. Click on Write All Regs to load the GUI default settings to the device.
8. On start, the LOP and LON outputs and the RF_OUT output are disabled. Enable them as follows:
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TRF372017 Operating Procedures for Modulator and Internal VCO Mode
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(a) To enable the PLL output: toggle PWD_OUT_BUFF and PWD_LO_DIV from PDn to PUp.
(b) To enable the RF_OUT output: toggle PWD_TX_DIV, PWD_BB_VCM, from PDn to PUp. If offset
adjustment is performed, also toggle PWD_DC_OFFSET from PDn to PUp.
9. Click Calc to initialize the PLL divider settings.
10. Toggle the EN_CAL control from Idle to Exec Cal to perform a calibration and lock the PLL/VCO at the
default setting.
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TRF372017 GUI Setup and Board Options
space
11. The GUI settings now look as follows:
12. To change frequencies, enter the desired operating frequency in the RF Target (MHz) control. The
GUI automatically calculates resulting frequencies to display in the Freq Calculations display. It also
automatically calculates values for the necessary register settings and writes those values to the
device. The calculated register entries are highlighted in blue.
3 TRF372017 GUI Setup and Board Options
Place the mouse over any control that corresponds directly to a register bit to see a brief description of the
control functionality and the corresponding SPI bit. More detailed descriptions may be found in the
TRF372017 data sheet (SLWS224).
1. RF Frequencies
RF frequency control is split into sets of controls and outputs.
(a) Frequency controls. The Ref Freq (MHz) control must be set to match the frequency injected onto
the DUT REFIN terminal. By default, the EVM is configured to use a 40-MHz VCO included on the
board. Jumpers are included to allow the user to connect an external signal to connector
EXT_REF (J8). Remove JP3 and JP4 to use an external reference signal.
(b) Frequency controls. VCO Target (MHz) must be set to the desired VCO frequency. This is the
frequency at which the VCO oscillates, before any divider, and may not match the final RF output
frequency. This control is a factor in determining the PLL N-divider factor.
(c) Frequency controls. RF Step (MHz) is used by the GUI to set the PLL R-divider, prior to the PFD.
(d) RF outputs. LO Freq Actual (MHz) is calculated by the GUI software based on the R Divider, N
Divider, and LO Divider settings.
(e) RF outputs. Mix Freq Actual (MHz) is calculated by the GUI software based on the R Divider, N
Divider, and Tx Divider settings.
(f) Frequency calculations. By default, changing any control in the Freq Targets area initiates a
recalculation of register values.
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space
2. Program Control
Program controls provide an interface to the GUI function without directly impacting the register
settings.
(a) STOP. The STOP button must be used to terminate program operation. Terminating the program
through other means may require a USB reset to re-establish USB communications.
(b) Reset USB. The USB-to-SPI converter device is powered through the USB connection, not the
DUT supplies. This button can be used to reset the USB session.
(c) Write All Registers. The Write All Registers button initiates a write to each register using the
displayed values. The write sequence starts with the lowest numbered register and proceeds
sequentially to the highest numbered register. If the Read Reg Mod control is set to verify the
writes by reading the registers, then the read registers occur after all writes have been completed.
(d) Read All Registers. The Read All Registers button initiates a read of each register, starting with
register 1, proceeding sequentially to register 7, and finishing with register 0.
(e) Write Reg Mode. When the Write Reg Mode control is set to Upon value entry, changing any
displayed register setting or frequency target initiates a write of the impacted registers. When it is
toggled to Write button only, register writes only occur when the Write All Registers or Write Reg n
buttons are used.
(f) Read Reg Mode. When the Read Reg Mode button is set to Verify register write, each write
sequence is followed by a read sequence for the affected registers. When it is set to Read button
only, register reads only occur when the Read All Registers or Read Reg n buttons are used.
(g) Save Regs to File. The Save Regs to File button saves all of the displayed register values to a file.
(h) Load Regs from File. The Load Regs from File button loads a previously saved set of register
values into the displayed controls. The loaded values are not automatically written to the DUT.
3. Register 0
(a) Register 0 is used to initiate register Readback for each register. Writes to register 0 for the
purpose of reading back registers are performed with every read operation.
(b) Readback bits from register 0 can either indicate VCO calibration results or frequency counter
results depending on the value of the VCO_TESTMODE control. The register 0 readback display
changes appropriately with the VCO_TESTMODE control. When VCO_TESTMODE is set to On,
the register 0 display shows both the count bits and a calculated value indicating the
corresponding approximate frequency.
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Revision History
Revision History
Changes from Original (October, 2010) to A Revision ................................................................................................... Page
Changed document title ................................................................................................................. 1
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
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Copyright © 2010, Texas Instruments Incorporated
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BBQ_P
RF_OUT
LO_OUT_N
LO_OUT_P
BBI_N
EXT_VCO
BBI_P
BBQ_N
GND
GND
GND
GND
GND
GND
+3.3V
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
+3.3V
GND
+3.3V
+3.3V+5.0V
GND GND GND GND
GND
GND GND
GND
+3.3V
GND
GND
+3.3V
GND
+3.3V
GND
GND
GND
GND
+5.0V
+5.0V
GND
GND
GND GND
+3.3V
+3.3V
GND GND
GND
GND
GND
GND
GND
GND
GND
GND
GNDGND
GND
GND
GND
GND
GND
GND GND
+3.3V
+5.0V
GND
+5.0V
GND GND
GND
GND
GND
+3.3V
GND GND
GND
+3.3V
GND GND
+5.0V
RF_VTUNE SH2
RF_CP_OUTSH2
RDBKSH2
REFINSH2
LESH2
DATASH2
CLKSH2
Title
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TRF3720 EVM
B
12Wednesday, October 28, 2009
Title
Size Document Number Rev
Date: Sheet of
TRF3720 - SCH
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TRF3720 EVM
B
12Wednesday, October 28, 2009
Title
Size Document Number Rev
Date: Sheet of
TRF3720 - SCH
C
TRF3720 EVM
B
12Wednesday, October 28, 2009
JV SMITH
12500 TI Boulevard. Dallas, Texas 75243
Engineer:
Drawn By:
P HANISH
C63
100pF
C63
100pF
JP1
RSVD2
(SHUNT 2-3)
JP1
RSVD2
(SHUNT 2-3)
1
3
2
R83
100
DNI
R83
100
DNI
C22
1uF
DNI
C22
1uF
DNI
C43
.1uF
DNI
C43
.1uF
DNI
C13
1.8pF
C13
1.8pF
C50
4.7pF
C50
4.7pF
C40
4.7pF
C40
4.7pF
C12 1.8pF
DNI
C12 1.8pF
DNI
R81
49.9
DNI
R81
49.9
DNI
C21 22pFC21 22pF
C7 1.8pF
DNI
C7 1.8pF
DNI
C23
1uF
DNI
C23
1uF
DNI
TP17
RED
QP
TP17
RED
QP
C45
4.7pF
DNI
C45
4.7pF
DNI
TP15
RED
QN_QP
TP15
RED
QN_QP
TP3
BLK
GND
TP3
BLK
GND
C39
1uF
C39
1uF
C1
.1uF
C1
.1uF
R7 0R7 0
SMA
END
J9
QN
SMA
END
J9
QN
1
5234
R70
49.9
DNI
R70
49.9
DNI
R10 1uFR10 1uF
TP18
RED
IN
TP18
RED
IN
C60
1000pF
C60
1000pF
TP19
RED
IP
TP19
RED
IP
1K
FB6
1K
FB6
R74 100
DNI
R74 100
DNI
C61
100pF
C61
100pF
C11 47pFC11 47pF
JP6JP6
1
2
C69
1uF
C69
1uF
TP8
RED
LD
TP8
RED
LD
SMA
END
J1
LO_OUT_N
SMA
END
J1
LO_OUT_N
1
5234
C10 4.7pFC10 4.7pF
C18
4.7pF
C18
4.7pF
C6 47pFC6 47pF
D2
LED BLUE
D2
LED BLUE
12
1K
FB11
DNI
1K
FB11
DNI
C58
1uF
C58
1uF
R21 75R21 75
1K
FB4
1K
FB4
R79100
DNI
R79100
DNI
R71
49.9
DNI
R71
49.9
DNI
R72
49.9
DNI
R72
49.9
DNI
TP13
RED
VCO
TP13
RED
VCO
C28
4.7pF
C28
4.7pF
R73
100
R73
100
R77
49.9
DNI
R77
49.9
DNI
1K
FB8
1K
FB8
C56
4.7pF
DNI
C56
4.7pF
DNI
TP4
BLK
GND
TP4
BLK
GND
C51
4.7pF
C51
4.7pF
C4
.1uF
C4
.1uF
C53
4.7pF
C53
4.7pF
C48
4.7pF
C48
4.7pF
C32
.1uF
DNI
C32
.1uF
DNI
R80100
DNI
R80100
DNI
SMA
END
J10
QP
SMA
END
J10
QP
1
5234
C37
1uF
C37
1uF
R19
15K
R19
15K
C3
1.8pF
C3
1.8pF
C57
100pF
C57
100pF
R15
10K
R15
10K
12
R3
1uF
R3
1uF
C54
4.7pF
C54
4.7pF
C62
100pF
C62
100pF
C64
.1uF
C64
.1uF
R22 75R22 75
C17
4.7pF
C17
4.7pF
SMA
END
J2
EXT_VCO
SMA
END
J2
EXT_VCO
1
5234
R2
1uF
R2
1uF
R11 1uFR11 1uF
SMA
END
J5
LO_OUT_P
SMA
END
J5
LO_OUT_P
1
5234
TP1
BLK
GND
TP1
BLK
GND
1K
FB2
1K
FB2
1K
FB9
1K
FB9
SMA
END
J6
RF_OUT
SMA
END
J6
RF_OUT
1
5234
JP2
PWRSAVE
(SHUNT 2-3)
JP2
PWRSAVE
(SHUNT 2-3)
1
3
2
C2
1uF
C2
1uF
R13 0R13 0
SMA
END
J3
IN
SMA
END
J3
IN
1
5234
C59
1uF
C59
1uF
U1
TRF3720
U1
TRF3720
PWR_SAVE
1
RDBK
2
VCC_SD
3
GND_SD
4
LD
5
GND
6
VCC_LO
7
GND
8
BBQ_N
9
BBQ_P
10
GND
11
GND
12
GND
13
RSVD1
14
GND
15
GND
16
GND
17
RFOUT
18
GND
19
VCC
20
VCC
21
GND
22
GND
23
GND
24
GND
25
GND
26
BBI_P
27
BBI_N
28
GND
29
VCC_LO
30
GND
31
VCC_VCO
32
LO_OUTN
33
LO_OUTP
34
VCC_VCO
35
EXT_VCO
36
GND
37
VTUNE
38
GND
39
CP_OUT
40
PWRPAD
49
VCC_PLL
41
GND
42
REFIN
43
GND
44
LE
45
DATA
46
CLK
47
RSVD2
48
U3
TPS79533DCQ
U3
TPS79533DCQ
EN
1
IN
2
GND
3
GND
6
NR/FB
5
OUT
4
C31
.1uF
DNI
C31
.1uF
DNI
C8
.1uF
DNI
C8
.1uF
DNI
R69
49.9
DNI
R69
49.9
DNI
1K
FB1
1K
FB1
C16
4.7pF
C16
4.7pF
C66
.1uF
C66
.1uF
C68
1000pF
C68
1000pF
R82
49.9
DNI
R82
49.9
DNI
C65
1uF
C65
1uF
R12
0
DNI
R12
0
DNI
C41
4.7pF
C41
4.7pF
TP5
RED
+5.0V
TP5
RED
+5.0V
R76
100
R76
100
SMA
END
J4
IP
SMA
END
J4
IP
1
5234
1K
FB3
1K
FB3
C42
100uF
C42
100uF
R78
49.9
DNI
R78
49.9
DNI
R1
49.9
DNI
R1
49.9
DNI
C46
4.7pF
DNI
C46
4.7pF
DNI
C38
1uF
C38
1uF
C44
47pF
DNI
C44
47pF
DNI
C27
1000pF
C27
1000pF
C9
.1uF
DNI
C9
.1uF
DNI
C55
4.7pF
DNI
C55
4.7pF
DNI
PP1PP1
1
C5
1uF
C5
1uF
C52
4.7pF
C52
4.7pF
1K
FB5
1K
FB5
TP16
RED
QN
TP16
RED
QN
C24
4.7pF
C24
4.7pF
R75 100
DNI
R75 100
DNI
TP2
RED
+3.3V
TP2
RED
+3.3V
C49
4.7pF
C49
4.7pF
TP14
RED
IN_IP
TP14
RED
IN_IP
C47
4.7pF
C47
4.7pF
TP20
BLK
GND
TP20
BLK
GND
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
EXT_REF
GND
GND
GND
GND
GND GNDGND GND
GND GND
GND GND
GND
GND
GND
GNDGND
GND
+3.3V
GND
RF_CP_OUTSH1
RF_VTUNESH1REFIN SH1
CLK SH1
DATA SH1
LE SH1
RDBK SH1
Title
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Date: Sheet
of
TRF3720 - SCH
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TRF3720 EVM
B
22Wednesday, October 28, 2009
Title
Size Document Number Rev
Date: Sheet of
TRF3720 - SCH
C
TRF3720 EVM
B
22Wednesday, October 28, 2009
Title
Size Document Number Rev
Date: Sheet of
TRF3720 - SCH
C
TRF3720 EVM
B
22Wednesday, October 28, 2009
SERIAL INTERFACE
RF VCO SELECT
RF/IF FREQ REF
INTERFACE
BOARD STANDOFFS
MT4MT4
1
R5
5K
R5
5K
1 2
C29
47pF
C29
47pF
C20
47pF
C20
47pF
1 2
TP12
RED
VTUNE
TP12
RED
VTUNE
MT1MT1
1
C36
.1uF
C36
.1uF
C14
4.7pF
C14
4.7pF
1 2
TP6
RED
RDBK
TP6
RED
RDBK
SCREW PHIL 4-40 X 3/8"SCREW PHIL 4-40 X 3/8"
C30
.1uF
DNI
C30
.1uF
DNI
1 2
C35
47pF
C35
47pF
TP9
RED
CLK
TP9
RED
CLK
SCREW PHIL 4-40 X 3/8"SCREW PHIL 4-40 X 3/8"
TP7
RED
LE
TP7
RED
LE
SMA
END
J8
EXT_REF
SMA
END
J8
EXT_REF
1
5234
R4
0
R4
0
1 2
C15
2.2pF
DNI
C15
2.2pF
DNI
1 2
TP11
BLK
GND
TP11
BLK
GND
TP10
RED
DATA
TP10
RED
DATA
U2
FT245RL
U2
FT245RL
USBDM
16
USBDP
15
VCCIO
4
NC1
8
RESET
19
NC2
24
OSCI
27
OSCO
28
3V3OUT
17
AGND
25
GND
7
GND
18
GND
21
TEST
26
PWREN
12
WR
14
D1
5
D7
6
D5
9
D6
10
TXE
22
D4
2
D3
11
RXF
23
D0
1
RD
13
VCC
20
D2
3
C25
.01uF
C25
.01uF
J7
USB_SUPER-MINI_AB
J7
USB_SUPER-MINI_AB
VBUS
1
D-
2
D+
3
ID
4
GND
5
GND1
6
GND2
7
GND3
8
GND4
9
C34
.1uF
C34
.1uF
C67
100pF
C67
100pF
SCREW PHIL 4-40 X 3/8"SCREW PHIL 4-40 X 3/8"
R20
1M
R20
1M
12
JP3JP3
1
2
120
FB7
120
FB7
MT3MT3
1
D1
LED BLUE
D1
LED BLUE
1 2
JP4JP4
1
2
R68 0R68 0
R18
0
DNI
R18
0
DNI
1 2
R17
1K
R17
1K
12
SCREW PHIL 4-40 X 3/8"SCREW PHIL 4-40 X 3/8"
R8
15K
R8
15K
R6
10K
R6
10K
12
C26 22pFC26 22pF
MT2MT2
1
C33
.1uF
C33
.1uF
1 2
R9
0
R9
0
12
1K
FB10
1K
FB10
C19
560pF
C19
560pF
1 2
R14
10K
DNI
R14
10K
DNI
12
R16
49.9
DNI
R16
49.9
DNI
1 2
Y1
WH2302E-40C31
Y1
WH2302E-40C31
EN
1
VCC
4
OUT
3
GND
2
Evaluation Board/Kit Important Notice
Texas Instruments (TI) provides the enclosed product(s) under the following conditions:
This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION
PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the
product(s) must have electronics training and observe good engineering practice standards. As such, the goods being provided are
not intended to be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations,
including product safety and environmental measures typically found in end products that incorporate such semiconductor
components or circuit boards. This evaluation board/kit does not fall within the scope of the European Union directives regarding
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Texas Instruments TRF372017EVM (Rev. A) User guide

Type
User guide

Texas Instruments TRF372017EVM (Rev. A) is a high-performance, direct up-conversion device, integrating a high-linear, low-noise IQ modulator and an integer-fractional PLL/VCO. The device is capable of converting complex modulated signals from baseband or IF directly up to RF frequencies ranging from 300 MHz to 4.8 GHz. The PLL/VCO, along with the internal 2/4/8 divider configuration as shown in the following table, is used to obtain the desired frequency.

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