Analog Devices DC2685A Demo Manual

Analog Devices
Brand
Analog Devices
Model
DC2685A
Type
Demo Manual
1
UG-1339 Rev 0
DEMO MANUAL DC2685A
DESCRIPTION
DC2683A and DC2684A
LTC4292/LTC4291
4-Port IEEE 802.3bt PSE
Demonstration circuit DC2685A is a 4-port IEEE802.3bt
power sourcing equipment (PSE) composed of a
DC2684A (daughter card) and DC2683A (mother-
board). The DC2685A (kit) is used for evaluation of the
LTC4292/LTC4291 PSE chipset. Up to four IEEE802.3af,
IEEE802.3at, or IEEE802.3bt powered devices (PDs) can
be connected and powered from this system using a sin-
gle power supply. A DC590 is connected to the DC2685A
for I
2
C interfacing with QuikEvalâ„¢.
All registered trademarks and trademarks are the property of their respective owners.
BOARD PHOTO
This demonstration manual provides a quick start pro-
cedure, a DC2684A daughter card overview, a DC2683A
mother board overview, schematics, and layout printouts.
Design files for this circuit board are available at
http://www.analog.com/DC2685A
2
UG-1339 Rev 0
DEMO MANUAL DC2685A
QUICK START PROCEDURE
Follow the quick start procedure below for basic operation
of the DC2685A kit. Refer to Figure 1 through Figure 3
and Table 1 through Table 4 for proper equipment setup.
1. On the DC2684A daughter card set 4PV# jumper JP2
(Figure 1) to a selected 4-Pair Valid setting as shown
in Table 1.
2. On the DC2684A daughter card set PM1 jumper JP4
and PM0 jumper JP3 (Figure 1) to the power mode
for evaluation specified in Table 2.
3. Align pin 1 of the 30-pin male connector on the
DC2684A daughter card with pin 1 of the 30-pin
female connector on the DC2683A motherboard
as shown in Figure 2. Pin 12 is polarized to assist
with the alignment. Carefully push the daughter card
straight down until the male and female 30-pin con-
nectors are flush with each other.
4.
Connect a supply to the motherboard with the posi-
tive rail to AGND (+) and negative rail to V
EE
(–) as
shown in Figure 3. Use a power supply capable of
sourcing the maximum delivered power for all four
ports set by JP3 and JP4 on the daughter card (or
I
2
C configured power). Ramp the supply up to within
the recommended voltage range specified in Table 3.
5. Set the LTC4292/LTC4291 I
2
C address switch SW1
on the motherboard to the one of the four addresses
shown in Table 4.
6. On the DC590, set the VCCIO jumper JP6 to 3.3V.
(Refer to Table 5 and the DC590 demo manual for
further instructions for the DC590.)
7. Connect the DC590 to the DC2683A at connector
J6 with a 14-pin ribbon cable as shown in Figure 3
and open the QuikEval GUI. A GUI for the LTC4292/
LTC4291 is brought up by QuikEval. (Follow the
DC590 demo manual instructions if this has not been
previously setup.)
8. Follow the instructions in the LTC4291 PSE GUI
Users Manual for GUI operation. Firmware must be
downloaded before proceeding with evaluation of the
LTC4292/LTC4291.
9. Connect up to four PDs to the DC2685A RJ45 con-
nector J1
, bottom row ports
1-4 as shown in Figure
3.
10. Optionally a 1000BASE-T data source may be con-
nected to the DC2685A RJ45 connector J1, top row
ports 1-4 for data pass through testing.
3
UG-1339 Rev 0
DEMO MANUAL DC2685A
QUICK START PROCEDURE
Figure 1. DC2684A Jumpers: 4PV#, PM0 and PM1
Figure 2. Inserting the DC268A Daughter Card Into J7 of the DC2683A Motherboard
4
UG-1339 Rev 0
DEMO MANUAL DC2685A
QUICK START PROCEDURE
Table 1. DC2684A 4PV# Jumper Settings
JUMPER SETTING OPERATION
4PV# (JP2) LO Port powered only when both
pairsets present a valid signature
HI Any pairset presenting a valid
signature is powered
Table 3. DC2685A Power Supply Voltage Range per PSE Type
IEEE TYPE Supply Voltage Range
Type 3 51V to 57V
Type 4 53V to 57V
Table 4. DC2685A Address Settings
SW3
ADDRESS
AD3 AD2
LO LO 20h
LO HI 24h
HI LO 28h
HI HI 2Ch
Table 2. DC2684A Auto Mode Maximum Delivered Power Capabilities
Jumper Settings
PM1
(JP4)
PM0
(JP3)
Max Port Power
(Single-Signature)
Max Pairset Power
(Dual-Signature)
LO
LO 40W 13W
LO HI 51W 25.5W
HI LO 62W 25.5W
HI HI 71.3W 35.6W
Figure 3. DC2685A Kit Connections
5
UG-1339 Rev 0
DEMO MANUAL DC2685A
DEMONSTRATION CIRCUIT 2684A DAUGHTER CARD
Figure 4. DC2684A Digital and Analog Isolation
Demonstration circuit 2684A is an IEEE802.3bt 8-channel
PSE daughter card that features the LTC4292/LTC4291
chipset. This daughter card mates with a 4-Port, 4-Pair
PoE motherboard for use in IEEE 802.3bt Type 3 or 4
compliant Power over Ethernet PSE systems.
Board Layout
Parts placement, sense resistor block and Kelvin sens-
ing, copper fill, trace routing, and spacing are crucial
for LTC4292/LTC4291 chipset operation, robustness,
and measurement accuracy. It is imperative to fol
-
low the layout requirements specified in the LTC4292/
LTC4291 data sheet. The DC2684A demonstrates proper
LTC4292/LTC4291 board layout on a compact daughter
card approximately the height and width of a 2 × 4 RJ45
connector.
Isolation and Power Supplies
The LTC4292/LTC4291 chipset provides communication
across an isolation barrier through a data transformer
(Figure 4). All digital pins reside on the digital ground
reference and are isolated from the analog PoE supply on
the daughter card layout. A V
DD
logic supply and V
EE
PoE
supply is brought in at the 30-pin connector J1.
V
DD33
V
DD
T1
DND
CPD
CND
DPD
AGNDP
V
EE
DNA
V
EE
V
EE
ISOLATION
WÃœRTH 7490100143
CPA
30-PIN
CONNECTOR
DC2684 SIDE MOTHERBOARD SIDE
V
DD
SUPPLY
V
EE
SUPPLY
CNA
DPA
TX
+
RX
–
CT(4)
CT(2)
RX
+
TX
–
TD
+
RD
–
CT(3)
CT
RD
+
TD
–
U2
LTC4291
U1
LTC4292
C23
1µF
C21
0.1µF
R13
100Ω
DC2685A F04
DGND
C19
1µF
100V
D1
SMAJ58A
R14
100Ω
C22
1µF
R15
100Ω
R16
100Ω
R21
100Ω
R35
10Ω
R22
100Ω
R23
100Ω
R24
100Ω
C24, 2.2nF
2kV
TVS
BULK
C
BULK
+
–
+
–
+
6
UG-1339 Rev 0
DEMO MANUAL DC2685A
I/O LED Indicators
The DC2684A features two LEDs to indicate the states
of the LTC4292/LTC4291 general purpose input/output
pins GP0 and GP1. These pins are configured as inputs
or outputs via I
2
C. GP1 and GP0 are referenced to DGND
and driven by the LTC4291 when set as outputs (Figure
5). J2 provides test points for these pins.
DEMONSTRATION CIRCUIT 2684A DAUGHTER CARD
V
DD
GP1
GP0
DGND
J2, PIN 5
J2, PIN 6
U2
LTC4291
DC2685A F05
R28
560Ω
R29
560Ω
D3
GRN
GP0
D2
GRN
GP1
Figure 5. DC2684A, LTC4291 General Purpose I/O LED Indicators
Figure 6. DC2684A, LTC4291 I
2
C and Address Connections
I
2
C Communication and Addressing
The LTC4292/LTC4291 internal registers are accessed via
I
2
C to read and/or write configuration, status, events and
interrupt registers. The I
2
C lines SDAOUT, SDAIN and SCL
connect to the 30-pin connector (Figure 6). Subsequently,
the I
2
C bus is accessed on the motherboard. SDAOUT and
SDAIN are tied together through shunt resistor R11 on
the DC2684A for a common SDA line.
The LTC4291 address pins AD0 and AD1 are tied to DGND
through shunt resistors R9 and R10 respectively. This
sets these two address bits low. Address pins AD2 and
AD3 are brought out to the 30-pin connector for configu
-
ration on the motherboard. See Figure 6 and Table 4.
4PV# Jumpers
The 4PVALID pin of the LTC4291 is set by the 4PV# jumper
JP2 on the DC2684A. See Table 1 for jumper settings. This
jumper configuration along with Auto mode reset state is
used to automatically determine the number of powered
pairs. Refer to Table 1 for the configuration description.
DGND
SDAOUT
SDAIN
SCL
INT
SDAOUT
SDAIN
SCL
INT
AD3
AD2
AD1
AD0
AD3
AD2
TO 30-PIN
CONNECTOR
U2
LTC4291
R11
0Ω
DC2685A F06
R9
0Ω
R10
0Ω
Power Mode and Power Path Components
The DC2684A power mode jumpers PM1 and PM0 either
tie the respective LTC4292/LTC4291 PWRMD1 and
PWRMD0 pins to V
EE
or CAP2 through a 100Ω resis-
tor. This configures the maximum port output power in
the Auto mode reset state (see Table 2). The power path
components (Hot Swap MOSFETs and resistors) for each
channel on the DC2684A have been selected to handle all
four power levels.
Surge Protection
The DC2684A has basic surge protection components
across the V
EE
supply, V
EE
and AGNDP supply pins, and
OUTnM pins. Refer to the LTC4292/LTC4291 hardware
data sheet for further details on surge protection. D5
and C27 on the DC2684A provide example bulk TVS and
capacitance components; these components must be
sized to the final system requirements.
7
UG-1339 Rev 0
DEMO MANUAL DC2685A
DEMONSTRATION CIRCUIT 2683A MOTHER BOARD
Demonstration circuit 2683A is a 4-Port, 2-channels per
port IEEE 802.3bt PoE PSE motherboard. This board
accepts an IEEE 802.3bt four port PSE daughter card
featuring the LTC4292/LTC4291 chipset.
Daughter Card Insertion Precautions
When inserting or removing the daughter card into the
DC2683A motherboard, verify all supplies and LEDs are
off. Push the card straight down for insertion or pull
straight up for removal to avoid bending the connector
pins. Follow the instructions in the Quick Start Procedure
for alignment.
Main V
EE
PoE Supply
The V
EE
supply is the main PoE supply and connects to
the DC2683A with the positive rail to AGND (+) and the
negative rail to V
EE
(–) as shown in Figure 3 of the Quick
Start Procedure. The voltage must be within the range
shown in Table 3 depending on the application PSE type.
For full load testing at each port, choose a power supply
that is set with a current limit higher than the maximum
allowed output power at each port.
Onboard 3.3V Supply
The DC2683A motherboard has an onboard (non-isolated)
3.3V LDO for the LTC4292/LTC4291 V
DD
supply which is
generated from the V
EE
supply. This onboard logic supply
is for demonstration purpose to allow for a single sup-
ply connection to the DC2685A kit. DGND is tied to V
EE
through shunt resistor R42. To isolate the logic supply
from the PoE supply, remove R42 and R41 and apply an
external isolated 3.3V supply across V
DD
and DGND. If
the DC2685A kit is connected in parallel for multi-quad
port evaluation, verify all ground connections are correct
before applying power.
LED Indicators
V
EE
LED (D5) and V
DD
LED (D7) indicate if a voltage is
present at these supplies. Verify these LEDs are off before
inserting or removing the daughter card.
Each pairset channel (2 per port) has a respective OUTnM
LED to indicate if the channel is powered on with PoE.
The INT LED (D6) indicates if the interrupt line is pulled
low by the daughter card. When the interrupt is cleared
(high) via I
2
C interrupt servicing, the LED is turned off.
Digital Connections
The DC590 (USB to I
2
C) controller board is connected
to the DC2683A at J6 through a 14-pin ribbon cable. The
QuikEval software must be previously installed. When
QuikEval is opened, the software will automatically detect
the DC2685A kit and open the LTC4291 GUI.
I
2
C address pins AD3 and AD2 are set with a 2-bit switch
SW3 on the DC2683A. Refer to Table 4 for setting the
individual I
2
C address for each DC2685A kit.
Turret digital test points for SCL, SDA, DGND, INT, MSD,
and RESET are provided on the DC2683A.
RJ45 Connections
PDs are connected using an Ethernet cable to any of the
bottom row ports at 2 × 4, RJ45 connector J1 on the
DC2683A. Test points for each channel output OUT1A
through OUT4B, are provided. Optionally, an Ethernet data
source may be connected with an Ethernet cable to any of
the top row ports at J1.
MSD and RESET Pushbuttons
Pushbutton switch SW1, when pressed, pulls the RESET
pin of the daughter card logic low. The PSE controller
is then held inactive with all ports off. When SW1 is
released, RESET is pulled high, and the PSE returns to
the AUTO pin reset state.
Pushbutton switch SW2, when pressed, pulls the mask-
able shutdown input (MSD) pin of the daughter card logic
low. When pressed, all ports that have their corresponding
mask bit set in the mconfig register of the PSE controller
will be shutdown. These ports must then be manually
re-enabled via I
2
C or by resetting the PSE.
8
UG-1339 Rev 0
DEMO MANUAL DC2685A
Table 5. DC590 Jumper Selection. Refer to the DC590 Demo Manual for Further Details.
JUMPER SETTING OPERATION
JP1 PROG Microcontroller in-circuit programming header. Do NOT install jumper; make no
connections.
JP2 MODE Do NOT install jumper; make no connections.
JP3 Watchdog Enables Do NOT install jumper; make no connections.
JP4 EE Jumper MUST be in the EN position.
JP5 SW
(Right Hand Side)
MUST be in the ON position.
See Connections section.
ISO
(Left Hand Side)
Controls the isolated supply.
See Connections section.
JP6 VCCA Control See Connections section.
SUPPLEMENTARY
9
UG-1339 Rev 0
DEMO MANUAL DC2685A
DC2684A DAUGHTER CARD LAYOUT FILES
Figure 7. DC2684A Top Silkscreen
Figure 8. DC2684A Top Layer
10
UG-1339 Rev 0
DEMO MANUAL DC2685A
DC2684A DAUGHTER CARD LAYOUT FILES
Figure 9. DC2684A Inner Layer 2
Figure 10. DC2684A Inner Layer 3
11
UG-1339 Rev 0
DEMO MANUAL DC2685A
DC2684A DAUGHTER CARD LAYOUT FILES
Figure 11. DC2684A Bottom Layer
Figure 12. DC2684A Bottom Silkscreen
12
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DEMO MANUAL DC2685A
DC2683A MOTHER BOARD LAYOUT FILES
Figure 13. DC2683A Top Silkscreen
13
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DEMO MANUAL DC2685A
DC2683A MOTHER BOARD LAYOUT FILES
Figure 14. DC2683A Top Layer
14
UG-1339 Rev 0
DEMO MANUAL DC2685A
Figure 15. DC2683A Inner Layer 2
DC2683A MOTHER BOARD LAYOUT FILES
15
UG-1339 Rev 0
DEMO MANUAL DC2685A
Figure 16. DC2683A Inner Layer 3
DC2683A MOTHER BOARD LAYOUT FILES
16
UG-1339 Rev 0
DEMO MANUAL DC2685A
Figure 17. DC2683A Bottom Layer
DC2683A MOTHER BOARD LAYOUT FILES
17
UG-1339 Rev 0
DEMO MANUAL DC2685A
Figure 18. DC2683A Bottom Silkscreen
DC2683A MOTHER BOARD LAYOUT FILES
18
UG-1339 Rev 0
DEMO MANUAL DC2685A
DC2684A DAUGHTER CARD SCHEMATIC
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
1. ALL RESISTORS AND CAPACITORS ARE 0603.
2. RST1-RST4, RSU1-RSU4, AND RK1 CONNECT TO VEE AT ONE COMMON POINT.
3. RST5-RST8, RSU5-RSU8, AND RK2 CONNECT TO VEE AT ONE COMMON POINT.
NOTE: UNLESS OTHERWISE SPECIFIED
OUT2
OUT1
OUT7
OUT8
OUT4
OUT3
OUT5
OUT6
G8
S5
G5
S6
G6
S7
G7
S8
OUT4
OUT1
OUT2
OUT3
PM0
PM1
G1
S1
CAP2
G2
S2
S3
G3
S4
G4
OUT8
OUT7
OUT6
OUT5
VEE
VEE
AGNDP
VEE
VEE
VEE
VEE
VEE
VEE
VEE
VEE
AGNDP
VEE VEE VEE
VEEVEE
AGNDP
AGNDP
AGNDP
AGNDP
AGNDP
VEE
VEE
VEE
VEE
AGNDP
AGNDP
AGNDP
AGNDP AGNDP
VDD
RD-
RD+
TD-
TD+
AD2
AD3
MSD#
SCL
SDAIN
SDAOUT
INT#
RESET#
REVISION HISTORY
DESCRIPTION
DATE
APPROVED
ECO
REV
DILIAN R.PRODUCTION
__
2
03-06-18
REVISION HISTORY
DESCRIPTION
DATE
APPROVED
ECO
REV
DILIAN R.PRODUCTION
__
2
03-06-18
REVISION HISTORY
DESCRIPTION
DATE
APPROVED
ECO
REV
DILIAN R.PRODUCTION
__
2
03-06-18
SIZE
DATE:
IC NO. REV.
SHEET OF
TITLE:
APPROVALS
PCB DES.
APP ENG.
CUSTOMER NOTICE
ADI HAS MADE A BEST EFFORT TO DESIGN A
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
PERFORMANCE OR RELIABILITY. CONTACT ADI APPLICATIONS
ENGINEERING FOR ASSISTANCE.
THIS CIRCUIT IS PROPRIETARY TO ADI AND
SCHEMATIC
SUPPLIED FOR USE WITH ADI PARTS.
SCALE = NONE
www.linear.comwww.analog.com
TEL: (408) 432-1900
MILPITAS, CA 95035
1630 McCARTHY BLVD.
2
12
IEEE 802.3bt 8-CHANNEL PSE DAUGHTER CARD
KIM T.
DILIAN R.
N/A
LTC4291IUF - LTC4292IUJ
DEMO CIRCUIT 2684A
Tuesday, March 06, 2018
SIZE
DATE:
IC NO. REV.
SHEET OF
TITLE:
APPROVALS
PCB DES.
APP ENG.
CUSTOMER NOTICE
ADI HAS MADE A BEST EFFORT TO DESIGN A
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
PERFORMANCE OR RELIABILITY. CONTACT ADI APPLICATIONS
ENGINEERING FOR ASSISTANCE.
THIS CIRCUIT IS PROPRIETARY TO ADI AND
SCHEMATIC
SUPPLIED FOR USE WITH ADI PARTS.
SCALE = NONE
www.linear.comwww.analog.com
TEL: (408) 432-1900
MILPITAS, CA 95035
1630 McCARTHY BLVD.
2
12
IEEE 802.3bt 8-CHANNEL PSE DAUGHTER CARD
KIM T.
DILIAN R.
N/A
LTC4291IUF - LTC4292IUJ
DEMO CIRCUIT 2684A
Tuesday, March 06, 2018
SIZE
DATE:
IC NO. REV.
SHEET OF
TITLE:
APPROVALS
PCB DES.
APP ENG.
CUSTOMER NOTICE
ADI HAS MADE A BEST EFFORT TO DESIGN A
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
PERFORMANCE OR RELIABILITY. CONTACT ADI APPLICATIONS
ENGINEERING FOR ASSISTANCE.
THIS CIRCUIT IS PROPRIETARY TO ADI AND
SCHEMATIC
SUPPLIED FOR USE WITH ADI PARTS.
SCALE = NONE
www.linear.comwww.analog.com
TEL: (408) 432-1900
MILPITAS, CA 95035
1630 McCARTHY BLVD.
2
12
IEEE 802.3bt 8-CHANNEL PSE DAUGHTER CARD
KIM T.
DILIAN R.
N/A
LTC4291IUF - LTC4292IUJ
DEMO CIRCUIT 2684A
Tuesday, March 06, 2018
DP3
S1BFL
2 1
RK1
0.150
RST1
0.300
0805
RSU4
0.300
0805
G8
RSU3
0.300
0805
DN8
S1BFL
2 1
DP2
S1BFL
2 1
RSU6
0.300
0805
Q1
PSMN040-100MSE
2
4
7
3
1 6
8
5
RSU1
0.300
0805
RST8
0.300
0805
RST2
0.300
0805
DN5
S1BFL
2 1
DP7
S1BFL
2 1
R26
100
J2-10OPT
DN6
S1BFL
2 1
RSU7
0.300
0805
G7
G4
RST5
0.300
0805
Q3
PSMN040-100MSE
2
4
7
3
1 6
8
5
G5
DP4
S1BFL
2 1
C29
1uF
1206
100V
J2-9OPT
D31
BZT52C5V6
OPT
12
C8
0.22uF
100V
0805
CK1
0.22uF
100V
0805
CK2
0.22uF
100V
0805
D1
PTVS58VS1UR
12
U1
LTC4292
VEE
31
AGNDP
25
OUT2B
10
GATE2B
9
SENSE2B
15
SENSE2A
14
GATE2A
7
OUT2A
8
SENSE1B
13
GATE1B
3
OUT1B
4
SENSE1A
12
GATE1A
1
OUT1A
2
VEE
33
NC
32
CPA
39
CNA
38
DPA
37
DNA
36
VSSK34
26
VEE(EP)
41
SENSE3A
16
GATE3A
22
OUT3A
21
SENSE3B
17
GATE3B
24
OUT3B
23
SENSE4A
18
GATE4A
28
OUT4A
27
SENSE4B
19
GATE4B
30
OUT4B
29
VSSK12
5
PWRMD1
20
PWRMD0
11
CAP2
6
NC
34
NC
35
VEE
40
DN3
S1BFL
2 1
Q8
PSMN040-100MSE
2
4
7
3
1 6
8
5
C1
0.22uF
100V
0805
DN2
S1BFL
2 1
+
C27
47uF
100V
DN1
S1BFL
2 1
RST3
0.300
0805
G1
Q4
PSMN040-100MSE
2
4
7
3
1 6
8
5
G2
DP8
S1BFL
2 1
RST4
0.300
0805
RSU8
0.300
0805
Q2
PSMN040-100MSE
2
4
7
3
1 6
8
5
RSU2
0.300
0805
Q7
PSMN040-100MSE
2
4
7
3
1 6
8
5
Q5
PSMN040-100MSE
2
4
7
3
1 6
8
5
C2
0.22uF
100V
0805
DP5
S1BFL
2 1
JP3
PM0
HI
LO
1
3
2
RST6
0.300
0805
R35
10 0805
DP6
S1BFL
2 1
R27
100
R34
12k
OPT
1210
JP4
PM1
HI
LO
1
3
2
RSU5
0.300
0805
RST7
0.300
0805
DN7
S1BFL
2 1
C3
0.22uF
100V
0805
C6
0.22uF
100V
0805
RK2
0.150
C4
0.22uF
100V
0805
Q6
PSMN040-100MSE
2
4
7
3
1 6
8
5
DP1
S1BFL
2 1
J1
2mm, 30 PIN FEMALE CONNECTOR
7
1
3
5
9
11
13
15
17
19
21
25
27
29
23
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
C5
0.22uF
100V
0805
DN4
S1BFL
2 1
C19
1uF
1206
100V
C7
0.22uF
100V
0805
G6
D5
PTVS58VP1UP
12
G3
C25
0.1uF
19
UG-1339 Rev 0
DEMO MANUAL DC2685A
DC2684A DAUGHTER CARD SCHEMATIC
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
CAP1
GP1
GP0
AD1
AD0
VDD
VEE
VEE
VEE
VDD VDD
VDD VDD
VDD VDD
RD-
RD+
TD-
TD+
AD2
AD3
SDAOUT
SDAIN
SCL
INT#
RESET#
MSD#
SIZE
DATE:
IC NO. REV.
SHEET OF
TITLE:
APPROVALS
PCB DES.
APP ENG.
CUSTOMER NOTICE
ADI HAS MADE A BEST EFFORT TO DESIGN A
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
PERFORMANCE OR RELIABILITY. CONTACT ADI APPLICATIONS
ENGINEERING FOR ASSISTANCE.
THIS CIRCUIT IS PROPRIETARY TO ADI AND
SCHEMATIC
SUPPLIED FOR USE WITH ADI PARTS.
SCALE = NONE
www.linear.com
www.analog.com
TEL: (408) 432-1900
MILPITAS, CA 95035
1630 McCARTHY BLVD.
2
22
IEEE 802.3bt 8-CHANNEL PSE DAUGHTER CARD
KIM T.
DILIAN R.
N/A
LTC4291IUF - LTC4292IUJ
DEMO CIRCUIT 2684A
Tuesday, March 06, 2018
SIZE
DATE:
IC NO. REV.
SHEET OF
TITLE:
APPROVALS
PCB DES.
APP ENG.
CUSTOMER NOTICE
ADI HAS MADE A BEST EFFORT TO DESIGN A
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
PERFORMANCE OR RELIABILITY. CONTACT ADI APPLICATIONS
ENGINEERING FOR ASSISTANCE.
THIS CIRCUIT IS PROPRIETARY TO ADI AND
SCHEMATIC
SUPPLIED FOR USE WITH ADI PARTS.
SCALE = NONE
www.linear.com
www.analog.com
TEL: (408) 432-1900
MILPITAS, CA 95035
1630 McCARTHY BLVD.
2
22
IEEE 802.3bt 8-CHANNEL PSE DAUGHTER CARD
KIM T.
DILIAN R.
N/A
LTC4291IUF - LTC4292IUJ
DEMO CIRCUIT 2684A
Tuesday, March 06, 2018
SIZE
DATE:
IC NO. REV.
SHEET OF
TITLE:
APPROVALS
PCB DES.
APP ENG.
CUSTOMER NOTICE
ADI HAS MADE A BEST EFFORT TO DESIGN A
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
PERFORMANCE OR RELIABILITY. CONTACT ADI APPLICATIONS
ENGINEERING FOR ASSISTANCE.
THIS CIRCUIT IS PROPRIETARY TO ADI AND
SCHEMATIC
SUPPLIED FOR USE WITH ADI PARTS.
SCALE = NONE
www.linear.com
www.analog.com
TEL: (408) 432-1900
MILPITAS, CA 95035
1630 McCARTHY BLVD.
2
22
IEEE 802.3bt 8-CHANNEL PSE DAUGHTER CARD
KIM T.
DILIAN R.
N/A
LTC4291IUF - LTC4292IUJ
DEMO CIRCUIT 2684A
Tuesday, March 06, 2018
R14
100
JP2
4PV#
HI
LO
HD1X3-079
1
3
2
R11
0
R29
560
T1
WURTH, 7490100143
1
TD+
2
CTD
3
TD-
4
NC
5
NC
6
RD+
7
CRD
8
RD-
9
RX-
10
CRX
11
RX+
12
NC
13
NC
14
TX-
15
CTX
16
TX+
R28
560
J2-3 OPT
J2-2 OPT
C23
1uF
C22
1uF
C21
0.1uF
J2-6 OPT
R22
100
JP1
AUTO
HI
LO
HD1X3-079
OPT
1
3
2
J2-5 OPT
R24
100
D2
GREEN
GP1
2 1
J2-1 OPT
J2-4
OPT
D3
GREEN
GP0
2 1
R23
100
R21
100
R15
100
R10
0
U2
LTC4291
AD0
1
AD1
2
AD2
3
AD3
4
SCL
18
SDAIN
17
SDAOUT
16
INT
15
VDD
20
AUTO
21
4PVALID
6
RESET
14
MSD
24
DGND
5
NC
7
CND
9
DPD
10
CPD
8
DND
11
VDD
12
DGND(EP)
25
CAP1
19
DNC
13
GP1
22
GP0
23
C20
1uF
R16
100
C24
2200pF
1808
2KV
R13
100
R9
0
20
UG-1339 Rev 0
DEMO MANUAL DC2685A
DC2683A MOTHERBOARD SCHEMATIC
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
OUT2B
1. ALL RESISTORS ARE IN OHMS, 0603.
ALL CAPACITORS ARE IN MICROFARADS, 0603.
2. INSTALL SHUNTS AS SHOWN.
NOTE: UNLESS OTHERWISE SPECIFIED
SDAIN
SCL
TO DC590
WP
QUICKEVAL FOR DEMO ONLY
DGNDDGND
SDAOUT
VEE
AGND
MAIN SUPPLY IN
56V
AGND (+)
DGND
VEE (-)
VDD
3.3V
OUT1A
OUT1B OUT2A
PORT 1
OUT3A
OUT3B
PORT 2 PORT 3 PORT 4
OUT4A OUT4B
LO HIADDRESS
AGND
AGND
PK
RESET#
MSD#
AD2
SDAIN
SDAOUT
SCL
OUT1 OUT2 OUT3 OUT4 OUT5 OUT7 OUT8OUT6
INT#
VDD33
AD3
VEE
VDD
VDD
VDD
VDD
VEE VEE VEE VEE VEE VEE
VEE VEE
VEE
VDD
VDD
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
SCL
SDAIN
SDAOUT
REVISION HISTORY
DESCRIPTION
DATE
APPROVED
ECO
REV
DILIAN R.PRODUCTION
__
1 03-06-18
REVISION HISTORY
DESCRIPTION
DATE
APPROVED
ECO
REV
DILIAN R.PRODUCTION
__
1 03-06-18
REVISION HISTORY
DESCRIPTION
DATE
APPROVED
ECO
REV
DILIAN R.PRODUCTION
__
1 03-06-18
SIZE
DATE:
IC NO. REV.
SHEET OF
TITLE:
APPROVALS
PCB DES.
APP ENG.
CUSTOMER NOTICE
ADI HAS MADE A BEST EFFORT TO DESIGN A
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
PERFORMANCE OR RELIABILITY. CONTACT ADI APPLICATIONS
ENGINEERING FOR ASSISTANCE.
THIS CIRCUIT IS PROPRIETARY TO ADI AND
SCHEMATIC
SUPPLIED FOR USE WITH ADI PARTS.
SCALE = NONE
www.linear.com
www.analog.com
TEL: (408) 432-1900
MILPITAS, CA 95035
1630 McCARTHY BLVD.
1
Tuesday, March 06, 2018
12
IEEE 802.3bt 4-PORT PSE MOTHERBOARD
KIM T.
DILIAN R.
N/A
DEMO CIRCUIT 2683A
SIZE
DATE:
IC NO. REV.
SHEET OF
TITLE:
APPROVALS
PCB DES.
APP ENG.
CUSTOMER NOTICE
ADI HAS MADE A BEST EFFORT TO DESIGN A
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
PERFORMANCE OR RELIABILITY. CONTACT ADI APPLICATIONS
ENGINEERING FOR ASSISTANCE.
THIS CIRCUIT IS PROPRIETARY TO ADI AND
SCHEMATIC
SUPPLIED FOR USE WITH ADI PARTS.
SCALE = NONE
www.linear.com
www.analog.com
TEL: (408) 432-1900
MILPITAS, CA 95035
1630 McCARTHY BLVD.
1
Tuesday, March 06, 2018
12
IEEE 802.3bt 4-PORT PSE MOTHERBOARD
KIM T.
DILIAN R.
N/A
DEMO CIRCUIT 2683A
SIZE
DATE:
IC NO. REV.
SHEET OF
TITLE:
APPROVALS
PCB DES.
APP ENG.
CUSTOMER NOTICE
ADI HAS MADE A BEST EFFORT TO DESIGN A
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
PERFORMANCE OR RELIABILITY. CONTACT ADI APPLICATIONS
ENGINEERING FOR ASSISTANCE.
THIS CIRCUIT IS PROPRIETARY TO ADI AND
SCHEMATIC
SUPPLIED FOR USE WITH ADI PARTS.
SCALE = NONE
www.linear.com
www.analog.com
TEL: (408) 432-1900
MILPITAS, CA 95035
1630 McCARTHY BLVD.
1
Tuesday, March 06, 2018
12
IEEE 802.3bt 4-PORT PSE MOTHERBOARD
KIM T.
DILIAN R.
N/A
DEMO CIRCUIT 2683A
Q12
ZVP3310FTA
1
23
R24
20k
1206
R34
10M
1%
C65
0.1uF
R31
806k
1%
E5
R15
316k
Q15
ZVP3310FTA
1
23
D25
GREEN
OUT4B
2 1
TP29
D13
GREEN
OUT1B
2 1
R7
10M
1%
R36
10M
1%
Q10
ZVP3310FTA
1
23
Q14
ZVP3310FTA
1
23
R2
10k
R17
10M
1%
C4
0.1uF
D7
ORANGE
VDD
2 1
R28
20k
1206
J3
C66
1uF
100V
1812
J2
EEPROM
ARRAY
U2
24LC025-I /ST
SDA
5
VCC
8
A0
1
A1
2
A2
3
GND
4
WP
7
SCL
6
Q9
ZVP3310FTA
1
23
Q13
ZVP3310FTA
1
23
R37
20k
1206
R6
806k
1%
R33
806k
1%
REP3
5.1k
R29
806k
1%
E2
D26
GREEN
OUT3A
2 1
D23
BZX84C5V6
1 3
E16
R14
499k
D14
GREEN
OUT2A
2 1
R8
20k
1206
E14
INT
R13
1k
E1
E8
R30
10M
1%
R23
10M
1%
D12
GREEN
OUT1A
2 1
U1
LT3010EMS8E
SHDN
5
IN
8
OUT
1
ADJ
2
NC
3
GND
4
NC
7
NC
6
GND
9
R32
10M
1%
E11
SW2
MSD
E17
D24
GREEN
OUT4A
2 1
R35
806k
1%
R16
806k
1%
D18
5.0SMDJ58A
2 1
R20
10M
1%
R21
20k
1206
R22
806k
1%
ON
12
SW3
WE, 418117270902
1
23
4
E20
J6
MOLEX, 87831-1420
1
3
2
4
5 6
7 8
9 10
11
13
12
14
R46
1M
C68
220pF
SW1
RESET
E12
E3
R26
20k
1206
R27
20k
1206
+
C1
47uF
100V
E4
Q11
ZVP3310FTA
1
23
REP5
5.1k
E19
E18
R19
806k
1%
D20
5.0SMDJ58A
2 1
R1
10k
R40
0
J7
MMS-130-02-T-SV
7
7
1
1
3
3
5
5
9
9
11
11
13
13
15
15
17
17
19
19
21
21
25
25
27
27
29
29
23
23
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
30
Q16
ZVP3310FTA
1
23
C67
1uF
E6
D5
ORANGE
VEE
2 1
R42
0
1206
E15
C69
1uF
R41
0
1206
E13
R38
20k
1206
R43
1k
REP4
5.1k
R18
20k
1206
R10
0
E9
D27
GREEN
OUT3B
2 1
E10
E7
D6
RED
INT
2 1
D15
GREEN
OUT2B
2 1
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Analog Devices DC2685A Demo Manual

Analog Devices
Brand
Analog Devices
Model
DC2685A
Type
Demo Manual
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