Vishay IRF644S Owner's manual

Brand: Vishay

Model: IRF644S

Type: Owner's manual

IRF644S, SiHF644S

www.vishay.com Vishay Siliconix

S20-0682-Rev. E, 07-Sep-2020 1Document Number: 91040

For technical questions, contact: hvm@vishay.com

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

Power MOSFET

FEATURES

• Surface-mount

• Available in tape and reel

• Dynamic dv/dt rating

• Repetitive avalanche rated

• Fast switching

• Ease of paralleling

• Simple drive requirements

• Material categorization: for definitions of compliance

please see www.vishay.com/doc?99912

Note

This datasheet provides information about parts that are



RoHS-compliant and / or parts that are non RoHS-compliant. For



example, parts with lead (Pb) terminations are not RoHS-compliant.



Please see the information / tables in this datasheet for details

DESCRIPTION

Third generation power MOSFETs from Vishay provide the

designer with the best combination of fast switching,

ruggedized device design, low on-resistance and

cost-effectiveness.

The D2PAK (TO-263) is a surface-mount power package

capable of accommodating die size up to HEX-4. It provides

the highest power capability and the lowest possible

on-resistance in any existing surface-mount package. The

D2PAK (TO-263) is suitable for high current applications

because of its low internal connection resistance and can

dissipate up to 2.0 W in a typical surface-mount application.

Note

a. See device orientation

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)

b. VDD = 50 V, starting TJ = 25 °C, L = 4.5 mH, Rg = 25 , IAS = 14 A (see fig. 12)

c. ISD  14 A, di/dt  150 A/μs, VDD  VDS, TJ  150 °C

d. 1.6 mm from case

e. When mounted on 1" square PCB (FR-4 or G-10 material)

PRODUCT SUMMARY

VDS (V) 250

RDS(on) ()V

GS = 10 V 0.28

Qg max. (nC) 68

Qgs (nC) 11

Qgd (nC) 35

Configuration Single

N-Channel MOSFET

PAK (TO-263)

Available

ORDERING INFORMATION

Package D2PAK (TO-263) D2PAK (TO-263) D2PAK (TO-263)

Lead (Pb)-free and halogen-free SiHF644S-GE3 SiHF644STRL-GE3 aSiHF644STRR-GE3 a

Lead (Pb)-free IRF644SPbF IRF644STRLPbF a IRF644STRRPbF a

ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)

PARAMETER SYMBOL LIMIT UNIT

Drain-source voltage VDS 250 V

Gate-source voltage VGS ± 20

Continuous drain current VGS at 10 V TC = 25 °C ID

ATC = 100 °C 8.5

Pulsed drain current a IDM 56

Linear derating factor 1.0 W/°C

Linear derating factor (PCB mount) e0.025

Single pulse avalanche energy bEAS 550 mJ

Avalanche current aIAR 14 A

Repetitive avalanche energy aEAR 13 mJ

Maximum power dissipation TC = 25 °C PD

125 W

Maximum power dissipation (PCB mount) e TA = 25 °C 3.1

Peak diode recovery dv/dt cdv/dt 4.8 V/ns

Operating junction and storage temperature range TJ, Tstg -55 to +150 °C

Soldering recommendations (peak temperature) dfor 10 s 300

IRF644S, SiHF644S

www.vishay.com Vishay Siliconix

S20-0682-Rev. E, 07-Sep-2020 2Document Number: 91040

For technical questions, contact: hvm@vishay.com

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

Note

a. When mounted on 1" square PCB (FR-4 or G-10 material)

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)

b. Pulse width  300 μs; duty cycle  2 %

THERMAL RESISTANCE RATINGS

PARAMETER SYMBOL TYP. MAX. UNIT

Maximum junction-to-ambient RthJA -62

°C/W

Maximum junction-to-ambient 

(PCB mount) a RthJA -40

Maximum junction-to-case (drain) RthJC -1.0

SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT

Static

Drain-source breakdown voltage VDS VGS = 0, ID = 250 μA 250 - - V

VDS temperature coefficient VDS/TJ Reference to 25 °C, ID = 1 mA - 0.34 - V/°C

Gate-source threshold voltage VGS(th) VDS = VGS, ID = 250 μA 2.0 - 4.0 V

Gate-source leakage IGSS V

GS = ± 20 V - - ± 100 nA

Zero gate voltage drain current IDSS

VDS = 250 V, VGS = 0 V - - 25 μA

VDS = 200 V, VGS = 0 V, TJ = 125 °C - - 250

Drain-source on-state resistance RDS(on) V

GS = 10 V ID = 8.4 A b - - 0.28 

Forward transconductance gfs VDS = 50 V, ID = 8.4 A b6.7 - - S

Dynamic

Input capacitance Ciss VGS = 0 V,

VDS = 25 V,

f = 1.0 MHz, see fig. 5

- 1300 -

pFOutput capacitance Coss - 330 -

Reverse transfer capacitance Crss -85-

Total gate charge Qg

VGS = 10 V ID = 7.9 A, VDS = 200 V,

see fig. 6 and 13 b

--68

nC Gate-source charge Qgs --11

Gate-drain charge Qgd --35

Turn-on delay time td(on)

VDD = 125 V, ID = 7.9 A,

Rg = 9.1 , RD = 8.7 , see fig. 10 b

-11-

Rise time tr -24-

Turn-off delay time td(off) -53-

Fall time tf -49-

Gate input resistance LD Between lead,

6 mm (0.25") from

package and center of

die contact

-4.5-

Internal drain inductance LS-7.5-

Internal source inductance Rgf = 1 MHz, open drain 0.3 - 1.2 

Drain-Source Body Diode Characteristics

Continuous source-drain diode current ISMOSFET symbol

showing the 

integral reverse

p - n junction diode

--14

Pulsed diode forward current a ISM --56

Body diode voltage VSD TJ = 25 °C, IS = 14 A, VGS = 0 V b--1.8V

Body diode reverse recovery time trr TJ = 25 °C, IF = 7.9 A, di/dt = 100 A/μs b - 250 500 ns

Body diode reverse recovery charge Qrr -2.34.6μC

Forward turn-on time ton Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)

IRF644S, SiHF644S

www.vishay.com Vishay Siliconix

S20-0682-Rev. E, 07-Sep-2020 3Document Number: 91040

For technical questions, contact: hvm@vishay.com

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

Fig. 1 - Typical Output Characteristics, TC = 25 °C

Fig. 2 - Typical Output Characteristics, TC = 150 °C

Fig. 3 - Typical Transfer Characteristics

Fig. 4 - Normalized On-Resistance vs. Temperature

Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage

Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage

91040_01

Bottom

To p

VGS

15 V

10 V

8.0 V

7.0 V

6.0 V

5.5 V

5.0 V

4.5 V

20 µs Pulse Width

TC = 25 °C

4.5 V

, Drain-to-Source Voltage (V)

, Drain Current (A)

100101

101

100

10-1

101

100

10-1 100101

DS,

Drain-to-Source Voltage (V)

, Drain Current (A)

Bottom

To p

VGS

15 V

10 V

8.0 V

7.0 V

6.0 V

5.5 V

5.0 V

4.5 V

20 µs Pulse Width

TC = 150 °C

91040_02

4.5 V

20 µs Pulse Width

VDS = 50 V

101

100

10-1

, Drain Current (A)

GS,

Gate-to-Source Voltage (V)

567 8910

25 °C

150 °C

91040_03

= 7.9 A

VGS

= 10 V

3.0

0.0

0.5

1.0

1.5

2.0

2.5

Junction Temperature (°C)

DS(on)

, Drain-to-Source On Resistance

(Normalized)

91040_04

- 60 - 40 - 20 0 20 40 60 80 100 120 140 160

3000

2400

1800

1200

600

100101

Capacitance (pF)

DS,

Drain-to-Source Voltage (V)

Ciss

Crss

Coss

VGS = 0 V, f = 1 MHz

Ciss = Cgs + Cgd, Cds Shorted

Crss = Cgd

Coss = Cds + Cgd

91040_05

, Total Gate Charge (nC)

, Gate-to-Source Voltage (V)

010 50403020

= 50 V

= 125 V

For test circuit

see figure 13

= 200 V

91040_06

= 7.9 A

60 70

IRF644S, SiHF644S

www.vishay.com Vishay Siliconix

S20-0682-Rev. E, 07-Sep-2020 4Document Number: 91040

For technical questions, contact: hvm@vishay.com

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

Fig. 7 - Typical Source-Drain Diode Forward Voltage

Fig. 8 - Maximum Safe Operating Area

Fig. 9 - Maximum Drain Current vs. Case Temperature

Fig. 10a - Switching Time Test Circuit

Fig. 10b - Switching Time Waveforms

Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case

101

100

, Source-to-Drain Voltage (V)

, Reverse Drain Current (A)

0.5 0.9

0.80.70.6

25 °C

150 °C

= 0 V

91040_07

10-1

1.1

1.0

10 µs

100 µs

1 ms

10 ms

Operation in this area limited

by RDS(on)

VDS, Drain-to-Source Voltage (V)

ID, Drain Current (A)

TC = 25 °C

TJ = 150 °C

Single Pulse

102

110

10225

103

91040_08

103

ID, Drain Current (A)

TC, Case Temperature (°C)

25 1501251007550

91040_09

Pulse width ≤ 1 µs

Duty factor ≤ 0.1 %

VGS

D.U.T.

10 V

VDS

VDD

VDS

90 %

10 %

VGS

td(on) trtd(off) tf

0.1

10-2

10-5 10-4 10-3 10-2 0.1 1 10

PDM

t1, Rectangular Pulse Duration (s)

Thermal Response (ZthJC)

Notes:

1. Duty Factor, D = t1/t2

2. Peak Tj = PDM x ZthJC + TC

Single Pulse

(Thermal Response)

0 − 0.5

0.2

0.1

0.05

0.02

0.01

91040_11

IRF644S, SiHF644S

www.vishay.com Vishay Siliconix

S20-0682-Rev. E, 07-Sep-2020 5Document Number: 91040

For technical questions, contact: hvm@vishay.com

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms

Fig. 12c - Maximum Avalanche Energy vs. Drain Current

Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit

IAS

0.01 Ω

D.U.T

VDS

-VDD

10 V

Vary tp to obtain

required IAS

1200

200

400

600

800

1000

25 150

125

10075

Starting TJ, Junction Temperature (°C)

EAS, Single Pulse Energy (mJ)

Bottom

To p

6.3 A

8.9 A

14 A

VDD = 50 V

91040_12c

QGS QGD

Charge

VGS

D.U.T.

3 mA

VGS

VDS

IGID

0.3 µF

0.2 µF

50 kΩ

12 V

Current regulator

Current sampling resistors

Same type as D.U.T.

IRF644S, SiHF644S

www.vishay.com Vishay Siliconix

S20-0682-Rev. E, 07-Sep-2020 6Document Number: 91040

For technical questions, contact: hvm@vishay.com

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

Fig. 14 - For N-Channel

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon

Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and

reliability data, see www.vishay.com/ppg?91040.

P.W. Period

dI/dt

Diode recovery

dV/dt

Ripple ≤ 5 %

Body diode forward drop

Re-applied

voltage

Reverse

recovery

current

Body diode forward

current

VGS = 10 Va

ISD

Driver gate drive

D.U.T. lSD waveform

D.U.T. VDS waveform

Inductor current

D = P.W.

Period

Peak Diode Recovery dV/dt Test Circuit

VDD

• dV/dt controlled by Rg

• Driver same type as D.U.T.

• ISD controlled by duty factor “D”

• D.U.T. - device under test

D.U.T. Circuit layout considerations

• Low stray inductance

• Ground plane

• Low leakage inductance

current transformer

Note

a. VGS = 5 V for logic level devices

VDD

Document Number: 91364 www.vishay.com

Revision: 15-Sep-08 1

Package Information

Vishay Siliconix

TO-263AB (HIGH VOLTAGE)

Notes

1. Dimensioning and tolerancing per ASME Y14.5M-1994.

2. Dimensions are shown in millimeters (inches).

3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the

outmost extremes of the plastic body at datum A.

4. Thermal PAD contour optional within dimension E, L1, D1 and E1.

5. Dimension b1 and c1 apply to base metal only.

6. Datum A and B to be determined at datum plane H.

7. Outline conforms to JEDEC outline to TO-263AB.

Detail A

2 x e

2 x b2

2 x b

0.010 A B

MM ± 0.004 B

Base

metal

Plating b1, b3

(b, b2)

(c)

Section B - B and C - C

Scale: none

Lead tip

(Datum A)

2CC

View A - A

Seating plane

Gauge

plane

0° to 8°

Detail “A”

Rotated 90° CW

scale 8:1

L3 A1

MILLIMETERS INCHES MILLIMETERS INCHES

DIM. MIN. MAX. MIN. MAX. DIM. MIN. MAX. MIN. MAX.

A 4.06 4.83 0.160 0.190 D1 6.86 - 0.270 -

A1 0.00 0.25 0.000 0.010 E 9.65 10.67 0.380 0.420

b 0.51 0.99 0.020 0.039 E1 6.22 - 0.245 -

b1 0.51 0.89 0.020 0.035 e 2.54 BSC 0.100 BSC

b2 1.14 1.78 0.045 0.070 H 14.61 15.88 0.575 0.625

b3 1.14 1.73 0.045 0.068 L 1.78 2.79 0.070 0.110

c 0.38 0.74 0.015 0.029 L1 - 1.65 - 0.066

c1 0.38 0.58 0.015 0.023 L2 - 1.78 - 0.070

c2 1.14 1.65 0.045 0.065 L3 0.25 BSC 0.010 BSC

D 8.38 9.65 0.330 0.380 L4 4.78 5.28 0.188 0.208

ECN: S-82110-Rev. A, 15-Sep-08

DWG: 5970

Outline Dimensions

www.vishay.com Vishay Semiconductors

Revision: 07-Dec-17 1Document Number: 96144

For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

TO-247AC 2L

DIMENSIONS in millimeters and inches

Notes

(1) Dimensioning and tolerancing per ASME Y14.5M-1994

(2) Contour of slot optional

(3) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at

the outermost extremes of the plastic body

(4) Thermal pad contour optional with dimensions D1 and E1

(5) Lead finish uncontrolled in L1

(6) Ø P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154")

(7) Outline conforms to JEDEC® outline TO-247 with exception of dimension Q

SYMBOL MILLIMETERS INCHES NOTES SYMBOL MILLIMETERS INCHES NOTES

MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX.

A 4.65 5.31 0.183 0.209 E 15.29 15.87 0.602 0.625 3

A1 2.21 2.59 0.087 0.102 E1 13.46 - 0.53 -

A2 1.17 1.37 0.046 0.054 e 5.46 BSC 0.215 BSC

b 0.99 1.40 0.039 0.055 Ø K 0.254 0.010

b1 0.99 1.35 0.039 0.053 L 14.20 16.10 0.559 0.634

b2 1.65 2.39 0.065 0.094 L1 3.71 4.29 0.146 0.169

b3 1.65 2.34 0.065 0.092 Ø P 3.56 3.66 0.14 0.144

c 0.38 0.89 0.015 0.035 Ø P1 - 7.39 - 0.291

c1 0.38 0.84 0.015 0.033 Q 5.31 5.69 0.209 0.224

D 19.71 20.70 0.776 0.815 3 R 4.52 5.49 0.178 0.216

D1 13.08 - 0.515 - 4 S 5.51 BSC 0.217 BSC

D2 0.51 1.35 0.020 0.053

0.10 AC

M M (4)

(4)

R/2 (2)

2 x R (2)

See view B

2 x e

2 x b

2 x b2

L1 (5)

123

Ø K BD

M M

A(Datum B)

D1 (4)

0.01 BD

M M

View A - A

View B

(b1, b3) Base metal

(b, b2)

Section C - C, D - D

(c)

Plating

Ø P1

Ø P (6)

Thermal pad

(3)

AN826

Vishay Siliconix

Document Number: 73397

11-Apr-05

www.vishay.com

RECOMMENDED MINIMUM PADS FOR D2PAK: 3-Lead

0.635

(16.129)

Recommended Minimum Pads

Dimensions in Inches/(mm)

0.420

(10.668)

0.355

(9.017)

0.145

(3.683)

0.135

(3.429)

0.200

(5.080)

0.050

(1.257)

Return to Index

Legal Disclaimer Notice

www.vishay.com Vishay

Revision: 01-Jan-2022 1Document Number: 91000

Disclaimer

ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE

RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.

Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively,

“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other

disclosure relating to any product.

Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or

the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all

liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,

consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular

purpose, non-infringement and merchantability.

Statements regarding the suitability of products for certain types of applications are based on Vishay's knowledge of typical

requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements

about the suitability of products for a particular application. It is the customer's responsibility to validate that a particular product

with the properties described in the product specification is suitable for use in a particular application. Parameters provided in

datasheets and / or specifications may vary in different applications and performance may vary over time. All operating

parameters, including typical parameters, must be validated for each customer application by the customer's technical experts.

Product specifications do not expand or otherwise modify Vishay's terms and conditions of purchase, including but not limited

to the warranty expressed therein.

Hyperlinks included in this datasheet may direct users to third-party websites. These links are provided as a convenience and

for informational purposes only. Inclusion of these hyperlinks does not constitute an endorsement or an approval by Vishay of

any of the products, services or opinions of the corporation, organization or individual associated with the third-party website.

Vishay disclaims any and all liability and bears no responsibility for the accuracy, legality or content of the third-party website

or for that of subsequent links.

Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining

applications or for any other application in which the failure of the Vishay product could result in personal injury or death.

Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk. Please

contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications.

No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by

any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners.

Vishay IRF644S Owner's manual

Vishay IRF644S Owner's manual

Vishay IRF644S Owner's manual

Related papers

Other documents