ADLINK Technology PCIe-7256 User manual

Type
User manual
Advance Technologies; Automate the World.
Manual Rev.: 2.00
Revision Date: Jan. 7, 2016
Part No: 50-11043-1000
PCIe-7256
16CH Latching Relay Output/16CH Isolated DI
Card
ii
Revision History
Revision Release Date Description of Change(s)
2.00 Jan.7, 2016 Initial release
iii
PCIe-7256
Preface
Copyright ©2016 ADLINK Technology, Inc.
This document contains proprietary information protected by copy-
right. All rights are reserved. No part of this manual may be repro-
duced by any mechanical, electronic, or other means in any form
without prior written permission of the manufacturer.
Disclaimer
The information in this document is subject to change without prior
notice in order to improve reliability, design, and function and does
not represent a commitment on the part of the manufacturer.
In no event will the manufacturer be liable for direct, indirect, spe-
cial, incidental, or consequential damages arising out of the use or
inability to use the product or documentation, even if advised of
the possibility of such damages.
Environmental Responsibility
ADLINK is committed to fulfill its social responsibility to global
environmental preservation through compliance with the Euro-
pean Union's Restriction of Hazardous Substances (RoHS) direc-
tive and Waste Electrical and Electronic Equipment (WEEE)
directive. Environmental protection is a top priority for ADLINK.
We have enforced measures to ensure that our products, manu-
facturing processes, components, and raw materials have as little
impact on the environment as possible. When products are at their
end of life, our customers are encouraged to dispose of them in
accordance with the product disposal and/or recovery programs
prescribed by their nation or company.
Trademarks
Product names mentioned herein are used for identification pur-
poses only and may be trademarks and/or registered trademarks
of their respective companies.
iv
Conventions
Take note of the following conventions used throughout this
manual to make sure that users perform certain tasks and
instructions properly.
NOTE:
NOTE:
Additional information, aids, and tips that help users perform
tasks.
CAUTION:
Information to prevent minor physical injury, component dam-
age, data loss, and/or program corruption when trying to com-
plete a task.
WARNING:
Information to prevent serious physical injury, component
damage, data loss, and/or program corruption when trying to
complete a specific task.
Table of Contents v
PCIe-7256
Table of Contents
Revision History...................................................................... ii
Preface .................................................................................... iii
List of Figures ....................................................................... vii
List of Tables.......................................................................... ix
1 Introduction ........................................................................ 1
1.1 Features............................................................................... 1
1.2 Applications ......................................................................... 2
1.3 Specifications....................................................................... 2
1.4 Software Support ................................................................. 3
PCIS-DASK .................................................................... 3
1.5 PCB Layout.......................................................................... 4
1.6 Connectors .......................................................................... 5
1.7 External LED Connection ................................................... 7
2 Getting Started ................................................................... 9
2.1 Unpacking Checklist ............................................................ 9
2.2 Installing the Card................................................................ 9
2.3 Setting Jumpers................................................................. 10
2.4 Setting Board ID ................................................................ 11
3 Register Format................................................................ 13
3.1 I/O Address Map................................................................ 13
3.2 Relay Output Control Register........................................... 13
3.3 Relay Output Read Back Register..................................... 14
3.4 Isolated Digital Input Register............................................ 15
3.5 COS Setup Register .......................................................... 15
3.6 COS Latch Register........................................................... 16
vi Table of Contents
3.7 Interrupt Control Register................................................... 16
3.8 Interrupt Status Register .................................................... 18
AppendixA C/C++ DOS Function Library ...................... 21
A.1 Data Types......................................................................... 21
A.2 List of Functions................................................................. 21
_7256_COS_Channel ................................................... 21
_7256_CLR_IRQ .......................................................... 22
_7256_COS_Latch ....................................................... 22
_7256_DI ...................................................................... 23
_7256_DO .................................................................... 23
_7256_DO_Read_Back ................................................ 24
_7256_GET_IRQ_Status .............................................. 24
_7256_Initial ................................................................. 25
_7256_INT_Control ...................................................... 25
Important Safety Instructions.............................................. 27
Getting Service ..................................................................... 29
List of Figures vii
PCIe-7256
List of Figures
Figure 1-1: PCIe-7256 Board Layout ................................................. 4
Figure 1-2: PCIe-7256 CN1 Connector.............................................. 5
Figure 1-3: External LED Connectors ................................................ 7
Figure 2-1: Default Input Signal Jumper Settings ............................ 11
viii List of Figures
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List of Tables ix
PCIe-7360
List of Tables
Table 1-1: PCIe-7256 Board Layout Legend .................................... 4
Table 1-2: PCIe-7256 CN1 Pin Assignment ..................................... 6
Table 2-1: Board ID Setting Conditions .......................................... 12
Table 3-1: PCIe-7256 Register Map ............................................... 13
x List of Tables
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Introduction 1
PCIe-7256
1 Introduction
ADLINK'S PCIe-7256 is a basic Digital I/O card for PCIe bus com-
puter in industrial applications. The PCIe-7256 provides 16 latch-
ing relay actuators and 16 opto-isolated digital inputs, and all
relays are Form C, suitable for ON/OFF control devices.
All digital input channels are identical non-polar and opto-isolated,
and each is switchable using RC or non-RC filter. All channels are
isolated and suitable for collecting digital inputs in noisy environ-
ments. COS (Change-of-State) interrupt is supported, whereby
when any digital input changes state, an interrupt is generated to
allow management of the external event.
Latching relays conserve power, and the status of each latching
relay output is indicated by LED, such that when the latching relay
is SET, its corresponding onboard LED is lit. Also enabled is
Board ID setting, providing identification of a specified card when
two or more PCIe-7256 cards are deployed in a single system,
and all I/O signals are transmitted via 68-pin SCSI connector.
1.1 Features
X PCI Express x1, Plug and Play
X 16 latching relay actuator outputs, with output status
retained after power-off
X 16 opto-isolated digital inputs
X LED indicators show relay status
X Jumper-selectable AC-filtered/non-AC-filtered input signals
X Onboard relay driving circuits
X COS (Change-of-State) detection for digital input channels
X Digital input channel 0 & 1 interrupt
X Dry contact input available
X Board ID setting
2 Introduction
1.2 Applications
X Industrial ON/OFF control
X External high power relay driving, signal switching
X Laboratory automation
X Industrial automation
X Switch contact status detection and limit switch monitoring
& control systems
1.3 Specifications
1.3.1 Digital Input
1.3.2 Relay Output
Input channels 16
Photocoupler PC-3H4
Input current
X 10 mA rated
X 50 mA max. for isolated input
Input voltage
X Up to 24V DC or 24V AC
X Logic Low: 0 to 2V
X Logic High 5 to 24V
Input impedance 4.7 k
Input mode Isolation AC filter/Non-AC filter
Isolated voltage 2,500 Vrms channel-to-system
Output channels 16
Relay type 16 DPDT (Form C)
Contact rating 125V AC/0.5A, 30V DC/1A
Breakdown voltage 1000 Vrms
Release time 3 msec
Operate time 3 msec
Contact resistance 60m
Insulation
resistance
1000M min. (at 500V DC)
Introduction 3
PCIe-7256
1.3.3 Isolated +5V Power Supply
1.3.4 Physical & Bus
1.4 Software Support
ADLINK provides comprehensive software solutions for all system
building requirements. In addition to programming libraries such
as DLLs for most Windows-based systems, ADLINK also pro-
vides drivers for other application environments such as Lab-
VIEW®.
Be sure to install the driver & utility before using the PCIe-7256.
PCIS-DASK
PCIS-DASK consists of advanced 32/64-bit kernel drivers and
SDK for customized DAQ application development, enabling
Life expectancy
(min. operations)
X 2x 10
5
times at 30V DC/1A
X 10
5
times at 125V AC/0.5A
Vibration
resistance
176.4m/s
2
(18G), 10 to 55Hz at double
amplitude of 3mm
LED indicators
Monitor SET/RESET status of each relay;
external LED connectors applicable
Relay power
supply
+ 5V from onboard power source
Output Voltage +5V
Output Current 170mA max. (@ 40°C)
Dimensions 175 mm x 107 mm, standard PCIe half size
Bus 1x PCI Express
Operating temperature 0 to 60 °C
Storage temperature -20 °C to 80 °C
Humidity 5 to 95% non-condensing
Power consumption
X +12V@141mA(typical) 500mA (Max.)
X [email protected](typical) 45mA (Max.)
(when all relays are activated simultaneously)
4 Introduction
detailed operations and superior performance and reliability from
data acquisition systems.
PCIS-DASK kernel drivers now support Windows 7/8.1 OS.
1.5 PCB Layout
.
Figure 1-1: PCIe-7256 Board Layout
Table 1-1: PCIe-7256 Board Layout Legend
NOTE:
NOTE:
All dimensions shown are in mm
Name Description
A JP4 External LED connector setting
B JP3 External LED connector setting
C S1 Board ID setting
D JP2 AC & Non-AC filter setting
E JP1 AC & Non-AC filter setting
F CN1 68-pin SCSI connector
A
B
CDEF
Introduction 5
PCIe-7256
1.6 Connectors
The PCIe-7256 is equipped with a 68-pin SCSI connector (CN1).
Figure 1-2: PCIe-7256 CN1 Connector
ID Pin Pin ID
NO15 68 34 NO7
COM15 67 33 COM7
NC15 66 32 NC7
1
34
35
68
6 Introduction
Table 1-2: PCIe-7256 CN1 Pin Assignment
NO14 65 31 NO6
COM14 64 30 COM6
NC14 63 29 NC6
NO13 62 28 NO5
COM13 61 27 COM5
NC13 60 26 NC5
NO12 59 25 NO4
COM12 58 24 COM4
NC12 57 23 NC4
NO11 56 22 NO3
COM11 55 21 COM3
NC11 54 20 NC3
NO10 53 19 NO2
COM10 52 18 COM2
NC10 51 17 NC2
NO9 50 16 NO1
COM9 49 15 COM1
NC9 48 14 NC1
NO8 47 13 NO0
COM8 46 12 COM0
NC8 45 11 NC0
DI15 44 10 DI14
DI13 43 9 DI12
DI11 42 8 DI10
DI9 41 7 DI8
DICOM1 40 6 DICOM2
DI7 39 5 DI6
DI5 38 4 DI4
DI3 37 3 DI2
DI1 36 2 DI0
ISOGND 35 1 ISO5V
ID Pin Pin ID
Introduction 7
PCIe-7256
1.7 External LED Connection
16 onboard LEDs indicate the operating status of the 16 relays. In
addition, 16 external LED connectors are available for users appli-
cations. Utilizing external LEDs connecting with JP3 and JP4,
relay status can be displayed on chassis, panel, or other appara-
tus. Only LEDs with forward voltage (Vf) lower than 2V can func-
tion. Each external LED connector has a current limiting resistor
(330) connecting with +3.3 V power, eliminating the need for
addition of a resistor to limit current flow through the LED.
Before connecting external LEDs, ensure the LED is in the right
direction, as shown.
Figure 1-3: External LED Connectors
JP4
A K
DO8
DO9
DO10
DO11
DO12
DO13
DO14
DO15
9
16
JP3
DO0
DO1
DO2
DO3
DO4
DO5
DO6
DO7
1
8
8 Introduction
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Getting Started 9
PCIe-7256
2 Getting Started
2.1 Unpacking Checklist
Before unpacking, check the shipping carton for any damage. If
the shipping carton and/or contents are damaged, inform your
dealer immediately. Retain the shipping carton and packing mate-
rials for inspection. Obtain authorization from your dealer before
returning any product to ADLINK. Ensure that the following items
are included in the package.
X PCIe-7256 high-speed DI/O card
X Quick Start Guide
If any of the items is damaged or missing, contact your dealer
immediately.
2.2 Installing the Card
Install the card driver before you install the card into your com-
puter system. See “Software Support” on page 3. for driver sup-
port information.
To install the card:
1. Turn off the system/chassis and disconnect the power
plug from the power source.
2. Remove the system/chassis cover.
3. Select the PCIE Express slot that you intend to use, then
remove the bracket opposite the slot, if any.
4. Align the card connectors (golden fingers) with the slot,
then press the card firmly until the card is completely
seated on the slot.
5. Secure the card to the chassis with a screw.
CAUTION:
The card must be protected from static discharge and physical
shock. Never remove any of the socketed parts except at a
static-free workstation. Use the anti-static bag shipped with the
product to handle the card. Wear a grounded wrist strap when
servicing.
10 Getting Started
6. Replace the system/chassis cover.
7. Connect the power plug to a power source, then turn on
the system.
Configuration
All PCI/PCIE Express cards on your system are configured individ-
ually. Because configuration is controlled by the system and the
software, no jumper setting is required for base address, DMA,
and interrupt IRQ. Configuration is subject to change with every
boot of the system as new PCI/PCIE Express
®
cards are added or
removed.
Troubleshooting
If your system fails to boot or if you experience erratic operation
with your PCI/PCIE Express card in place, an interrupt conflict
may have been generated (such as when the BIOS Setup is incor-
rectly configured). Refer to the system’s BIOS documentation for
details.
2.3 Setting Jumpers
The PCIe-7256's plug and play eliminates the need to set up base
address and IRQ level to allow operation in the host system. How-
ever, for more versatile operation, some jumpers can be set for
digital input. Jumpers on the PCIe-7256 configure digital input
channels for AC-filtered or non-AC-filtered input, as shown.
Default setting of input signal selection is non-AC-Filtered (DC sig-
nal input), as shown.
Jumper Input Signal
JP1 DI0 to DI7
JP2 DI8 to DI15
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ADLINK Technology PCIe-7256 User manual

Type
User manual

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