NXP S12ZVC User guide

External Use

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Getting Started with the S12ZVC

Platform

S12 MagniVMixed-Signal MCU for CAN

Applications

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Agenda

• Introduction

• Features

• Block diagram

• Device pinouts

• Special modules/peripherals

− VREG, HSCAN

− SENT

− 16-bit timer, 16-bit PWM

− DAC, ACMP

• Security

• Resets

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Agenda

• There are hands-on exercises for CAN, Timer, PWM, and DAC modules

• For executing the hands-on exercises you will need:

− An S12ZVC evaluation board

− PC with CodeWarrior 10.5 or newer

− Oscilloscope (optional)

• Please refer to the companion folder

“S12ZVC_Getting_Started_exercises” for access to the files needed for

the CodeWarrior exercises

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Introduction

• The MC9S12ZVC family is a new member of the S12 MagniV product line integrating a battery level

(12 V) voltage regulator, supply voltage monitoring, high voltage inputs and a CAN physical

interface

• Primarily targeted at CAN nodes like sensors, switch panels or small actuators

• ffers various low-power modes and wake up management to address state of the art power

consumption requirements

• The S12ZVC integration and features can also address high-reliability industrial applications

• Offered for high temperature applications

• AEC-Q100 Grade 0 (-40 °C to +150 °C ambient operating temperature range)

• Enhanced performance, linear address space S12Z core

• Integrates several key system components into a single device

• Optimizes system architecture, achieves significant space and BOM savings

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Features

• 64 or 48 pin LQFP-EP

• S12Z core

• 192, 128, or 64

• 32 MHz bus frequency under 150°C, 2MHz over 150°C

• 1 to 2 kB of ECC EEPROM

• 4 to 8 kB of ECC RAM

• Physical layer for HSCAN

• 2x high voltage inputs

• Up to 2x SCI, 2x SPI, 1 IIC, SENT transmitter

• 4 to 8 16-bit timer channels (20 ns resolution)

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Features (cont.)

• Four 16-bit PWM channels (20 ns resolution)

• 10 to 16 ADC channels

• 8-bit DAC

• 2x Analog comparator

• 5 to 10 open drain 5V GPIO

• 4 pins with 25 mA sink capability

• 28 to 42 GPIO

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Block diagram

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Device pinouts

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Device pinouts (cont.)

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Special modules/peripherals

• The S12VC device is perfect for functioning as a general purpose CAN node, and it

maximizes cost and space savings by having integrated several system components such

as:

− 12 V voltage regulator

− CAN physical interface

− SENT transmitter

− 16-bit timers and PWM

− Digital to analog converter (DAC)

− Analog comparator (ACMP)

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S12ZVC VREG

Automotive voltage regulator

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VREG

• Allows the designer to connect the automotive battery directly to the device voltage

regulator

• VSUP pin can be routed via an internal divider to the internal ADC for monitoring

• VSUP can also be routed to a comparator to generate high or low voltage interrupts to the

MCU

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S12ZVC CAN physical layer

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CAN physical layer

• The CAN physical layer provides a physical layer for high-speed CAN area network communication

in automotive applications

• It serves as an integrated interface to the CAN bus lines for the internally connected MSCAN

controller through the pins CANH, CANL and SPLIT

• The CAN Physical Layer is designed to meet the CAN physical layer ISO 11898-2 and ISO 11898-5

standards

• It provides these distinctive features:

− High-speed CAN interface (up to 1 Mbit/s baud rate)

− ISO 11898-2 and ISO 11898-5 compliant for 12V battery systems

− SPLIT pin driver for bus recessive level stabilization

− Low-power mode with remote CAN wake up

− Configurable wake up pulse filtering

− Over current shutdown

− Voltage monitoring

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CAN physical layer (cont.)

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CAN hands-on exercise

S12ZVC_Getting_Started_exercise/CAN

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CAN hands-on exercise

• An oscilloscope or a CAN tool is needed for this exercise:

1. Create a new project in CodeWarrior

2. Add the CAN code

3. Download / debug the code

4. Run the code

5. Use an oscilloscope or a CAN tool to verify the CAN message frame is being sent

6. Modify the CAN message and the CAN ID of the frame being sent; verify them on an

oscilloscope or CAN tool

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CAN hands-on exercise (step 1)

• Create a new project in CodeWarrior

1. File -> New -> Bareboard Project

2. Name the project, click next

3. Select device: S12Z -> S12ZVC Family -> MC9S12ZVC192

4. Debug connection: Select “Open Source BDM”

5. Build options are left as default, click next

6. Rappid is not used, click Finish

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CAN hands-on exercise (step 1)

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CAN hands-on exercise (step 1)

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NXP S12ZVC User guide

NXP S12ZVC User guide

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