Eurotech Advme2608A Owner's manual

Type
Owner's manual
Manual
Preface
Thank for choosing the Advme2608A. Please read this manual before using the Advme2608A so that you may
obtain the greatest benefit from using the device.
This manual presents the specifications, functions, and method of use of the VME64ch 16bit A/D Board Advme2608A.
Advanet Inc. has made every effort to carefully inspect each product and has taken great care to package and to ship
the product. In the unlikely event of the product’s failure to operate normally due to problems in shipping or other-
wise, the company will repair or replace the product at its own responsibility.
Contact Advanet at the following address if you have any questions.
Inquiries
Sales Division
Headquarters
616-4 Tanaka, Kita-ku, Okayama 700-0951 Japan
TEL : 086-245-2861 FAX : 086-245-2860
Tokyo Office KDX Kaji-cho 4F , 3-5-2 Kanda Kaji-cho,
Chiyoda-ku, Tokyo 101-0045 Japan
TEL : 03-5294-1731 FAX : 03-5294-1734
INTERNETURL http://www.advanet.co.jp/
1. In order to improve the product, the contents of this document as well as product specifications are subject to change without notice.
2. This document does not give permission to the implementation of patents or other rights held by Advanet or third parties.
3. Reproduction of all or part of this document without Advanets permission is prohibited.
2009 Advanet Inc.
Precautions in Use
Please read this manual before using the product in order to insure its safe use.
Do not place the product in a
location where it can fall or be
subject to vibration or impact
because this may cause device
failure.
Protect the device from vibration and impact.
Do not modify the device.
For safety reasons, under no
circumstances should you
modify the device. Advanet will
not repair products that have
been modified.
Protect the product from water
and chemicals.
Contact between the product
and water or chemicals can
result in product failure,
electrocution, or fire.
Protect the product from
foreign material.
Make sure that foreign
material does not get into the
product during use, storage, or
transport because this can
result in product failure.
Take precautions in handling to insure
that you are not injured.
The sharp projections on this
product may cause injury. Take
care in handling this product in
order to avoid injury.
Do not disassemble the product.
In order to maintain
guaranteed product
performance, do not under any
circumstances disassemble
this product.
Keep the product away from radios and TVs.
Do not use the product near
radios, television sets, or other
devices generating strong
magnetic or electrical fields.
This could result in failure or
malfunction.
Keep the product away from
flame, humidity, and direct sunlight.
Do not use or store the product
in any of the following locations
as this could result in product
failure.
Places where there is fire.
Locations high in humidity
or exposed to rain
Locations exposed to direct
sunlight
Dusty or dirty locations
Locations containing
excessive water or
chemical vapors
Precautions in use
Please read this manual before using the product in order to insure its safe use.
Install the product in well-ventilated locations.
Install the product in well-
ventilated locations to
efficiently disperse heat
generated by the product.
Remove the power plug from the receptacle
when not using the product.
Turn off the main switch and
remove the power plug from
the receptacle when not using
the product, or there is the risk
of lightning strike.
Be sure to use the device within rated parameters.
Be sure to use the product
within the ratings specified in
this manual. Failure to do so
may result in malfunction.
Cleaning the product
If the product becomes dirty,
wipe it with a dry soft cloth. A
thinned neutral cleaner may be
used if the product is
particularly dirty. Do not use
benzene, thinners, or other
solvents under any
circumstances.
Be sure to ground the product in order
to prevent electrocution.
Be sure to ground the product
by connecting it to a 3-pole AC
receptacle or by using an AC
receptacle having a grounding
terminal.
Be sure to dispose of the product properly.
Use appropriate methods for
handling industrial wastes
when disposing of this product.
Please contact Advanet for repair of the product.
Please contact your retail
dealer or Advanet when repairs
are necessary.
Make sure that the product is not miswired.
Failure to wire the product
correctly can result in
malfunction or fire. Read this
manual and wire the product
correctly.
Static electricity may cause malfunction.
This product comprises
electronic parts that are highly
susceptible to static electricity.
Static electricity can cause the
product to malfunction. Take
care not to touch any of the
terminals, connectors, ICs, or
other parts with the hands.
When you believe the product to be malfunctioning
Stop using the product if you
believe it is malfunctioning.
Continuing to use a
malfunctioning product can
cause the malfunction to
spread to other products and
can cause short circuits or fire.
<Advme2608A><Advme2608A>
<Advme2608A><Advme2608A>
<Advme2608A>
5
Content
1. Prior to use ............................................................................................................................................................................... 6
1.1 Period and scope of warranty ........................................................................................................................................... 6
1.2 Scope of service ................................................................................................................................................................ 6
2. Features .................................................................................................................................................................................... 7
3. Specifications ........................................................................................................................................................................... 8
4. Configuration .......................................................................................................................................................................... 10
5. Setting ..................................................................................................................................................................................... 11
5.1 Switches, Jumpers, Volume, and Connectors ...................................................................................................................11
5.2 Base Address Setting (DSW1,DSW2) ..............................................................................................................................12
5.3 Analog Input Form Setting (JP2) ...................................................................................................................................... 12
5.4 Analog Input Range Setting (JP4,JP6,JP7 to JP70) .........................................................................................................13
5.5 External Trigger Setting (JP1) .......................................................................................................................................... 14
6. Control ..................................................................................................................................................................................... 15
7. Register Mapping ....................................................................................................................................................................16
7.1 Board ID Register .............................................................................................................................................................17
7.2 Interrupt Vector Register ...................................................................................................................................................17
7.3 Interrupt Level Register .................................................................................................................................................... 18
7.4 Interrupt Clear Register .................................................................................................................................................... 18
7.5 Trigger Mode Setting Register .......................................................................................................................................... 19
7.6 Pacer Clock Setting Register (Upper / Lower) .................................................................................................................20
7.7 Board Status Register ....................................................................................................................................................... 21
7.8 Software Trigger Register ................................................................................................................................................. 22
7.9 Data Register ....................................................................................................................................................................22
7.10 FIFO Status Register .......................................................................................................................................................22
7.11 FIFO Full Interrupt Enable Reigster ............................................................................................................................... 23
7.12 FIFO Reset Reigster ........................................................................................................................................................23
8. A/D Conversion Cycle and Operation .................................................................................................................................... 24
8.1 Software Trigger Mode ..................................................................................................................................................... 24
8.2 External Trigger Mode ...................................................................................................................................................... 26
8.3 Pacer Clock Mode ............................................................................................................................................................. 28
9. Connector ................................................................................................................................................................................ 30
9.1 Input Connector ................................................................................................................................................................30
9.2 Input Signal ....................................................................................................................................................................... 30
9.3 Connector Pin Arrangement ............................................................................................................................................. 31
10. Programming ......................................................................................................................................................................... 32
10.1 Setting the Interrupt-related Registers ............................................................................................................................ 32
10.2 A/D Conversion Programming ....................................................................................................................................... 32
10.2.1 32-channel/64-channel Batch Conversion Modes for Software Triggers .............................................................. 32
10.2.2 32-channel/64-channel Continuous Batch Conversion Modes for External Triggers ...........................................33
10.2.3 32-channel/64-channel Continuous Batch Conversion Modes for Pacer Clock ................................................... 33
10.3 Correspondence list Between Input Voltage and Output Cord ......................................................................................34
11. Simple Sample Program ........................................................................................................................................................ 35
11.1 List of Sample Program Codes ....................................................................................................................................... 35
11.2 Explanation ..................................................................................................................................................................... 40
<Advme2608A><Advme2608A>
<Advme2608A><Advme2608A>
<Advme2608A>
6
1. Prior to use
1.1 Period and scope of warranty
Delivered products are under warranty for a period of one year after delivery.
During the period of warranty, the vendor will have his own to responsibility replace or repair malfunctioning
parts if the product malfunction is the responsibility of the vendor.
However, this warranty does not apply under the following circumstances:
(1) If the user handles or uses the product in an inappropriate way
(2) If the malfunction is caused by something other than the delivered product
(3) If the delivered product has been modified or repaired by anyone other than the vendor
(4) Due to natural disaster, accident, or other reason not the responsibility of the vendor
In this context, the term “warranty” means solely a warranty of the individual delivered product, and does not
include any compensation for the damage caused by malfunction of the delivered product.
1.2 Scope of service
The service costs such as the costs of sending technical personnel are not included in the price of the delivered
product. Customers will be charged for the following costs:
(1) Assistance with installation adjustments and test running
(2) Maintenance inspections, adjustments, and repairs
(3) Technical assistance and technical training
<Advme2608A><Advme2608A>
<Advme2608A><Advme2608A>
<Advme2608A>
7
2. Features
z The Advme2608A is equipped with 64 analog input channels with 16-bit resolution.
z The input range of each connector (CN1, CN2) can be set respectively to one of the following: ±10[V], 0-10[V],
0-5[V], 0-20[mA] (current mode)
z The analog input can be used to set all channels at once to single-ended or differential input.
z The number of analog input channels is 64 for single-ended inputs and 32 for differential inputs.
z Equipped with a photo-coupler that assures complete insulation between the analog and digital circuits.
z Each channel is switched by a multiplexer and the A/D conversion is performed sequentially using two A/D
converters.
z The conversion time is 967.2µs for 64-channel batch conversion and 487.2µs for 32-channel batch conversion.
z The Advme2608A supports the following three trigger modes.
Batch conversion mode for software triggers
Continuous batch conversion mode for external trigger signals
Continuous batch conversion mode for pacer clock (built-in timer) triggers
z The A/D conversion data is sequentially written to the FIFO in ascending order of the channel number.
z When the A/D conversion of the final channel is completed, an interrupt can be issued to the host CPU.
z VME double-high, VME board with a single slot that are compatible with A16, D16, and D8 (EO)
z Operates on single 5V power supplied from the VME bus
z RoHS compliant
<Advme2608A><Advme2608A>
<Advme2608A><Advme2608A>
<Advme2608A>
8
3. Specifications
z Analog Input
Number of channels .......... 64 channels (Single-end) or 32channels (Differential)
Input range ........................ ±10[V]
0 to 10[V]
0 to 5[V]
0 to 20[mA](Current mode)
Input impedance ............... 1[M] (ityp.)
250[] (typ. Current mode)
Input filter ......................... 500Hz (-3dB)
z A/D conversion
Resolution ......................... 16 bits
Output mode ..................... Binary
±10[V]range 0h to FFFFh (-10.00V to +10.00V)
0 to 10[V]range 0h to FFFFh (0.00V to +10.00V)
0 to 5[V]range 0h to FFFFh (0.00V to +5.00V)
0 to 20[mA]range 0h to FFFFh (0.00mA to 20.00mA)
Overall accuracy ............... ±0.1[%] (F.S.)
Conversion rate ................. 30µs per channel
487.2µs/32channel (Differential)
967.2µs/64channel (Single-end)
z Bus interface
Bus standard ..................... VME bus Revision C.3
Data width ......................... 16bits,8bits [D16,D8(EO)]
Address width ................... 16bits [A16]
Accessible by AM codes 29H and 2Dh
Address space occupied ..... 64 bytes of VME bus A16 address spaces C000h to FFFFh
Interrupt request ................ An interrupt is to be issued to one of the VME interrupt request lines IRQ1 to 7.
Interrupt factor .................. The A/D conversion data of the final channel is written to the FIFO
The FIFO is full
z Power Supply
Power supply voltage........ 5V±5% (supplied from the VME bus)
Current consumption ........ 1.0[A] (typ.)
z Environment specification
Operating temperature range ......... 0 to 50°C
Operating humidity range .............. 35 to 80%RH (no condensation permitted)
Storage temperature range ............. -10 to70°C
Storage humidity range .................. 0 to 90%RH (no condensation permitted)
<Advme2608A><Advme2608A>
<Advme2608A><Advme2608A>
<Advme2608A>
9
z Mechanical Specifications
Board size ......................... 172 × 262 × 20[mm] (protrusions not included)
Double height, single slot
Weight ............................... 300[g] (typ.)
z Isolation voltage ..................... Input - system interval AC500V (1MIN)
<Advme2608A><Advme2608A>
<Advme2608A><Advme2608A>
<Advme2608A>
10
4. Configuration
The block diagram of Advme2608A is shown in the [Figure 4].
[Figure 4] Block Diagram of Advme2608A
Input filter
Multiplexer
Gain offset
Adjustment/
Range setting
A/D conversion data
FIFO for storage
32
32
2
VME bus
Address
decoder
Control logic
DTACK
Outbreak 
circuit
D15 to 0
AM
AS
DS0
DS1
IACK
LWORD
DTACK
Odd number channels
Input connector
(CN2)
/
/
/
Instrumentation amplifier
A/D conversion control circuit
A/D Converter
Input filter
Multiplexer
Gain offset
Adjustment/
Range setting
32
32
2
Even number channels
Input connector
/
/
/
Instrumentation amplifier
A/D Converter
Photo coupler
A
DSW1,DSW2
(CN1)
<Advme2608A><Advme2608A>
<Advme2608A><Advme2608A>
<Advme2608A>
11
5. Setting
5.1 Switches, Jumpers, Volume, and Connectors
Figure 5.1 shows the layout of switches, jumpers, volume, and connectors.
DSW1,DSW2 ............... Base address setting
JP1 ................................ External trigger setting
JP2 ................................ Input mode setting
JP4,JP6 ......................... Input range setting
JP7 to JP70 .................. Setting of the current mode
VR5,VR6 ..................... Offset ,Gain adjustment (CN1)
VR3,VR4 ..................... Offset ,Gain adjustment (CN2)
LED1 ............................ Lights up when access was made to the Advme2608A
LED2 ............................ Lights up when A/D conversion started
[Figure 5.1] Layout of Switches, Jumpers, Volume, and Connectors
DSW2
DSW1
LED1
LED2
CN2
CN1
JP70
JP63
JP62
JP55
JP54
JP47
JP46
JP39
JP38
JP31
JP30
JP23
JP22
JP15
JP14
JP7
5
4
3
2
1
6
7
8
9
10
VR6
VR3
JP2
JP1
JP4
VR5
VR4
5
4
3
2
1
6
7
8
9
10
JP6
<Advme2608A><Advme2608A>
<Advme2608A><Advme2608A>
<Advme2608A>
12
5.2 Base Address Setting (DSW1,DSW2)
The Advme2608A occupies a 64-byte contiguous address space. This 64-byte area can be set within the range of
C000h to FFFFh in the VME bus A16 short address space by using a rotary switch on the board.
The starting address of the required area is referred to as a base address (BASE).
The base address is assigned with the DIP rotary switches, DSW 1 and 2.
DSW1 is used to assign addresses corresponding to A6 to A9 address buses, and DSW2 to assign addresses
corresponding to A10 to A13 base address buses.
The following equation shows a correspondence between the base address (BASE) and DSW1 (DSW2).
[BASE] = C000h+ (DSW2 set value << 10 ) + (DSW1 set value << 6 )
The set value <<N means that the set value is shifted to the left by N bit(s).
When DSW2 is set to 5h and DSW1 is set to Ch:
[BASE] =C000h + (5h << 10 ) + (Ch << 6)
=C000h + 1400h + 300h
=D700h
5.3 Analog Input Form Setting (JP2)
The Advme2608A allows the setting of analog input formats all at once to single-ended or differential input.
The number of input channels is 64 for single-ended inputs and 32 for differential inputs.
Set the analog input format using JP2 on the board. The analog input format for the trigger mode register should
be set to be the same as that for JP2.
Refer to Chapter 9 for relationship between channel numbers and connector pin numbers of each input format.
JP2
Open Single-end
Short Differential
<Advme2608A><Advme2608A>
<Advme2608A><Advme2608A>
<Advme2608A>
13
5.4 Analog Input Range Setting (JP4,JP6,JP7 to JP70)
Among the analog inputs, JP4 is used to set an analog input range of even number channels and JP6 is used to set
an analog input range of odd number channels.
The even number channels correspond to connector 1 (CN1) and odd number channels to connector 2 (CN2)
respectively.
The following shows the jumper settings of each range.
Analog Input range setting JP4 : Even number channel (CN1)
JP6 : Odd number channel (CN2)
: Short
The current mode is set using JP7 to JP70.
The ranges 0 to 20[mA] (current mode) and 0 to 5[V] are common for JP4 and JP6 settings. They can be mixed by
the settings of JP7 toJP70.
By selecting a single-ended input within the range of 0 to 5[V] and short-circuiting a jumper corresponding to the
current mode channel, only the channel enters the current mode.
The following shows the relationship between JP7 to JP70 and each channel in the current mode.
Current mode setting
JP7 channel 0
JP8 channel 2
::
JP38 channel 62
JP39 channel 1
JP40 channel 3
::
JP70 channel 63
1
5
10
6
1
5
10
6
1
5
10
6
10[V]
0
10[V]
0
5[V]
(0
20[mA])
<Advme2608A><Advme2608A>
<Advme2608A><Advme2608A>
<Advme2608A>
14
5.5 External Trigger Setting (JP1)
JP1 is used to set whether to use the external trigger input or not. The “trigger mode setting register” is used to set
which to regard as a trigger, the start or stop of an external trigger signal.
The minimum pulse width of the external trigger signal is 70[ns].
When start of external signal is regarded as a trigger
When stop of external signal is regarded as a trigger
t : Differential (32ch) ................. 0.5ms and above
Single-end (64ch) ................. 1ms and above
70ns and above
70ns and above
t
70ns and above
70ns and above
t
JP1
Open External trigger input is not used.
Short External trigger input is used.
<Advme2608A><Advme2608A>
<Advme2608A><Advme2608A>
<Advme2608A>
15
6. Control
The Advme2608A can adjust gain and offset of each connector, CN1 (even number channel) and CN2 (odd number
channel), all at once against analog inputs.
Though the connectors have been adjusted before shipment, readjustment may be needed due to changes in range and
secular changes.
After setting a range to use, make adjustment following the procedure below.
z Range of ±10[V]
(1) Connect to a channel which is used to adjust outputs of standard voltage generator.
(2) Set the output voltage (hereafter referred to as “output voltage”) of the standard voltage generator to 0[V].
Adjust VR6 or VR3 such that the A/D conversion data of the adjusting channel becomes 8000h.
VR6 corresponds to CN1 (even number channel) and VR3 corresponds to CN2 (odd number channel).
(3) Set the output voltage to 9.8[V]. Adjust VR5 or VR4 such that the A/D conversion data becomes FD71h.
VR5 corresponds to CN1 (even number channel) and VR4 corresponds to CN2 (odd number channel).
(4) Set the output voltage to -9.8[V]. Check that the A/D conversion data is within the range of 028Fh ±41h.
z Range of 0 to 10[V]
(1) Connect to a channel which is used to adjust outputs of standard voltage generator.
(2) Set the output voltage of the standard voltage generator to 0.2[V]. Adjust VR6 or VR3 such that the A/D
conversion data of the adjusting channel becomes 051Fh.
VR6 corresponds to CN1 (even number channel) and VR3 corresponds to CN2 (odd number channel).
(3) Set the output voltage to 9.8[V]. Adjust VR5 or VR4 such that the A/D conversion data becomes FAE1h.
VR5 corresponds to CN1 (even number channel) and VR4 corresponds to CN2 (odd number channel).
(4) Set the output voltage to 5[V]. Check that the A/D conversion data is within the range of 8000h ±41h.
z Range of 0 to 5[V]
(1) Connect to a channel which is used to adjust outputs of standard voltage generator.
(2) Set the output voltage of the standard voltage generator to 0.1[V]. Adjust VR6 or VR3 such that the A/D
conversion data of the adjusting channel becomes 051Fh.
VR6 corresponds to CN1 (even number channel) and VR3 corresponds to CN2 (odd number channel).
(3) Set the output voltage to 4.9[V]. Adjust VR5 or VR4 such that the A/D conversion data becomes FAE1h.
VR5 corresponds to CN1 (even number channel) and VR4 corresponds to CN2 (odd number channel).
(4) Set the output voltage to 2.5[V]. Check that the A/D conversion data is within the range of 8000h ±41h.
z Range of 0 to 20[mA]
This range adjustment method is basically the same as that for 0-5[V]. The current is converted into voltage by
250 resistance of the input circuit. Though errors are contained in the 250 resistance, they cannot be adjusted
since they are unique to each channel.
So, if JP7-JP70 are short-circuited after the adjustment is completed in the same method as that for 0-5[V], the
adjustment is completed for the range of 0-20[mA].
<Advme2608A><Advme2608A>
<Advme2608A><Advme2608A>
<Advme2608A>
16
7. Register Mapping
The addresses stated in the table are relative addresses in the base address register.
Access by byte [D8 (EO)]
Note) - : Not used
Relative
Address
Write Read
0h --
1h Board ID Register
2h --
3h Interrupt Vector Register
4h --
5h Interrupt Level Register
6h --
7h Interrupt Clear Register
810h --
11h Trigger Mode Setting Register
12h --
13h Pacer Clock Setting Register (Upper)
14h --
15h Pacer Clock Setting Register (Lower)
16h --
17h Software Trigger Register
18h --
19h Board Status Rgister
1Ah --
1Bh FIFO Status Register
1Ch --
1Dh FIFO Full Interrupt Enable Register
1Eh Data Register (Upper byte)
1Fh Data Register (Lower byte)
20h --
21h FIFO Reset Register
223Eh --
<Advme2608A><Advme2608A>
<Advme2608A><Advme2608A>
<Advme2608A>
17
Access by word [D16]
Note) - : Not used
7.1 Board ID Register
This register is used to recognize which board is the one among the Advme-series boards.
The board ID for the Advme2608A is 49h.
This register is read only and ignores write.
Access by word
Bit 15 to 8 : Unused
Bit 7 to 0 : 49h
Access by byte
Bit 7 to 0 : 49h
7.2 Interrupt Vector Register
This Advme2608A sets the interrupt vector (status ID) outputted to the VME bus in the interrupt acknowledge
cycle.
It becomes 0 clear after reset.
This register is write only, and the reading value is indefinite.
Access by word
Bit 15 to 8 : Unused
Bit 7 to 0 : Interrupt vector (status ID)
Access by byte
Bit 7 to 0 : Interrupt vector (status ID)
Relative
Address
Write Read
0h Board ID Register
2h Interrupt Vector Register
4h Interrupt Level Register
6h Interrupt Clear Register
8Eh --
10h Trigger Mode Setting Register
12h Pacer Clock Setting Register (Upper)
14h Pacer Clock Setting Register (Lower)
16h Software Trigger Register
18h Board status register
1Ah FIFO status register
1Ch FIFO Full Interrupt Enable Register
1Eh Data Register
20h FIFO Reset Register
223Eh --
<Advme2608A><Advme2608A>
<Advme2608A><Advme2608A>
<Advme2608A>
18
7.3 Interrupt Level Register
This register is used to specify the VME bus interrupt lines (levels) asserted by the Advme2608A when interrupt
occurs.
When not using interrupt, 0 should be selected.
The setting is cleared to 0 at reset.
This register is write only, and the reading value is indefinite.
Access by word
Bit 15 to 3 : Unused
Bit 2 to 0 : Interrupt level
Access by byte
Bit 7 to 3 : Unused
Bit 2 to 0 : Interrupt level
Interrupt level
7.4 Interrupt Clear Register
This register clears each interrupt factor.
There are two interrupt factors with the Advme2608A.
zFIFO full interrupt .... This occurs when the FIFO for storing A/D conversion results is full (512 words).
zA/D scan interrupt. .. This occurs when A/D conversion data of the final channel was written to the FIFO.
These can be identified by a board status register.
Both of these interrupt factors are cleared by writing any value to this register.
When the software interrupt processing routine is completed, any value should be written to enable the next
interrupt.
Note that if the FIFO is full, the FIFO full interrupt factors cannot be cleared.
This register is write only, and the reading value is indefinite.
Bit 2,1,0 Interrupt Level
000 Interrupt is masked
001 IRQ1/
010 IRQ2/
011 IRQ3/
100 IRQ4/
101 IRQ5/
110 IRQ6/
111 IRQ7/
<Advme2608A><Advme2608A>
<Advme2608A><Advme2608A>
<Advme2608A>
19
7.5 Trigger Mode Setting Register
This register is used to set an analog input format and various operation modes including the A/D conversion start
trigger mode.
The analog input format must be the same as that for a jumper (JP2) on the board.
It becomes 0 clear after reset.
This register is write only, and the reading value is indefinite.
Access by word
Bit 15 to 4 : Unused
Bit 3 : External trigger polarity
Bit 2 to 1 : Trigger choice
Bit 0 : Input form
Access by byte
Bit 7 to 4 : Unused
Bit 3 : External trigger polarity
Bit 2 to 1 : Trigger choice
Bit 0 : Input form
External trigger polarity 1 : Rising edge of external trigger signal
0 : Falling edge of external trigger signal
Trigger choice
Input form 0 : Differential (32 channel)
1 : Single-end (64 channel)
Bit 2,1 Trigger choice
00 Software Trigger mode
01 External Trigger mode
10 Pacer Clock mode
11 Do not set it
<Advme2608A><Advme2608A>
<Advme2608A><Advme2608A>
<Advme2608A>
20
7.6 Pacer Clock Setting Register (Upper / Lower)
In the pacer clock mode, the A/D conversion is performed with a period of pacer clock (built-in timer).
This register is used to set a period of trigger signals timed by a pacer clock.
The period of trigger signals timed by the pacer clock can be set within the range of 1-1024ms at 1ms interval.
The setting should be made in order of upper 2 bits and lower 8 bits among all 10 bits.
A pacer clock period is set when writing to the lower 8 bits have been completed.
The period is given with the following equation.
It becomes 0 clear after reset.
This register is write only, and the reading value is indefinite.
Period T= 1ms × n (n: pacer clock settings 1-1023)
(When n=0 (initial value), the period is 1024ms.)
zSetting of upper 2 bits
Access by word
Bit 15 to 2 : Unused
Bit 1 to 0 : Upper 2 bits
Access by byte
Bit 7 to 2 : Unused
Bit 1 to 0 : Upper 2 bits
zSetting of lower 8 bits
Access by word
Bit 15 to 8 : Unused
Bit 7 to 0 : Lower 8 bits
Access by byte
Bit 7 to 0 : Lower 8 bits
  • Page 1 1
  • Page 2 2
  • Page 3 3
  • Page 4 4
  • Page 5 5
  • Page 6 6
  • Page 7 7
  • Page 8 8
  • Page 9 9
  • Page 10 10
  • Page 11 11
  • Page 12 12
  • Page 13 13
  • Page 14 14
  • Page 15 15
  • Page 16 16
  • Page 17 17
  • Page 18 18
  • Page 19 19
  • Page 20 20
  • Page 21 21
  • Page 22 22
  • Page 23 23
  • Page 24 24
  • Page 25 25
  • Page 26 26
  • Page 27 27
  • Page 28 28
  • Page 29 29
  • Page 30 30
  • Page 31 31
  • Page 32 32
  • Page 33 33
  • Page 34 34
  • Page 35 35
  • Page 36 36
  • Page 37 37
  • Page 38 38
  • Page 39 39
  • Page 40 40
  • Page 41 41
  • Page 42 42
  • Page 43 43
  • Page 44 44

Eurotech Advme2608A Owner's manual

Type
Owner's manual

Ask a question and I''ll find the answer in the document

Finding information in a document is now easier with AI