MPC860 ATOM1 User’s Manual 1.0 -2- No Restriction on Circulation
TABLE OF CONTENTS
1. INTRODUCTION ............................................................................................................. 5
1.1. Key Features of ATOM1 ............................................................................................ 5
1.2. MPC860 SCCs ............................................................................................................ 6
1.3. Conventions ................................................................................................................6
2. ATOM1 OPERATION ...................................................................................................... 7
2.1. Number of Connections .............................................................................................. 7
2.2. Cell Delineation .......................................................................................................... 7
2.3. AAL Frame Check Sequences .................................................................................... 8
2.4. PDH & SDH Physical Layer Signalling & OAM Functions ...................................... 8
2.5. Traffic Control ............................................................................................................8
2.6. Physical Interface ........................................................................................................ 8
2.7. Buffer Descriptor and Buffer Structures ..................................................................... 8
3. REGISTERS ...................................................................................................................... 9
3.1. General Registers ........................................................................................................ 9
3.1.1. RISC Controller Configuration Register (RCCR) .................................................. 9
3.1.2. CP Control Registers ............................................................................................... 9
3.2. SCC Registers ............................................................................................................. 9
3.2.1. General SCC Mode Register (GSMR) .................................................................. 10
3.2.2. Protocol Specific Mode Register (PSMR) ............................................................ 10
3.2.3. SCC Event Register (SCCE) ................................................................................. 10
3.2.4. SCC Mask Register (SCCM) ................................................................................ 11
3.2.5. SCC Status Register (SCCS) ................................................................................. 11
3.3. Serial Interface .......................................................................................................... 11
3.3.1. Serial Interface Registers ...................................................................................... 12
3.3.2. Serial Interface RAM ............................................................................................ 12
3.4. Parallel Port Registers ............................................................................................... 13
4. ATOM1 SCC PARAMETER RAM ................................................................................ 14
4.0.1. BD Queue Pointers (RBASE and TBASE) ........................................................... 15
4.0.2. SCC Function Code Registers (RFCR and TFCR) ............................................... 15
4.0.3. Transparent Mode Receive Maximum Buffer Length (MRBLR) ........................ 15
4.0.4. SCC Internal State Parameters (RSTATE and TSTATE) ..................................... 15
4.0.5. BD and Buffer Pointers (R_PTR, RBD_PTR, T_PTR and TBD_PTR) ............... 16
4.0.6. Transmit and Receive Buffer Queue Start Pointers (TX_BUFF1, RX_BUFF1).. 16
4.0.7. Buffer Counters (R_CNT and T_CNT) ................................................................ 16
4.0.8. Receiver Delineation Counters (ALPHA and DELTA) ........................................ 16
4.0.9. Version Number (AVERSION) ............................................................................ 16
4.0.10. CAM Port Selection (CAM_PORT) ..................................................................... 16
4.0.11. Empty Cell Data (EHEAD and EPAYLOAD) ..................................................... 17
4.0.12. Status Information (ASTATUS) ........................................................................... 17
4.0.13. Non-Matching Header Storage and Counter (NMA_HEAD and NMA_CNT) ... 17
4.0.14. HEC Error Counter (HEC_ERR) .......................................................................... 18
4.0.15. Incoming Header Mask and Look-up Table (HEADMASK and HEADn) .......... 18
4.0.16. Temporary Data Storage ....................................................................................... 18