QSFP/QSFP+ Transceiver and
Active Optical Cable Evaluation Kit
User Guide
Introduction
This Evaluation kit provides the designer with a conve-
nient way to evaluate Avago Technologies QSFP/QSFP+
Transceivers and/or Active optical cables (AOCs). The de-
signer can evaluate the management Interface, as well as
the electrical and optical performance. This user guide of-
fers a brief description of the evaluation board, the Graph-
ical User Interface along with basic operating instructions.
The Avago technologies QSFP/QSFP+ devices consist of
Four - Channel, Pluggable, Parallel-Fiber-Optics Transceiv-
ers and Active optical cables. These are high performance
ber optics modules and cables for short-range parallel
multi-lane data communication and interconnect appli-
cations. The transceivers and active optical cables inte-
grate four data lanes in each direction with up to 40 Gbps
aggregate bandwidth. Each lane can operate up to 10
Gbps and up to 100 m at 10Gbps using OM3 ber. These
modules and active cables are designed to operate over
multimode ber systems using a nominal wavelength of
850nm. The electrical interface uses a 38-contact edge
type connector. The optical interface uses an 8 or 12 ber
MTP® (MPO) connector. These modules and active cables
incorporate Avago Technologies proven integrated circuit
and VCSEL technology to provide reliable long life, high
performance, and consistent service.
Equipment List
Contents in the Basic Sample Kit:
• QSFP/QSFP+ Evaluation Board
• QSFP/QSFP+ Evaluation Kit User Guide
• Graphical User Interface
Optional Contents in the Sample Kit:
• USB to I2C i-Port
• Power supply – Wall Plug
Test Equipment Not Included in Sample Kit
• 3.3V Power Supply (1A minimum)
• High Frequency Coaxial Cables with SMA Connectors
• 12 Fiber Multimode Fiber Optic Ribbon Cable with MTP
Connectors
• 12 Fiber Multimode Fiber Optic Break-Out Cable with
MTP-to-SC/ST Connectors
• Agilent 86100C DCA-J or Equivalent Digital
Communications Analyzer
• Agilent 86105C or Equivalent DCA Plug-In Module
• Agilent N4903 or Equivalent Pattern Generator / Bit
Error Rate Tester
• Optical Power Meter
• Variable Optical Attenuator
Ordering Information
AFBR-79QEKZ
Evaluation Board only
AFBR-79Q4EKZ
Basic Kit includes Evaluation Board,
GUI Software and Documentation
AFBR-79Q2EKZ
Full Kit includes Evaluation Board,
GUI Software Documentation,
i-Port and Power Supply
2
Avago Technologies Transceivers and Active Optical Cables compatible for testing with the QSFP/QSFP+ Evaluation Kit:
AFBR-79Q4Z QDR 10G InniBand
Where, for cable rating
x = R for Riser cable rating
x = P for Plenum
[1]
cable rating
x = H for Low smoke zero halogen
[2]
yy = cable length in meters
Note to test a full Active Optical Cable
link, the user will need two Evaluation
boards, as these devices cannot be
looped back optically.
AFBR-79Q4Z-D QDR 10G InniBand, with Full Digital Diagnostic Monitoring
AFBR-79Q5Z DDR 5G InniBand
AFBR-79Q5Z-D DDR 5G InniBand, with Full Digital Diagnostic Monitoring
AFBR-79E4Z-D 40GBASE-SR4 with DMI
AFBR-79E4Z 40GBASE-SR4
AFBR-79Q4xACyyZ QDR 10G InniBand
AFBR-79Q5xACyyZ DDR 5G InniBand
Notes:
1. OFNR/CSA-FT-6 (plenum) cable
2. OFN-LS (LSZH rated) cable
For additional information consult the respective QSFP/QSFP+ Datasheet as well as standard INF-8436i QSFP Transceiver
Specication Revision 1.0 or SFF-8436 Specication for QSFP+ Optical Modules
Figure 1. Top View Evaluation Printed-Circuit Board
Evaluation Board Description
The top view of the evaluation printed circuit board is shown in Figure 1 and Figure 2.
3
Figure 2. Top View Evaluation Printed-Circuit Board with Labels
Labels in Figure 2 include:
1. TX4 +/- : Transmitter #4 SMA Dierential Input
2. TX2 +/- : Transmitter #2 SMA Dierential Input
3. TX1 +/- : Transmitter #1 SMA Dierential Input
4. TX3 +/- : Transmitter #3 SMA Dierential Input
5. RX4 +/- : Receiver #4 SMA Dierential Output
6. RX2 +/- : Receiver #2 SMA Dierential Output
7. RX1 +/- : Receiver #1 SMA Dierential Output
8. RX3 +/- : Receiver #3 SMA Dierential Output
9. 3.3V DC Power
10. 9V DC, Wall-plug input
11. Potentiometer Vcc Adjustment
12. QSFP Cage
13. DIP Switches
14. LED Indication: ModSelL, LPMode, RESET, Interrupt Out, ModPrsL Out
15. IPORT
16. RESET Button
Notes
1. The Evaluation Board may run using the 3.3V Power Input OR the 9V DC Wall plug input. Do not operate both power inputs at the same time.
2. The Vcc Adjustment Potentiometer allows the user to vary the voltage from 2.5V to 4.0V range. Note, however, that the voltage should be kept
under 3.6V as per the datasheet Absolute Maximum Rating.
3. The DIP Switch settings should be: 1 = on, 2 = on, 3 = default low/o, 4 = default low/o
9
10
11
12
13
14
15
1
2
3
4
5
6
7
8
16
4
Table 1. Input/Output Reference Designator Descriptions for the Evaluation Board
Reference Designator Connector Name Description
J1 Rx1- Receiver #1 SMA Dierential Output Negative
J2 Rx1+ Receiver #1 SMA Dierential Output Positive
J3 Tx1+ Transmitter #1 SMA Dierential Input Positive
J4 Tx1- Transmitter #1 SMA Dierential Input Negative
J5 Rx2- Receiver #2 SMA Dierential Output Negative
J6 Rx2+ Receiver #2 SMA Dierential Output Positive
J7 Tx2+ Transmitter #2 SMA Dierential Input Positive
J8 Tx2- Transmitter #2 SMA Dierential Input Negative
J9 Rx3- Receiver #3 SMA Dierential Output Negative
J10 Rx3+ Receiver #3 SMA Dierential Output Positive
J11 Tx3+ Transmitter #3 SMA Dierential Input Positive
J12 Tx3- Transmitter #3 SMA Dierential Input Negative
J13 Rx4- Receiver #4 SMA Dierential Output Negative
J14 Rx4+ Receiver #4 SMA Dierential Output Positive
J15 Tx4+ Transmitter #4 SMA Dierential Input Positive
J16 Tx4- Transmitter #4 SMA Dierential Input Negative
J17 3.3V DC Vcc 3.3V Power (Input)
J18 GND Power Ground (Input)
J20 9V DC Vcc Wall Plug Power (Input)
SCL SCL TWS Interface Clock Signal (Input)
SDA SDA TWS Data Signal (I/O)
Electrical Connections
Electrical connections from the modules/AOCs to the
evaluation board are achieved through a 38 contact edge
type connector. This connector enables the user to easily
interchange modules/AOCs allowing testing of many de-
vices using a single evaluation board.
These evaluation boards provide access to all transmit and
receive high-speed I/O’s through straight PCB mount SMA
connectors. AC coupling capacitors are located inside the
QSFP/QSFP+ transceiver of active optical cable and are
not required on the host board.
Descriptions of the test access points including the high-
speed I/O connections and control and sense outputs are
listed in Table 1.
High Speed Input/Output Lines
There are 4 dierential pairs of high-speed lines on the
evaluation board. The Transmitter has 4 dierential pairs
of input lines, TX[1:4]p/n and the Receiver has 4 corre-
sponding pairs of dierential output lines, RX[1:4]p/n. All
high-speed dierential data lines are 100 W dierential
controlled impedance transmission lines of equal length
to minimize inter-channel skew. It is recommended that
all high-speed data lines be terminated with 100 W dier-
entially when not in use to eliminate back-reection noise.
Control Signal Pins
TWS interface
TWS interface is implemented in the modules/AOCs as
slave devices and compatible with industry standard two-
wire serial protocols compatible to Atmel Two-wire Serial
EEPROMs such as AT24C01A.
5
Figure 3. Test Conguration
Fiber Ribbon Cable and Connectors
Avago Technologies recommends the use of 50/125um
multimode 12-ber ribbon ber cable with MTP® connec-
tors to implement tests of the QSFP/QSFP+ Transceivers.
Note, OM3 ber should be used for link lengths above
35m. Important: This cable should not have a twist; the TX
channels must go to the corresponding RX channels on
the other end. This maintains the correct channel polarity
with respect to the transmit/receive pair (e.g. Tx channel
0 connects to Rx channel 0, Tx channel 4 connects to Rx
channel 4). Fiber breakout cable with MTP®-to-SC con-
nectors is useful when testing individual channel perfor-
mance. For recommended cable, see reference [4] and for
Optical receptacle and Channel Orientation see reference
[5].
Power Supply
The each board requires 3.3V dc power supplies connec-
tion at connector J17 and J18 labeled as “3.3VDC” or 9V
DC at connector J20 from the wall plug power source. For
example, the Transceiver module AFBR-79Q4Z will draw
up to 425mA current through 3.3VDC when all channels
are enabled and transmitting and receiving data under
nominal operating conditions
Power Supply Noise Filter
This follows the Recommended Host board Power Sup-
ply Filtering as shown in the INF-8436i QSFP Transceiver
Specication Revision 1.0 or SFF-8436 Specication for
QSFP+ Optical Modules or the QSFP AFBR-79Q4Z Trans-
ceiver Datasheet Figure 6.
Electro-Optical Test Congurations
A commonly used test conguration for evaluating par-
allel optical components is shown in Figure 3. It is often
dicult to generate 4 separate channels of data patterns
in a test environment and often dicult to measure and
conduct simultaneous bit error rate analysis on all 4 chan-
nels. Four channel parallel BERTs may used. As well, single
channel BERT (Agilent 71603B) will provide adequate sin-
gle channel data.
Using the test conguration shown in Figure 3, transmit-
ter optical characteristics including jitter, rise/fall time,
output power, and eye diagrams can be measured. Re-
ceiver characteristics including electrical jitter, rise/fall
time, sensitivity, and eye diagrams can also be measured.
TX
QSFP Evaluation
Board
Optical
Attenuator
Data In
Optical
Data In
Electrical
Digital Communication Analyzer
Pattern
Output
Pattern
Input
BERT
RX
Tx3 +/-
Tx1 +/-
Tx2 +/-
Tx4 +/-
Rx1 +/-
Rx2 +/-
Rx3 +/-
Rx4 +/-
6
Evaluation Board Schematic
The evaluation board electrical schematics are shown in the Appendix.
References
1. AFBR-79Q4Z Product Data Sheet
www.avagotech.com
2. “Critical Design Guidelines for Successful Application of Parallel Fiber Optic Modules”. Avago Technologies, Inc.
Application Note 1280
3. Agilent Test Equipment User Manuals
www.agilent.com
4. Timbercon www.timbercon.com
5. INF-8436i QSFP Transceiver Specication Revision 1.0
6. SFF-8436 Specication for QSFP+ Optical Modules
7
Evaluation Board Bill of Materials
Part Type Designator Footprint Description Supplyer Supplier part Number: QTY*
0.1uF C3 0603-1 Capacitor, 0.1uF Digi-Key PCC1762CT-ND 6
0.1uF C8 0603-1 Capacitor, 0.1uF Digi-Key PCC1762TR-ND
0.1uF C5 0603-1 Capacitor, 0.1uF Digi-Key PCC1762TR-ND
0.1uF C13 0603-1 Capacitor, 0.1uF Digi-Key PCC1762TR-ND
0.1uF C9 0603-1 Capacitor, 0.1uF Digi-Key PCC1762TR-ND
0.1uF C1 0603-1 Capacitor, 0.1uF Digi-Key PCC1762TR-ND
0R(nf) R18 0402-1 Resistor, 0 ohm jumper Digi-Key P0.0JCT-ND 6
0R(nf) R19 0402-1 Resistor, 0 ohm jumper Digi-Key P0.0JCT-ND
0R R16 0402-2 Resistor, 0 ohm jumper Digi-Key P0.0JCT-ND
0R R15 0402-2 Resistor, 0 ohm jumper Digi-Key P0.0JCT-ND
0R R14 0603-1 Resistor, 0 ohm jumper Digi-Key P0.0JCT-ND
0R R13 0603-1 Resistor, 0 ohm jumper Digi-Key P0.0JCT-ND
10K (n.f.) R11 0402-2 Resistor, 10k ohm Digi-Key P10KJCT-ND 7
10K (n.f.) R10 0402-2 Resistor, 10k ohm Digi-Key P10KJCT-ND
10K (n.f.) R12 0402-2 Resistor, 10k ohm Digi-Key P10KJCT-ND
10K R7 0402-2 Resistor, 10k ohm Digi-Key P10KJCT-ND
10K R8 0402-2 Resistor, 10k ohm Digi-Key P10KJCT-ND
10K R9 0402-2 Resistor, 10k ohm Digi-Key P10KJCT-ND
10K R6 0402-2 Resistor, 10k ohm Digi-Key P10KJCT-ND
22uF C7 0805-1 Capacitor, 22uF tantalum Digi-Key 511-1435-1-ND 4
22uF C2 0805-1 Capacitor, 22uF tantalum Digi-Key 511-1435-1-ND
22uF C4 0805-1 Capacitor, 22uF tantalum Digi-Key 511-1435-1-ND
22uF C6 0805-1 Capacitor, 22uF tantalum Digi-Key 511-1435-1-ND
74LVC04APW U1 TSSOP-14 IC, Hex inverter Digi-Key 296-1219-1-ND 1
200R R17 0603-1 Resistor, 200 ohm Digi-Key P200GCT-ND 1
200R R5 0805-1 Resistor, 200 ohm Digi-Key P200ACT-ND 5
200R R3 0805-1 Resistor, 200 ohm Digi-Key P200ACT-ND
200R R2 0805-1 Resistor, 200 ohm Digi-Key P200ACT-ND
200R R1 0805-1 Resistor, 200 ohm Digi-Key P200ACT-ND
200R R4 0805-1 Resistor, 200 ohm Digi-Key P200ACT-ND
240R R21 0805-1 Resistor, 200 ohm Digi-Key P240ACT-ND 2
240R R20 0805-1 Resistor, 200 ohm Digi-Key P240ACT-ND
500R R22 vr-6 Potentiometer, 500 Ohm Digi-Key 3362U-501LF-ND 1
698R R23 0805-1 Resistor, 698 Ohm Digi-Key P698CCT-ND 1
1000uF/25V C12 RB-.5/1.0 Capacitor, 1000uF/25V radial Digi-Key 493-1557-ND 1
DIODE D5 0805-1 Diode Digi-Key RB160M-30CT-ND 5
DIODE D4 0805-1 Diode Digi-Key RB160M-30CT-ND
DIODE D3 0805-1 Diode Digi-Key RB160M-30CT-ND
DIODE D1 0805-1 Diode Digi-Key RB160M-30CT-ND
DIODE D2 0805-1 Diode Digi-Key RB160M-30CT-ND
ModSelL LED1 0805-1 LED Yellow Digi-Key L62407CT-ND 6
LPMode LED2 0805-1 LED Yellow Digi-Key L62407CT-ND
RESET LED3 0805-1 LED Yellow Digi-Key L62407CT-ND
Interrupt OUT LED4 0805-1 LED Yellow Digi-Key L62407CT-ND
ModPrsL OUT LED5 0805-1 LED Yellow Digi-Key L62407CT-ND
**Note: This Bill of Materials is subject to change at any time. However, at the time of writing of this document, the BOM is accurate.
8
Evaluation Board Bill of Materials (Cont...)
Part Type Designator Footprint Description Supplyer Supplier part Number: QTY*
EB Power Prs LED6 0805-1 LED Yellow Digi-Key L62407CT-ND
SCL TP4 KEYS5005 White test Point "SCL" Digi-Key 5012K-ND 3
ModPrsL TP6 KEYS5005 White Test Point "ModPresel" Digi-Key 5012K-ND
LPMode TP7 KEYS5005 White Test Point 'LP_Mode' Digi-Key 5012K-ND
Interrupt TP2 KEYS5005 White Test Point "Interupt" Digi-Key 5012K-ND 1
GND TP14 KEYS5005 Black Test Point "GND" Digi-Key 5011K-ND 1
RESET TP3 KEYS5005 White test Point "Reset" Digi-Key 5012K-ND 1
ModSelL TP1 KEYS5005 White Test Point "ModSel" Digi-Key 5012K-ND 2
SDA TP5 KEYS5005 White Test Point "SDA" Digi-Key 5012K-ND
5V J17 WIRE_TERM Johnson Components
2mm Jack red 1050752001
Digi-Key J109-ND 1
GND J18 WIRE_TERM Johnson Components
2mm jack 105-0753-001
Digi-Key J110-ND 1
I2C_CON CON6 I2C_CONN Molex, I2C connector,
P/N/ 15-83-0064
Arrow 4-1761206-1 1
LQH32C-
N1R0M53
L2 1210 1uH 1A 1210 Digi-Key 490-4055-1-ND 3
LQH32C-
N1R0M53
L1 1210 1uH 1A 1210 Digi-Key 490-4055-1-ND
LQH32C-
N1R0M53
L3 1210 1uH 1A 1210 Digi-Key 490-4055-1-ND
PHONEJACK J20 PJ-102A AC/DC jack Digi-Key CP-102A-ND 1
Program JTAG J19 HDR2X5 10p header CW industries Digi-Key CHW20G-ND 1
QSFP/QSFP+ 38-
pin Connector
J0 QSFP_MODULE_HOST 38p QSFP Edge Connector
1761987-9
Digi-Key A98559CT-ND 1
RD+ J6 SMA_ROSENBERGER Connector RFMW 32K243-40ML5 16
RD+ J14 SMA_ROSENBERGER Connector RFMW 32K243-40ML5
RD+ J2 SMA_ROSENBERGER Connector RFMW 32K243-40ML5
RD+ J10 SMA_ROSENBERGER Connector RFMW 32K243-40ML5
RD- J5 SMA_ROSENBERGER Connector RFMW 32K243-40ML5
RD- J13 SMA_ROSENBERGER Connector RFMW 32K243-40ML5
RD- J9 SMA_ROSENBERGER Connector RFMW 32K243-40ML5
RD- J1 SMA_ROSENBERGER Connector RFMW 32K243-40ML5
TD+ J11 SMA_ROSENBERGER Connector RFMW 32K243-40ML5
TD+ J3 SMA_ROSENBERGER Connector RFMW 32K243-40ML5
TD+ J7 SMA_ROSENBERGER Connector RFMW 32K243-40ML5
TD+ J15 SMA_ROSENBERGER Connector RFMW 32K243-40ML5
TD- J4 SMA_ROSENBERGER Connector RFMW 32K243-40ML5
TD- J12 SMA_ROSENBERGER Connector RFMW 32K243-40ML5
TD- J8 SMA_ROSENBERGER Connector RFMW 32K243-40ML5
TD- J16 SMA_ROSENBERGER Connector RFMW 32K243-40ML5
RESET SW2 SW_PB Switch "Reset" Digi-Key P8006S-ND 1
SW-SPST4X SW1 DIP8 Switch SPST Digi-Key CKN6064-ND 1
VOLTREG U2 SOT-223 LM117 Digi-Key LM317MBSTT3GOSCT-
ND
1
Cage QSFP footprint Cage No heatsink Digi-Key 1888781-1 1
* single board
**Note: This Bill of Materials is subject to change at any time. However, at the time of writing of this document, the BOM is accurate.
9
Dip Switch:
1 = on, 2 = on,
3 = default low/o,
4 = default low/o
Avago Evaluation Kit and QSFP Software User Guide
The Avago QSFP/QSFP+ 4-channel Parallel Optics Trans-
ceivers and Active Optical cables provide the design en-
gineer with features that can provide signicant exibility
in their system design. The module/AOC provides the
user the ability to remotely monitor the health of the link
through a comprehensive set of digital diagnostics. Note,
however, that in order to take advantage of fully calibrat-
ed digital diagnostics, the user must have purchased de-
vices with DMI enabled i.e. “-D” part number
This appendix includes basic user information for the Ava-
go Technologies QSFP/QSFP+ evaluation kit as well as an
instruction guide for the accompanying software graphic
user interface (GUI).
Installing the Avago POD Viewer Software:
Included with the Avago Evaluation Kit is a CD that con-
tains the self-install customer user interface software. This
user interface software is PC and Windows compatible.
Place the CD into the CD/DVD drive of your desktop PC or
laptop. The software should begin to install automatically.
If this does not happen open My Computer and double-
click the CD-ROM drive.
Follow the instructions as prompted by the installer.
Once installed, an icon entitled “Avago’s QSFP Viewer” will
appear on your desktop along with an Avago ReadMe text
le which includes detailed reference information about
the GUI installation and revision.
Before starting the GUI software it is recommended that
you connect and power up the QSFP/QSFP+ Evaluation
Board and I-Port cables.
Connecting the Avago QSFP/QSFP+ Evaluation Board
Included in the Avago Evaluation Kit is an Avago QSFP/
QSFP+ Evaluation PCB. Optionally included is an I-Port
device and associated cables. If you did not order an I-
Port device as part of the evaluation kit, please use a com-
patible I-Port device.
Figure 5. Setting the Device Address
Figure 4. Evaluation Board Connections
The i-Port device typically also comes with its own soft-
ware and can be loaded to the PC. Once complete, con-
nect the i-Port device and Vcc as indicated in the gure
above.
Set the four DIP switches as indicated below:
Avago POD Viewer Software
The evaluation software can be accessed by double click-
ing the desktop icon “Avago’s QSFP Viewer”. Once the soft-
ware starts the Avago template will appear on the screen
while the PC searches the COM ports for an active device.
This may take a few seconds.
Figure 6. Interface Loading Window
USB
3.3V
Power Supply
MTP Fiber
10
Figure 7. QSFP Tab
This tab serves as the front page and shows pictures of the QSFP Evaluation board as well as QSFP Transceivers.
Once the computer nds a valid connected device you may click on the “View QSFP” option in the top left of the window.
Avago QSFP Viewer Software
QSFP Tab
When the software starts it will initially default to the tab titled “QSFP”.
11
Registers Tab
The Registers Tab provides the user the ability to view, read and write to the user accessible registers in the Avago QSFP
device.
Figure 8. Register Tab, Base Page
Registers List Window:
You may need to resize the Registers window and collapse/
expand the branches to see the complete view of the pag-
es available. Note that there are three main branches in
the Register List eld: QSFP Base Page, QSFP Page 0 – SE-
RIAL ID INFORMATION, and QSFP Page 2 – USER AREA.
The left window titled “Register List” provides the address
and name of the register elds.
The register addresses are in decimal format, however,
when you click an address in the “Register List” window,
you will notice the corresponding register address in
Hexadecimal is highlighted in the “Field Display” window.
You may expand the elds in a tree format in the “Register
List” that are in RED letters. This allows the user to view the
eld denitions down to the single bit level. Fields that
cannot be expanded are only dened at the byte level.
The user denable/writable elds can be found by looking
at the “Decoded Data” window. If a check box exists next
to a bit or byte eld, that eld is writable. The writable
bits/bytes correspond to the INF-8436i QSFP Transceiver
Specication Revision 1.0 and SFF-8436 Specication for
QSFP+ Optical Modules
12
Figure 9. Register List and Decoded Data Window
Decoded Data Window:
Directly to the right of the “Register List” window there is a
window titled “Decoded Data”. It is here that you can view
the last read values corresponding to the register in “Reg-
ister List”. It is recommended that when you rst open
the QSFP Module Evaluation Program you press the “Read
ALL” button to see the current state of all elds. Values will
be in Hexadecimal or will be in text describing the state of
a bit eld. Note the hexadecimal value of a byte eld can
also be viewed in “Field Display”
If you expand the “Register list” to reveal the bit elds, you
will see a corresponding tree format in the “Decoded Data”
tab. It is in this expanded “Decoded Data” tab that you can
make changes to the user denable/changeable bits. Only
elds that are highlighted yellow and have a check mark
box next to them are writable/changeable bit elds.
You can change the bit or byte value by changing the val-
ue in the desired eld AND clicking on the check box such
that a check mark appears in the box.
When the Write Checked or Write Current button is
pressed, these values will be written to the device.
Note: There is an alternate way to write to user writable
elds. If you click the “Edit” option instead of the “Field
Display” option at the bottom, you can change bit elds
in the “Field Display” window directly and then click Write
Checked or Write Current button. However, be aware that
un-writable bits will still not be aected.
13
Write Checked, Write Current, Read ALL, Read Page and Read Register
If the read operation fails after repeated tries, close the
Avago QSFP Viewer software, review all board connec-
tions, power cycle the evaluation board, and restart the
Avago QSFP Viewer. If problem persists, please contact
your local Avago eld representative.
Register Reports Tab
One useful feature of the Avago QSFP Viewer software is
the Register Reports Tab. This tab allows the user to select
sections of the register content of a given device, custom-
ize the format, and then save the le to a text le or print
automatically to a networked printer.
This feature can be used for documenting or logging de-
vice conditions, register dumps, verifying performance
during transient operating conditions, and simplifying
reporting necessary during product evaluation and test.
Unless otherwise specied the reports or text les will be
saved in the default folder for Register Reports. This is in
the Reports folder in the Avago Viewer Program folder.
Default location:
C:\Program Files\Avago\QSFP Viewer\Reports\
Figure 10. Register Reports
In order to write new user-dened bit/byte values to the
device (after the user has clicked at least ONE checkmark
box), the user must click the Write Checked or Write Cur-
rent button on the bottom left. The “Write Checked” but-
ton will write all changes that were made in the Decoded
Data bit elds using the check boxes. The “Write Cur-
rent” button will only update the register eld currently
checked.
When the Avago Evaluation Board hardware is correctly
connected and powered the user can read from the de-
vice under test by clicking the “Read All” button in the low-
er left part of the Registers Tab. It is recommended that
when you rst open the QSFP Module Evaluation Program
you press the “Read ALL” button to see the current state of
all elds.
In order to read back the data in the registers you must
hit the “Read All”, “Read Page” or “Read Register” button.
“Read All” will do a read for all QSFP pages - QSFP Base
Page 0 – SERIAL ID INFORMATION Page 1 and USER AREA
Page 2. The “Read Page” button will only update the page
you are currently on. “Read Register” will only read and
update the register eld the user has clicked.
14
TX/RX DMI Tab
In order to take advantage of fully calibrated digital diag-
nostics, the user must have purchased devices with DMI
enabled i.e. “-D” part number
The Avago QSFP 4-channel parallel optic transceiver and
active optical cable have a number of useful real-time di-
agnostic indicators. Using the TX/RX DMI tab, the user can
view all critical operating conditions of the module/AOC-
end at once. This view shows basic device identication
information, real-time operating condition diagnostics,
and control status indicators.
Basic Device ID Information
Part Number, Vendor, Serial Number, and Date Code
Operating Condition Diagnostics
Case Temperature, Vcc33, Transmitter Laser Bias
Current, Transmitter optical power, Received Optical
Power (mW and dBm)
Figure 11. TX/RX DMI tab
Control Status Indicators
Channel by channel TX LOS and TX FAULT indication
Channel by channel RX LOS and Hi/Low Power
Alarm Status
This page also includes access to some basic control reg-
isters so that the user can easily verify operation. By click-
ing the check-boxes under Soft Control Options you can
toggle the status of Rx Disable, RX Squelch Enable, RX LOS
MASK on/o, Tx Disable, Tx Squelch Enable, and TX LOS
Mask ON.
This tab allows for one time reading of these registers by
clicking the READ ONCE button in the lower right. Alter-
natively, you can continuously poll these registers over
time by clicking the START SCAN button in the lower right.
This is a useful feature for over temperature debug and
verication.
15
Appendix:
Schematic:
**Note: This Schematic is subject to change at any time. However, at the time of the writing of this document, the Schematic is accurate.
1 2
3 4
5 6
7 8
9 10
11 12
13 14
U1
74LVC04APW
C9
0.1uF
GND
GND
VCCTx
R11 10K (n.f.)
R1
200R
R2
200R
R5
200R
ModSelL(2)
R3
200R
LPMode(2)
GND
GND
RESET(2)
R9 10K
R8 10K
R7 10K
VCC3.3
R4
200R
VCC3.3
A
1
K
2
LED1
ModSelL
A
1
K
2
LED2
LPMode
A
1
K
2
LED5
ModPrsL OUT
A
1
K
2
LED3
RESET
A
1
K
2
LED4
Interrupt OUT
VCC3.3
1
2
J3
1
2
J4
1
2
J1
1
2
J2
GND
GND
GND
GND
TX1p
TX1n
RX1n
RX1p
L1
LQH32CN1R0M53
1
2
J17
GND
GND
VCCRx
L2
LQH32CN1R0M53
GND
GND
VCC1
L3
LQH32CN1R0M53
GND
R10 10K (n.f.)
R12 10K (n.f.)
R6 10K
1
TP1
ModSelL
1
TP2
Interrupt
1
TP3
RESET
1
TP4
SCL
1
TP5
SDA
1
TP6
ModPrsL
1
TP7
LPMode
1
TP14
GND
GND
Please keep short RF traces for TX and RX data.
SW2
RESET
1
2
J18
GND
1 8
SW1A
2 7
SW1B
3 6
SW1C
SDA
SCL
GND
GND
1
SDA
2
+5V
3
SCL
4
CON6
I2C_CON
TX1n
37
TX1p
36
GND
35
TX3n
34
TX3p
33
GND
32
LPMode
31
Vcc1
30
VccTX
29
IntL
28
ModPrsL
27
GND
26
RX4p
25
RX4n
24
GND
23
RX2p
22
RX2n
21
GND
20
GND
38
J0B
QSFP 38-pin Connector
TX1n
TX1p
TX3n
TX3p
RX4p
RX4n
RX2p
RX2n
GND
1
TX2n
2
TX2p
3
GND
4
TX4n
5
TX4p
6
GND
7
ModSeiL
8
RESETL
9
VccRX
10
SCL
11
SDA
12
GND
13
RX3p
14
RX3n
15
GND
16
RX1p
17
RX1n
18
GND
19
J0A
QSFP 38-pin Connector
TX2n
TX2p
TX4n
TX4p
RX3p
RX3n
RX1p
RX1n
SCL
SDA
1
2
J7
1
2
J8
1
2
J5
1
2
J6
GND
GND
GND
GND
TX2p
TX2n
RX2n
RX2p
1
2
J11
1
2
J12
1
2
J9
1
2
J10
GND
GND
GND
GND
TX3p
TX3n
RX3n
RX3p
1
2
J15
1
2
J16
1
2
J13
1
2
J14
GND
GND
GND
GND
TX4p
TX4n
RX4n
RX4p
GNDGND
VCC3.3 VCC3.3
C2
22uF
C4
22uF
C6
22uF
C5
0.1uF
C3
0.1uF
C1
0.1uF
C7
22uF
C8
0.1uF
GND
1 2
3 4
5 6
7 8
9 10
J19
Program JTAG
VCC3.3
GND
R15
0R
R16 0R
TDI
TDO
TCK
RESET
LPMode
ModSelL
TMS
R13 0R
R14
0R
R17
200R
VCC3.3
Interrupt
ModSelL
LPMode
RESET
ModPrsL OUT
IntL
ModSelL
LPMode
RESET
IntL
ModPrsL OUT
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
VCCTx
VCCRx
VCC1
GND
A
1
K
2
LED6
EB Power Prs
R18
0R(nf)
R19
0R(nf)
GND CH_GND
Vin
3
ADJ
1
Vout
2
4
Tab
U2
VOLTREG
R20
240R
R21
240R
D2
DIODE
D1
DIODE
GND
VCC3.3
GND
C12
1000uF/25V
C13
0.1uF
GND GND
5~15VDC@1A
1
2
3
R22
500R
D4
DIODE
D3
DIODE
D5
DIODE
J20
PHONEJACK
Vin
Adj
GND
R23
698R
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Data subject to change. Copyright © 2005-2014 Avago Technologies. All rights reserved.
AV02-2161EN - August 12, 2014
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