FN8709 Rev 0.00 Page 1 of 13
April 17, 2015
FN8709
Rev 0.00
April 17, 2015
ISL91110IR
High Efficiency Buck-Boost Regulator with 5.4A Switches
DATASHEET
The ISL91110IR is a high-current buck-boost switching regulator
for systems using new battery chemistries. It uses Intersil’s
proprietary buck-boost algorithm to maintain voltage regulation
while providing excellent efficiency and very low output voltage
ripple when the input voltage is close to the output voltage.
The ISL91110IR is capable of delivering at least 2A continuous
output current (VOUT = 3.3V) over a battery voltage range of 2.5V
to 4.35V. This maximizes the energy utilization of advanced
single-cell Li-ion battery chemistries that have significant capacity
left at voltages below the system voltage. Its fully synchronous
low ON-resistance 4-switch architecture and a low quiescent
current of only 35µA optimize efficiency under all load conditions.
The ISL91110IR supports standalone applications with a fixed
3.3V or 3.5V output voltage or adjustable output voltage with an
external resistor divider. Output voltages as low as 1V or as high
as 5.2V are supported.
The ISL91110IR requires only a single inductor and very few
external components. Power supply solution size is minimized by
its 2.5MHz switching frequency, allowing small size external
components.
The ISL91110IR is available in a 4mmx4mm, 20 Ld TQFN
package.
Features
• Accepts input voltages above or below regulated output
voltage
• Automatic and seamless transitions between buck and
boost modes
• Input voltage range: 1.8V to 5.5V
• Output current: up to 2A (PVIN = 3.4V, VOUT = 5V)
• Output current: up to 2A (PVIN = 2.5V, VOUT = 3.3V)
• Burst current: up to 3A (PVIN = 2.9V, VOUT = 3.3V, tON <
600µs, t = 4.6ms)
• High efficiency: up to 95%
• 35µA quiescent current maximizes light load efficiency
• 2.5MHz switching frequency minimizes external component
size
• Fully protected for short-circuit, over-temperature and
undervoltage
• Small 4mmx4mm 20 Ld TQFN package
Applications
• Smartphones and tablet PCs
• Wireless communication devices
• Optical modules networking equipment
Related Literature
UG022, “ISL91110IRx-EVZ Evaluation Boards User Guide”
TABLE 1. KEY DIFFERENCES BETWEEN FAMILY OF PARTS
PART NUMBER ADJ or FIXED VOUT
ISL91110IRNZ-T 3.3
ISL91110IRNZ-T7A 3.3
ISL91110IR2AZ-T 3.5
ISL91110IR2AZ-T7A 3.5
ISL91110IRAZ-T ADJ
ISL91110IRAZ-T7A ADJ
FIGURE 1. TYPICAL APPLICATION: VOUT = 3.3V FIGURE 2. EFFICIENCY: VOUT = 3.3V, TA = +25°C
PVIN
VIN =
1.8V TO 5.5V
VOUT = 3.3V
UP TO 3A
ISL91110IRNZ
VIN
EN
LX1
LX2
VOUT
FB
SGND
PGND
C1
2x10µF
L1
1µH
C2
2x22µF
MODE
70
75
80
85
90
95
100
1 10 100 1000
VIN = 3.6V
VIN = 3V
VIN = 4.2V
VIN = 3.3V
EFFICIENCY (%)
LOAD CURRENT (mA)
ISL91110IR
FN8709 Rev 0.00 Page 2 of 13
April 17, 2015
Block Diagram
OSC
ERROR
AMP
PVIN
CONTROL
VIN
MONITOR
LX1
VREF
REF
REVERSE
CURRENT
VOUT
1
GATE
DRIVERS
AND
ANTI-SHOOT
THRU
10
VIN
THERMAL
SHUTDOWN
CURRENT
DETECT
18
11
EN
15 FB
3PGND
SGND
EN
EN
EN EN
VOUT
CLAMP
VOLTAGE
PROG.
LX2
19
12
COMP
MODE
2
17
Q1
Q2 Q3
Q4
ADJ
OUTPUT
FIXED
OUTPUT
45
8
9
7
6
20
14
13
16 NC
-
+
+
-
+-
FIGURE 3. BLOCK DIAGRAM
ISL91110IR
FN8709 Rev 0.00 Page 3 of 13
April 17, 2015
Pin Configuration
ISL91110IR
(20 LD, 4X4 TQFN)
TOP VIEW
VOUT
VOUT
VOUT
VOUT
NC
PVIN
PVIN
PVIN
PVIN
VIN
LX2
PGND
LX1
LX2
LX1
FB
SGND
MODE
SGND
EN
1
2
3
4
5
678910
15
14
13
12
11
20 19 18 17 16
EPAD
Pin Descriptions
PIN # PIN NAMES DESCRIPTION
6, 7, 8, 9, PVIN Power input; Range: 1.8V to 5.5V. Connect
2x10μF capacitors to PGND.
4, 5 LX1 Inductor connection, input side
3 PGND Power ground for high switching current
1, 2 LX2 Inductor connection, output side
17, 18,
19, 20
VOUT Buck-boost regulator output; Connect
2x22μF capacitors to PGND for VOUT = 3.3V
and 3.5V applications, and 2x47µF
capacitors to PGND for VOUT = 4.5V and 5V
applications.
12 MODE Logic input, HIGH for auto PFM mode. LOW
for forced PWM operation. Also, this pin can
be used with an external clock sync input.
Range: 2.75MHz to 3.25MHz. Do not leave
floating.
10 VIN Supply input; Range: 1.8V to 5.5V.
11 EN Logic input, drive HIGH to enable device. Do
not leave floating.
13, 14 SGND Analog ground pin
15 FB Voltage feedback pin, connect directly to the
VOUT pin for fixed output voltage versions.
16 NC No connect pin
Epad Thermal pad, connect to PGND
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PART
MARKING
OUTPUT VOLTAGE
(V)
TEMP RANGE
(°C)
PACKAGE
Tape and Reel
(RoHS Compliant)
PKG.
DWG. #
ISL91110IRNZ-T 91110N 3.3 -40 to +85 20 Ld 4x4 TQFN L20.4X4C
ISL91110IRNZ-T7A 91110N 3.3 -40 to +85 20 Ld 4x4 TQFN L20.4X4C
ISL91110IR2AZ-T 911102 3.5 -40 to +85 20 Ld 4x4 TQFN L20.4X4C
ISL91110IR2AZ-T7A 911102 3.5 -40 to +85 20 Ld 4x4 TQFN L20.4X4C
ISL91110IRAZ-T 91110A ADJ -40 to +85 20 Ld 4x4 TQFN L20.4X4C
ISL91110IRAZ-T7A 91110A ADJ -40 to +85 20 Ld 4x4 TQFN L20.4X4C
ISL91110IRN-EVZ Evaluation Board for ISL91110IRNZ
ISL91110IR2A-EVZ Evaluation Board for ISL91110IR2AZ
ISL91110IRA-EVZ Evaluation Board for ISL91110IRAZ
NOTES:
1. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials and 100% matte tin
plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see product information page for ISL91110IR. For more information on MSL please see techbrief TB363.
ISL91110IR
FN8709 Rev 0.00 Page 4 of 13
April 17, 2015
Absolute Maximum Ratings Thermal Information
PVIN, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.5V
LX1, LX2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.5V
FB (Adjustable Version) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 2.7V
FB (Fixed VOUT Versions) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.5V
SGND, PGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 0.3V
All Other Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.5V
ESD Rating
Human Body Model (Tested per JESD22-A114E) . . . . . . . . . . . . . . . . 3kV
Machine Model (Tested per JESD22-A115-A) . . . . . . . . . . . . . . . . . 200V
Charge Device Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2kV
Latch-up (Tested per JESD-78B; Class 2, Level A) . . . . . . . . . . . . . . 100mA
Thermal Resistance (Typical) JA (°C/W) JC (°C/W)
20 Ld 4x4 TQFN Package (Notes 4, 5). . . . 39 4
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . .+125°C
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493
Recommended Operating Conditions
Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
Supply Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.8V to 5.5V
Max Load Current (VIN = 3.4V, VOUT = 5V). . . . . . . . . . . . . . . . . . . . . . . 2ADC
Max Load Current (VIN = 2.5V, VOUT = 3.3V) . . . . . . . . . . . . . . . . . . . . . 2ADC
Max Load Current (VIN = 2.9V, VOUT = 3.3V, tON = 600µs, t = 4.6ms) . . . . . 3A
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief TB379
5. For JC, the “case temp” location is the center of the exposed metal pad on the package underside.
Analog Specifications VIN = VPVIN = VEN = 3.6V, VOUT = 3.3V, L1 = 1µH, C1 = 2x10µF, C2 = 2x22µF, TA = +25°C. Boldface limits apply
across the operating temperature range, -40°C to +85°C and input voltage range (1.8V to 5.5V) unless specified otherwise.
SYMBOL PARAMETER TEST CONDITIONS
MIN
(Note 6)
TYP
(Note 7)
MAX
(Note 6)UNITS
POWER SUPPLY
VIN Input Voltage Range 1.8 5.5 V
VUVLO VIN Undervoltage Lockout Threshold Rising 1.725 1.775 V
Falling 1.550 1.650 V
IVIN VIN Supply Current PFM mode, no external load on VOUT (Note 8)3560 µA
ISD VIN Supply Current, Shutdown EN = SGND, VIN = 3.6V 0.05 1.0 µA
OUTPUT VOLTAGE REGULATION
VOUT Output Voltage Range ISL91110IRAZ, IOUT = 100mA, VIN = 3.6V 1.00 5.20 V
Output Voltage Accuracy VIN = 3.7V, VOUT = 3.3V, IOUT = 0mA, PWM mode -2 +2 %
VIN = 3.7V, VOUT = 3.3V, IOUT = 1mA, PFM mode -3 +4 %
VFB FB Pin Voltage Regulation For adjustable output version, VIN = 3.6V 0.783 0.80 0.813 V
IFB FB Pin Bias Current For adjustable output version 20 nA
VOUT/
VIN
Line Regulation, PWM Mode IOUT = 500mA, VOUT = 3.3V, VIN step from 2.3V to
5.5V
±5 mV/V
VOUT/
IOUT
Load Regulation, PWM Mode VIN = 3.7V, VOUT = 3.3V, IOUT step from 0mA to
1000mA
±0.005 mV/mA
VOUT/
VI
Line Regulation, PFM Mode IOUT = 100mA, VOUT = 3.3V, VIN step from 2.3V to
5.5V
±12.5 mV/V
VOUT/
IOUT
Load Regulation, PFM Mode VIN = 3.7V, VOUT = 3.3V, IOUT step from 0mA to
100mA
±0.4 mV/mA
VCLAMP Output Voltage Clamp Rising 5.25 5.95 V
Output Voltage Clamp Hysteresis 400 mV
DC/DC SWITCHING SPECIFICATIONS
fSW Oscillator Frequency 2.1 2.50 2.9 MHz
tONMIN Minimum On Time 80 ns
IPFETLEAK LX1 Pin Leakage Current VIN = 3.6V -1 1 µA
INFETLEAK LX2 Pin Leakage Current VIN = 3.6V -1 1 µA
ISL91110IR
FN8709 Rev 0.00 Page 5 of 13
April 17, 2015
SOFT-START AND SOFT DISCHARGE
tSS Soft-start Time Time from when EN signal asserts to when output
voltage ramp starts.
1ms
Time from when output voltage ramp starts to
when output voltage reaches 95% of its nominal
value with device operating in buck mode.
VIN = 4V, VOUT = 3.3V, IO = 200mA
1ms
Time from when output voltage ramp starts to
when output voltage reaches 95% of its nominal
value with device operating in boost mode.
VIN = 2V, VOUT = 3.3V, IO = 200mA
2ms
RDISCHG VOUT Soft-discharge ON-resistance EN < VIL 120 Ω
POWER MOSFET
RDSON_P P-channel MOSFET ON-resistance VIN = 3.6V, IO = 200mA 47 mΩ
VIN = 2.5V, IO = 200mA 62 mΩ
RDSON_N N-channel MOSFET ON-resistance VIN = 3.6V, IO = 200mA 40 mΩ
VIN = 2.5V, IO = 200mA 55 mΩ
IPK_LMT P-channel MOSFET Peak Current Limit 4.9 5.4 5.9 A
PFM/PWM TRANSITION
Load Current Threshold, PFM to PWM VIN = 3.6V, VOUT = 3.3V 200 mA
Load Current Threshold, PWM to PFM VIN = 3.6V, VOUT = 3.3V 75 mA
Thermal Shutdown 155 °C
Thermal Shutdown Hysteresis 30 °C
LOGIC INPUTS
ILEAK Input Leakage VIN = 3.6V 0.05 1µA
VIH Input HIGH Voltage VIN = 3.6V 1.4 V
VIL Input LOW Voltage VIN = 3.6V 0.4 V
NOTES:
6. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
7. Typical values are for TA = +25°C and VIN = 3.6V.
8. Quiescent current measurements are taken when the output is not switching.
Analog Specifications VIN = VPVIN = VEN = 3.6V, VOUT = 3.3V, L1 = 1µH, C1 = 2x10µF, C2 = 2x22µF, TA = +25°C. Boldface limits apply
across the operating temperature range, -40°C to +85°C and input voltage range (1.8V to 5.5V) unless specified otherwise. (Continued)
SYMBOL PARAMETER TEST CONDITIONS
MIN
(Note 6)
TYP
(Note 7)
MAX
(Note 6)UNITS
ISL91110IR
FN8709 Rev 0.00 Page 6 of 13
April 17, 2015
Typical Performance Curves Unless otherwise noted, operating conditions are: TA = +25°C, VIN = EN = 3.6V, L = 1µH,
C1 = 2x10µF, C2 = 2x22µF, VOUT = 3.3V, IOUT = 0A to 3A.
FIGURE 4. EFFICIENCY vs INPUT VOLTAGE (VOUT = 5V) FIGURE 5. OUTPUT VOLTAGE vs LOAD CURRENT (VOUT = 5V)
FIGURE 6. EFFICIENCY: VOUT = 5V, TA = +25°C FIGURE 7. OUTPUT VOLTAGE vs LOAD CURRENT (VOUT = 3.3V)
FIGURE 8. EFFICIENCY vs INPUT VOLTAGE (VOUT = 3.3V) FIGURE 9. QUIESCENT CURRENT vs INPUT VOLTAGE (MODE = HIGH)
80
82
84
86
88
90
92
94
96
98
100
2.5 3.0 3.5 4.0 4.5 5.0
EFFICIENCY (%)
VIN (V)
LOAD = 500mA
LOAD = 100mA
LOAD = 1000mA
5.040
5.060
5.080
5.100
5.120
5.140
1 10 100 1000
VOUT (V)
LOAD CURRENT (mA)
VIN = 3.6V
VIN = 4.2VVIN = 4.2V
VIN = 3V
VIN = 3.3V
70
75
80
85
90
95
100
1 10 100 1000
EFFICIENCY (%)
LOAD CURRENT (mA)
VIN = 3.6V
VIN = 4.2V
VIN = 3.3V
VIN = 3V
3.240
3.260
3.280
3.300
3.320
3.340
1 10 100 1000
LOAD CURRENT (mA)
VOUT (V)
VIN = 4.2V
VIN = 3V
VIN = 3.3V
VIN = 3.6V
80
82
84
86
88
90
92
94
96
98
100
2.02.53.03.54.04.55.0
VIN (V)
EFFICIENCY (%)
LOAD = 100mA
LOAD = 1000mA
LOAD = 500mA
30
40
50
60
70
80
90
100
110
120
130
1.52.53.54.55.5
QUIESCENT CURRENT (µA)
VIN (V)
VOUT = 5V
VOUT = 3.3V
ISL91110IR
FN8709 Rev 0.00 Page 7 of 13
April 17, 2015
FIGURE 10. STEADY STATE OPERATION IN PFM (VIN = 4V,
VOUT =3.3V, NO LOAD)
FIGURE 11. STEADY STATE OPERATION IN PWM (VIN = 4V,
VOUT =3.3V, NO LOAD)
FIGURE 12. SOFT-START (VIN = 3.6V, VOUT = 3.3V, NO LOAD) FIGURE 13. SOFT-START (VIN = 3.6V, VOUT = 3.3V, 1A RLOAD)
FIGURE 14. STEADY STATE OPERATION (VIN = 2.5V, VOUT = 3.3V,
2A LOAD)
FIGURE 15. 0A TO 2A LOAD TRANSIENT (VIN = 3.6V, VOUT = 3.3V)
Typical Performance Curves Unless otherwise noted, operating conditions are: TA = +25°C, VIN = EN = 3.6V, L = 1µH,
C1 = 2x10µF, C2 = 2x22µF, VOUT = 3.3V, IOUT = 0A to 3A. (Continued)
LX1 (2V/DIV)
LX2 (2V/DIV)
VOUT (AC, 20mV/DIV)
IL (500mA/DIV)
400ns/DIV
LX1 (2V/DIV)
IL (200mA/DIV)
VOUT (AC, 10mV/DIV)
LX2 (2V/DIV)
400ns/DIV
EN (2V/DIV)
VOUT (1V/DIV)
IL (500mA/DIV)
400µs/DIV
400µs/DIV
IL (500mA/DIV)
VOUT (1V/DIV)
EN (2V/DIV)
400ns/DIV
VOUT (AC, 50mV/DIV)
LX2 (2V/DIV)
LX1 (2V/DIV)
IL (1A/DIV)
200µs/DIV
VOUT (AC, 200mV/DIV)
ILOAD (1A/DIV)
ISL91110IR
FN8709 Rev 0.00 Page 8 of 13
April 17, 2015
FIGURE 16. 0.5A TO 1.5A LOAD TRANSIENT (VIN = 3.6V, VOUT = 3.3V) FIGURE 17. 0A TO 1A LOAD TRANSIENT (VIN = 3.6V, VOUT = 3.3V)
FIGURE 18. 4V TO 3.2V LINE TRANSIENT (VOUT = 3.3V, LOAD = 1A)
FIGURE 19. 0.1A TO 2A LOAD TRANSIENT (VIN = 3.6V, VOUT = 5V)
FIGURE 20. 0.5A TO 2A LOAD TRANSIENT (VIN = 3.6V, VOUT = 5V)
Typical Performance Curves Unless otherwise noted, operating conditions are: TA = +25°C, VIN = EN = 3.6V, L = 1µH,
C1 = 2x10µF, C2 = 2x22µF, VOUT = 3.3V, IOUT = 0A to 3A. (Continued)
ILOAD (500mA/DIV)
VOUT (AC, 200mV/DIV)
200µs/DIV
100µs/DIV
ILOAD (500mA/DIV)
VOUT (AC, 100mV/DIV)
VIN (1V/DIV)
VOUT (AC, 200mV/DIV)
20µs/DIV
200µs/DIV
ILOAD (1A/DIV)
VOUT (AC, 500mV/DIV)
200µs/DIV
ILOAD (1A/DIV)
VOUT (AC, 500mV/DIV)
ISL91110IR
FN8709 Rev 0.00 Page 9 of 13
April 17, 2015
Functional Description
Functional Overview
Refer to the “Block Diagram” on page 2. The ISL91110IR
implements a complete buck boost switching regulator, with
PWM controller, internal switches, references, protection circuitry
and control inputs.
The PWM controller automatically switches between buck and
boost modes as necessary to maintain a steady output voltage
with changing input voltages and dynamic external loads.
Internal Supply and References
Referring to the “Block Diagram” on page 2, the ISL91110IR
provides four power input pins. The PVIN pin supplies input power
to the DC/DC converter, while the VIN pin provides operating
voltage source required for stable VREF generation. Separate
ground pins (SGND and PGND) are provided to avoid problems
caused by ground shift due to the high switching currents.
Enable Input
The device is enabled by asserting the EN pin HIGH. Driving EN
LOW invokes a power-down mode, where most internal device
functions are disabled.
Soft Discharge
When the device is disabled by driving EN LOW, an internal resistor
between VOUT and SGND is activated to slowly discharge the
output capacitor. This internal resistor has a typical 120Ω
resistance.
POR Sequence and Soft-start
Asserting the EN pin HIGH allows the device to power-up. A
number of events occur during the start-up sequence. The
internal voltage reference powers up and stabilizes. The device
then starts to operate. There is a typical 1ms delay between
assertion of the EN pin and the start of switching regulator
soft-start ramp.
The soft-start feature minimizes output voltage overshoot and
input in-rush currents. During soft-start, the reference voltage is
ramped to provide a ramping VOUT voltage. While the output
voltage is lower than approximately 20% of the target output
voltage, switching frequency is reduced to a fraction of the
normal switching frequency to aid in producing low duty cycles
necessary to avoid input in-rush current spikes. Once the output
voltage exceeds 20% of the target voltage, switching frequency is
increased to its nominal value.
When the target output voltage is higher than the input voltage,
there will be a transition from buck mode to boost mode during
the soft-start sequence. At the time of this transition, the ramp
rate of the reference voltage is decreased, such that the output
voltage slew rate is decreased. This provides a slower output
voltage slew rate.
The VOUT ramp time is not constant for all operating conditions.
Soft-start into boost mode will take longer than soft-start into
buck mode. The total soft-start time into buck operating mode is
typically 2ms, whereas the typical soft-start time into boost
mode operating mode is typically 3ms. Increasing the load
current will increase these typical soft-start times.
Short Circuit Protection
The ISL91110IR provides short-circuit protection by monitoring the
feedback voltage. When feedback voltage is sensed to be lower
than a certain threshold, the PWM oscillator frequency is reduced in
order to protect the device from damage. The P-channel MOSFET
peak current limit remains active during this state.
Thermal Shutdown
A built-in thermal protection feature protects the ISL91110IR, if the
die temperature reaches +155°C (typical). At this die temperature,
the regulator is completely shut down. The die temperature
continues to be monitored in this thermal shutdown mode. When
the die temperature falls to +125°C (typical), the device will resume
normal operation. When exiting thermal shutdown, the
ISL91110IR will execute its soft-start sequence.
Buck-Boost Conversion Topology
The ISL91110IR operates in either buck or boost mode. When
operating in conditions where PVIN is close to VOUT, ISL91110IR
alternates between buck and boost mode as necessary to
provide a regulated output voltage.
Figure 21 shows a simplified diagram of the internal switches
and external inductor.
PWM Operation
In buck PWM mode, Switch D is continuously closed and
Switch C is continuously open. Switches A and B operate as a
synchronous buck converter when in this mode.
In boost PWM mode, Switch A remains closed and Switch B
remains open. Switches C and D operate as a synchronous boost
converter when in this mode.
PFM Operation
During PFM operation in buck mode, Switch D is continuously
closed and Switch C is continuously open. Switches A and B
operate in discontinuous mode during PFM operation. During
PFM operation in boost mode, the ISL91110IR closes Switch A
and Switch C to ramp up the current in the inductor. When the
inductor current reaches a certain threshold, the device turns off
Switches A and C, then turns on Switches B and D. With Switches
B and D closed, output voltage increases as the inductor current
ramps down.
FIGURE 21. BUCK BOOST TOPOLOGY
PVIN VOUT
SWITCH A SWITCH D
SWITCH B SWITCH C
LX1 LX2
L1
ISL91110IR
FN8709 Rev 0.00 Page 10 of 13
April 17, 2015
In most operating conditions, there will be multiple PFM pulses
to charge up the output capacitor. These pulses continue until
VOUT has achieved the upper threshold of the PFM hysteretic
controller. Switching then stops and remains stopped until VOUT
decays to the lower threshold of the hysteretic PFM controller.
Operation With VIN Close to VOUT
When the output voltage is close to the input voltage, the
ISL91110IR will rapidly and smoothly switch from boost to buck
mode as needed to maintain the regulated output voltage. This
behavior provides excellent efficiency and very low output
voltage ripple.
Output Voltage Programming
The ISL91110IR is available in fixed and adjustable output
voltage versions. To use the fixed output version, the VOUT pin
must be connected directly to FB.
In the adjustable output voltage version (ISL91110IRAZ), an
external resistor divider is required to program the output
voltage. The FB pin has very low input leakage current, so it is
possible to use large value resistors (e.g., R1 = 187kΩ and
R2=60.4kΩ for VOUT = 3.3V) in the resistor divider connected to
the FB input.
Applications Information
Component Selection
The fixed-output version of ISL91110IR requires only three
external power components to implement the buck boost
converter: an inductor, an input capacitor and an output
capacitor.
The adjustable output version of ISL91110IR requires three
additional components to program the output voltage, as shown
in Figure 22. Two external resistors program the output voltage
and a small capacitor is added to improve stability and response.
Output Voltage Programming, Adjustable
Version
When VREF is connected to SGND, setting and controlling the
output voltage of the ISL91110IRAZ (adjustable output version)
can be accomplished by selecting the external resistor values.
Equation 1 can be used to derive the R1 and R2 resistor values:
When designing a PCB, include a SGND guard band around the
feedback resistor network to reduce noise and improve accuracy
and stability. Resistors R1 and R2 should be positioned close to
the FB pin.
Feed-Forward Capacitor Selection
A small capacitor (C3 in Figure 22) in parallel with resistor R1 is
required to provide the specified load and line regulation. The
suggested value of this capacitor is 22pF for R1 = 187kΩ. An
NPO type capacitor is recommended.
FIGURE 22. ADJUSTABLE OUTPUT APPLICATION
PVIN
VIN =
1.8V TO 5.5V
VOUT = 1V TO 5.2V
UP TO 3A
ISL91110IRAZ
VIN
EN
LX1
LX2
VOUT
FB
SGND
PGND
C1
2x10µF
L1
1µH
C2
2x22µF
MODE
R1
R2
C3
VOUT 0.8V 1
R1
R2
-------
+
=(EQ. 1)
ISL91110IR
FN8709 Rev 0.00 Page 11 of 13
April 17, 2015
Inductor Selection
An inductor with high frequency core material (e.g., ferrite core)
should be used to minimize core losses and provide good
efficiency. The inductor must be able to handle the peak
switching currents without saturating.
A 1µH inductor with ≥5.4A saturation current rating is
recommended. Select an inductor with low DCR to provide good
efficiency. In applications where radiated noise must be
minimized, a toroidal or shielded inductor can be used.
PVIN and VOUT Capacitor Selection
The input and output capacitors should be ceramic X5R type with
low ESL and ESR. The recommended input capacitor value is
2x10µF. The recommended input capacitor must meet the
following requirements: Minimum type is X5R, minimum voltage
rating is 16V and minimum case size is 0603. The recommended
output capacitor value is 2x22µF for 3.3V and 3.5V VOUT
applications and 2x47µF for 4.5V and 5V VOUT applications. The
recommended output capacitor must meet the following
requirements: For 22µF, the minimum type is X5R, minimum
voltage rating is 10V, and minimum case size is 0603. For 47µF,
the minimum type is X5R, minimum voltage rating is 6.3V, and
minimum case size is 0603.
Recommended PCB Layout
Correct PCB layout is critical for proper operation of the
ISL91110IR. The following are some general guidelines for the
recommended layout:
1. The input and output capacitors should be positioned as close
to the IC as possible.
2. The ground connections of the input and output capacitors
should be kept as short as possible. The objective is to
minimize the current loop between the ground pads of the
input and output capacitors and the PGND pins of the IC. Use
vias, if required, to take advantage of a PCB ground layer
underneath the regulator.
3. The analog ground pin (SGND) should be connected to a
large/low-noise ground plane on the top or an intermediate
layer on the PCB, away from the switching current path of
PGND. This ensures a low noise signal ground reference.
4. Minimize the trace lengths on the feedback loop to avoid
switching noise pick-up. Vias should be avoided on the
feedback loop to minimize the effect of board parasitic,
particularly during load transients.
The LX1 and LX2 traces should be short and must be routed on
the same layer as the IC.
TABLE 2. INDUCTOR VENDOR INFORMATION
MANUFACTURER MFR. PART NUMBER DESCRIPTION DIMENSION (mm) WEBSITE
Coilcraft XFL4020-102ME 1µH, 20%, DCR = 10.8mΩtypIsat = 5.4A (typ) 4x4x2.1 www.coilcraft.com
Wurth Elektronik 7847730 1µH, 20%, DCR = 14mΩtypIsat = 5.72A (typ) 4x4.5x3.2 www.we-online.com
TABLE 3. CAPACITOR VENDOR INFORMATION
MANUFACTURER SERIES WEBSITE
AVX X5R www.avx.com
Murata X5R www.murata.com
Taiyo Yuden X5R www.t-yuden.com
TDK X5R www.tdk.com
FIGURE 23. RECOMMENDED LAYOUT
FN8709 Rev 0.00 Page 12 of 13
April 17, 2015
ISL91110IR
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such
modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are
current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its
subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
For additional products, see www.intersil.com/en/products.html
© Copyright Intersil Americas LLC 2015. All Rights Reserved.
All trademarks and registered trademarks are the property of their respective owners.
About Intersil
Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products
address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets.
For the most updated datasheet, application notes, related documentation and related parts, please see the respective product
information page found at www.intersil.com.
You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask.
Reliability reports are also available from our website at www.intersil.com/support
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you
have the latest revision.
DATE REVISION CHANGE
April 17, 2015 FN8709.0 Initial Release
ISL91110IR
FN8709 Rev 0.00 Page 13 of 13
April 17, 2015
Package Outline Drawing
L20.4x4C
20 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
Rev 0, 11/06
located within the zone indicated. The pin #1 indentifier may be
Unless otherwise specified, tolerance : Decimal ± 0.05
Tiebar shown (if present) is a non-functional feature.
The configuration of the pin #1 identifier is optional, but must be
between 0.15mm and 0.30mm from the terminal tip.
Dimension b applies to the metallized terminal and is measured
Dimensions in ( ) for Reference Only.
Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
6.
either a mold or mark feature.
3.
5.
4.
2.
Dimensions are in millimeters.1.
NOTES:
BOTTOM VIEW
DETAIL "X"
TYPICAL RECOMMENDED LAND PATTERN
TOP VIEW
BOTTOM VIEW
SIDE VIEW
4.00 A
4.00
B
6
PIN 1
INDEX AREA
(4X) 0.15
4X
0.50
2.0
16X
2016
15
11
PIN #1 INDEX AREA
6
2 .70 ± 0 . 15
5
1
20X 0.25 +0.05 / -0.07
0.10 MABC
20X 0.4 ± 0.10
4
6
10
BASE PLANE
SEATING PLANE
0.10
SEE DETAIL "X"
0.08 C
C
C
0 . 90 ± 0 . 1
0 . 2 REF
C
0 . 05 MAX.
0 . 00 MIN.
5
( 3. 8 TYP )
( 2. 70 )
( 20X 0 . 6)
( 20X 0 . 5 )
( 20X 0 . 25 )
/
