Texas Instruments Board and System Design Considerations for the TMS320VC5503/06/07/09A DSPs Application notes

Brand: Texas Instruments

Model: Board and System Design Considerations for the TMS320VC5503/06/07/09A DSPs

Type: Application notes

Texas Instruments Board and System Design Considerations for the TMS320VC5503/06/07/09A DSPs provides valuable insights into optimizing board and system designs for these low-power digital signal processors. By leveraging the power-saving features of these DSPs, engineers can minimize power consumption, reduce heat dissipation, and optimize system performance. The document provides specific guidelines for terminating unused pins, configuring peripherals, and utilizing idle and power-down modes.

1 Introduction

Application Report

SPRAB14 – November 2008

Board and System Design Considerations for the

TMS320VC5503/5506/5507/5509A DSPs

Naser Salameh ................................................................................................................................

ABSTRACT

An effective system-level board design requires termination of specific pins and taking

advantage of idle and power-down modes on these low power

VC5503/5506/5507/5509A digital signal processors (DSPs). This can be achieved by

controlling unused pins and dynamically turning off all peripherals and internal

functional units when not in use. The benefit is that the DSP and application consume

only as much power as needed, which also helps reduce heat, component density, and

the cost of the product. This document also provides pointers to valuable information

about how to terminate some of the VC5503/5506/5507/5509A peripherals’ and core

DSPs unused pins.

Contents

1 Introduction .......................................................................................... 1

2 RTC ................................................................................................... 2

3 USB ................................................................................................... 2

4 Proper Termination of Unused Device Pins ..................................................... 2

5 Considerations of Pull-up Resistors .............................................................. 3

6 Special Considerations for JTAG Pins ........................................................... 3

7 HPI Pins Consideration ............................................................................ 3

8 Summary ........................................................................................... 12

9 References ......................................................................................... 12

List of Tables

1 Suggested Guidelines for Terminating Emulation and Unused Pins on the

VC5503/5506/5507/5509A DSPs ................................................................. 4

If an input is left floating every time the floating pin logic state toggles, additional input/output (I/O) current

consumption will be the result. Controlling unused and floating pins can save power and maintain optimum

functionality of the DSP and system level design. Idling or correctly configuring unused DSP peripherals,

such as the real-time clock (RTC), analog-to-digital converter (ADC), multichannel buffered serial port

(McBSP), host port interface (HPI), external memory interface (EMIF), IEEE Standard 1149.1-1990, IEEE

Standard Test Access Port and Boundary-Scan Architecture (JTAG), MultiMedia Card/secure Data

(MMC/SD), and universal serial bus (USB) pins, can save developer power for critical power-sensitive

applications.

Even if the RTC or USB module is not used, both modules must be powered up. For the RTC and USB

modules, the RDV

, RCV

, and USBV

pins must be connected to their corresponding power supplies

C55x is a trademark of Texas Instruments.

All other trademarks are the property of their respective owners.

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2 RTC

3 USB

4 Proper Termination of Unused Device Pins

RTC

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and ground pins. Note that TMS320VC5503 does not have the USB module. For more information

regarding the required connections, see the TMS320VC5503 Fixed-Point Digital Signal Processor Data

Manual (SPRS245 ), TMS320VC5506 Fixed-Point Digital Signal Processor Data Manual (SPRS375 ),

TMS320VC5507 Fixed-Point Digital Signal Processor Data Manual (SPRS244 ), and the TMS320VC5509A

Fixed-Point Digital Signal Processor Data Manual (SPRS205 ).

The RTC power supply must be powered even if the RTC peripheral is not being used. The RTC module

does not have a power-down mode, nor does idling of other peripherals/modules on

VC5503/5506/5507/5509A affect the RTC.

The RTC is the only module that is completely isolated from the rest of the DSP. This module can be

powered without any of the VC5503/5506/5507/5509A chip being powered. However, to keep the RTC

power dissipation to a minimum while the RTC module is not being used, the RTC module should be

powered up.

If the USB module is not used on the VC5506/5507/5509A DSP, you must still connect its supply and

ground pins to the supply and ground specified in the data sheet. You could also leave those pin

unconnected if you make sure that the DP and DN pins are not subject to major noise.

As a general guideline, however, if you do not plan to use the USB:

• DP should be pulled high

• DN should be pulled low

• PU can be left floating

Finally, for power down and power consumption purposes, it is recommended that you pull the USB pin,

PU, high with a 10 K Ω resistor. This ensures that the DP pin does not get toggled due to noise and wake

up the on-chip oscillator from the idle mode.

In most systems, the main consideration for proper termination of unused device pins is to ensure that

inputs are not left floating, to minimize device power dissipation; floating inputs can cause excessive

power dissipation. This section discusses the proper termination of unused device pins.

A secondary consideration for proper termination of unused device pins is the logical connection of pins

for various interfaces on the device when the interfaces are, or are not, being used.

As can be seen from the pin type designations in the device-specific documentation, device pins are

classified in a variety of categories, such as I/O, O/Z, I/O/Z, etc. However, from the standpoint of proper

termination of unused device pins, there are only three key device pin category types into which all of the

other pin type categories can be classified.

The following paragraphs describe the three main pin type categories and the rules for terminating each of

them.

• Inputs (pins that cannot become outputs). This type of pins include the designations I and I/Z. If the

particular interface in question is totally unused and the pin has bus keepers, use the bus keepers to

pull the pin up. If the pin has no bus keepers and the particular interface in question is totally unused,

ground the pin. If implemented, use the bus keepers If the pin must be tied high, or a pull-up resistor.

• Outputs (pins that are never inputs). This type of pins include the designations O and O/Z. Leave

unconnected.

• I/O (pins that can be inputs or outputs). This type of pins include the designations I/O and I/O/Z. If

possible, configure them as an output and leave unconnected. Otherwise, if the pin has bus keepers,

use the bus keepers to pull the pin up. If the pin has no bus keepers, use a pull-up resistor.

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5 Considerations of Pull-up Resistors

6 Special Considerations for JTAG Pins

7 HPI Pins Consideration

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Considerations of Pull-up Resistors

Device inputs should not be connected directly to a power supply. Any unused inputs that must be tied

high should be connected to the appropriate power supply using a pull-up resistor. A pull-up resistor of 10

K Ω can be used for a single input; however, it is possible to use a single resistor to pull up several inputs

with two considerations:

• None of the inputs can ever be allowed to be driven low by any means. Accordingly, common pull-up

resistors should not be used on I/O or I/O/Z pins.

• The value of the resistor must be reduced inversely proportionate to the number of inputs being pulled

high so that, according to ohms law, you still ultimately have a strong enough pull-up to pull high all of

the inputs. The concern here is that the inputs draw a leakage current that will tend to reduce the

voltage as more inputs are pulled up; therefore, a smaller resistor is required as more inputs are pulled

up by a single resistor.

If the EMU pins are not pulled high, the device can come up in test mode and may not function as desired.

First, check to see if the device has internal pull-ups on EMU0/1 and a pull-down on TRST; this pin is also

critical.

If the device does not have internal pullups, serious problems can result without external pullups/downs.

Devices can go into test modes and unpredictable behavior can result.

Next, check to see if the device is used in a noisy system environment, e.g., motors. If the device is used

in a noisy environment, even the internal pullups/downs may not be enough and you need strong external

pullups/downs.

For the VC5503/5506/5507/5509A devices that also have internal pullups/downs, it is recommend that you

always put strong external pullups on EMU0 and EMU1 and also a strong pulldown on TRST. In some

extreme situations, it has been found that adding a small capacitor across EMU0/1 significantly improved

noise immunity.

It is also a good idea to make sure that TCK/TMS and TDI are pulled up, just for extra safety.

In the past 99.9% of cases where issues have arisen with erratic or unreliable board behavior, this was

due to EMU0/1 and TRST not being properly connected.

It is usually okay to leave pins with internal pullups/downs unconnected if the pin on the package is not

connected to anything. However, pins that run out on a trace on the board should probably have external

pullups/downs because the trace can act like an antenna in electrically noisy conditions and the internal

pulls are usually quite weak. For the JTAG pins, it’s probably fine not to include any external pulldown if

these signals are not connected on the board. If the JTAG signals run across the board to a connector

that is normally left unconnected, there is the risk of that conducting noise into the DSP. It is usually not a

good idea to tie input buffers directly to power or ground; connecting through a pullup/down is

recommended.

If the parallel bus cannot be configured in EMIF mode and the device is configured in HPI mode but the

HPI bus is not used, then for power consumption reasons you can tie this and all HPI pins to ground.

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HPI Pins Consideration

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Table 1. Suggested Guidelines for Terminating Emulation and Unused Pins on the

VC5503/5506/5507/5509A DSPs

Terminal Multiplexed How to Control Reset

Name Signal Name I/O/Z

(1)

Function if Pins are Not Used Reason BK

(2)

Condition

Parallel Bus

A[13:0] I/O/Z Parallel address bus BK GPIO0 = 1: Output,

A13-A0 of the C55x™ EMIF.A[13:0]

DSP core bonded to GPIO0 = 0: Input,

external pins. HPI.HA[13:0]

HPI.HA[13:0] I HPI address bus. Use the on-chip bus To minimize

HPI.HA[13:0] keepers. Or if HPI is not power

used, the parallel bus can consumption

be configured for EMIF

mode or pins can be tied to

ground.

EMIF.A[13:0] O/Z EMIF address bus. Output pins. Leave None BK GPIO0 = 1: Output,

EMIF.A[13:0] unconnected EMIF.A[13:0]

GPIO0 = 0: Input,

GPIO.A[13:0] I/O/Z General-purpose I/O Unused GPIOs can be left To minimize

HPI.HA[13:0]

address bus. floating if configured as power

GPIO.A[13:0] outputs or can be pulled consumption

high with 10 K Ω resistors.

A'[0] EMIF.A'[0] O/Z EMIF address bus Output pin. Leave None Output

(BGA A'[0]. unconnected

only)

A[15:14] I/O/Z A subset of the BK GPIO0 = 1: Output,

(BGA parallel address bus EMIF.A[15:14]

only) A15-A14 of the C55x GPIO0 = 0: Input,

DSP core bonded to GPIO.A[15:14]

external pins.

EMIF.A[15:14] O/Z EMIF address bus. Output pins. Leave None

EMIF.A[15:14] unconnected

GPIO.A[15:14] I/O/Z General-purpose I/O Unused GPIOs can be left To minimize

addresses bus. floating if configured as power

GPIO.A[15:14] outputs or can be pulled consumption.

high with 10 K Ω resistors.

A[20:16] EMIF.A[20:16] O/Z EMIF address bus Output pins. Leave None Output

(BGA only) unconnected

D[15:0] I/O/Z A subset of the BK GPIO0 = 1: Input,

parallel bidirectional EMIF.D[15:0]

data bus D31-D0 of GPIO0 = 0: Input,

the C55x DSP core HPI.HD[15:0]

EMIF.D[15:0] I/O/Z EMIF data bus. Use the on-chip Bus To minimize

EMIF.D[15:0] Keepers power

consumption

HPI.HD[15:0] I/O/Z HPI data bus. Use the on-chip bus To minimize

HPI.HD[15:0] keepers. Or if HPI is not power

used, pins can tied to consumption

ground or the parallel bus

can be configured for EMIF

mode.

C0 I/O/Z EMIF asynchronous BK GPIO0 = 1: Output,

memory read enable EMIF. ARE

or general-purpose GPIO0 = 0: Input,

IO8 GPIO8

EMIF. ARE O/Z Active-low EMIF Output pin. Leave None

asynchronous unconnected

memory read enable

GPIO8 I/O/Z General-purpose IO8. Configure pin as an output. To minimize

GPIO8 Then it can be left power

unconnected or can be consumption

pulled high with 10 K Ω

resistor.

(1)

I = Input, O = Output, S = Supply, Hi–Z = High-impedance

(2)

BK = Bus keeper (the bus keeper maintains the previous voltage level during reset or while the output pin is not driven), PU =

Pullup, PD = Pulldown, H = hysteresis input buffer, FS = Fail–safe buffer

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HPI Pins Consideration

Table 1. Suggested Guidelines for Terminating Emulation and Unused Pins on the

VC5503/5506/5507/5509A DSPs (continued)

Terminal Multiplexed How to Control Reset

Name Signal Name I/O/Z

(1)

Function if Pins are Not Used Reason BK

(2)

Condition

C1 O/Z EMIF asynchronous GPIO0 = 1: Output,

memory output EMIF. AOE

enable or HPI GPIO0 = 0: Output,

interrupt output HPI. HINT

EMIF. AOE O/Z Active-low Output pin. Leave None

asynchronous unconnected.

memory output

enable

HPI. HINT O/Z Active-low HPI Output pin. Leave None

interrupt output unconnected.

C2 I/O/Z EMIF asynchronous BK GPIO0 = 1: Output,

memory write enable EMIF. AWE

or HPI read/write GPIO0 = 0: Input,

HPI.HR/ W

EMIF. AWE O/Z Active-low EMIF Output pin. Leave None

asynchronous unconnected

memory write enable.

HPI.HR/ W I HPI read/write Pull high with 10 K Ω For functional

resistor or if HPI is not protection and/or

used, the parallel bus can low power

be either configured for

EMIF mode or this pin can

be tied to ground.

C3 I/O/Z EMIF data ready H GPIO0 = 1: Input,

input or HPI ready EMIF.ARDY

output GPIO0 = 0: Output,

HPI.HRDY

EMIF.ARDY I EMIF data ready Pull high with 2.2 K Ω For functional

input resistor protection and/or

low power

HPI.HRDY O HPI ready output Output pin. Leave None

unconnected

C4 I/O/Z EMIF chip select for BK GPIO0 = 1: Output,

memory space CE0 EMIF. CE0

or general-purpose GPIO0 = 0: Input,

IO9 GPIO9

EMIF. CE0 O/Z Active-low EMIF chip Output pin. Leave None

select for memory unconnected

space CE0

GPIO9 I/O/Z General-purpose IO9 Configure pin as an output. To minimize

Then it can be left power

unconnected or can be consumption

pulled high with 10 K Ω

resistor.

C5 I/O/Z EMIF chip select for BK GPIO0 = 1: Output,

memory space CE1 EMIF. CE1

or general-purpose GPIO0 = 0: Input,

IO10 GPIO10

EMIF. CE1 O/Z Active-low EMIF chip Output pin. Leave None

select for memory unconnected

space CE1

GPIO10 I/O/Z General-purpose Configure pin as an output. To minimize

IO10 Then it can be left power

unconnected or can be consumption

pulled high with 10 K Ω

resistor.

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HPI Pins Consideration

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Table 1. Suggested Guidelines for Terminating Emulation and Unused Pins on the

VC5503/5506/5507/5509A DSPs (continued)

Terminal Multiplexed How to Control Reset

Name Signal Name I/O/Z

(1)

Function if Pins are Not Used Reason BK

(2)

Condition

C6 I/O/Z EMIF chip select for BK GPIO0 = 1: Output,

memory space CE2 EMIF. CE2

or HPI control input 0 GPIO0 = 0: Input,

HPI.HCNTL0

EMIF. CE2 O/Z Active-low EMIF chip Output pin. Leave None

select for memory unconnected

space CE2

HPI.HCNTL0 I HPI control input 0 Pull high with 10 K Ω For functional

resistor or if HPI is not protection and/or

used, the parallel bus can low power

be either configured for

EMIF mode or pin can be

tied to ground.

C7 I/O/Z EMIF chip select for BK GPIO0 = 1: Output,

memory space CE3, EMIF. CE3

general-purpose GPIO0 = 0: Input,

IO11, or HPI control HPI.HCNTL1

input 1

EMIF. CE3 O/Z Active-low EMIF chip Output pin. Leave None

select for memory unconnected

space CE3

GPIO11 I/O/Z General-purpose Configure pin as an output. To minimize

IO11 Then it can be left power

unconnected or it can be consumption

pulled high with 10 K Ω

resistor.

HPI.HCNTL1 I HPI control input 1 Pull high with 10 K Ω For functional

resistor protection and/or

low power

C8 I/O/Z EMIF byte enable 0 BK GPIO0 = 1: Output,

control or HPI byte EMIF. BE0

identification GPIO0 = 0: Input,

HPI. HBE0

EMIF. BE0 O/Z Active–low EMIF byte Output pin. Leave None

enable 0 control unconnected

HPI. HBE0 I HPI byte identification Pull high with 10 K Ω For functional

resistor protection and/or

low power

C10 I/O/Z EMIF SDRAM row BK GPIO0 = 1: Output,

strobe, HPI EMIF. SDRAS

addresses strobe, or GPIO0 = 0: Input,

general-purpose IO12 HPI. HAS

EMIF. SDRAS O/Z Active-low EMIF Output pin. Leave None

SDRAM row strobe unconnected

HPI. HAS I Active-low HPI Pull high with 10 K Ω For functional

address strobe resistor protection and/or

low power

GPIO12 I/O/Z General-purpose Configure pin as an output. To minimize

IO12 Then it can be left power

unconnected or it can be consumption

pulled high with 10 K Ω

resistor.

C11 I/O/Z EMIF SDRAM column BK GPIO0 = 1: Output,

strobe or HPI chip EMIF. SDCAS

select input GPIO0 = 0: Input,

HPI. HCS

EMIF. SDCAS O/Z Active-low EMIF Output pin. Leave None

SDRAM column unconnected

strobe

HPI. HCS I HPI chip select input Pull high with 10 K Ω For functional

resistor protection and/or

low power

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HPI Pins Consideration

Table 1. Suggested Guidelines for Terminating Emulation and Unused Pins on the

VC5503/5506/5507/5509A DSPs (continued)

Terminal Multiplexed How to Control Reset

Name Signal Name I/O/Z

(1)

Function if Pins are Not Used Reason BK

(2)

Condition

C12 I/O/Z EMIF SDRAM write BK GPIO0 = 1: Output,

enable or HPI data EMIF. SDWE

strobe 1 input GPIO0 = 0: Input,

HPI. HDS1

EMIF. SDWE O/Z EMIF SDRAM write Output pin. Leave None

enable unconnected

HPI. HDS1 I HPI data strobe 1 Pull high with 10 K Ω For functional

input resistor protection and/or

low power

C13 I/O/Z SDRAM A10 address BK GPIO0 = 1: Output,

line or EMIF.SDA10

general-purpose IO13 GPIO0 = 0: Input,

GPIO13

EMIF.SDA10 O/Z SDRAM A10 address Output pin. Leave

line unconnected

GPIO13 I/O/Z General-purpose Configure pin as an output.

IO13 Then it can be left

unconnected or it can be

pulled high with 10 K Ω

resistor.

C14 I/O/Z Memory interface BK GPIO0 = 1: Output,

clock for SDRAM, EMIF.CLKMEM

HPI data strobe 2 GPIO0 = 0: Input,

input, or HPI. HDS2

general-purpose IO14

EMIF.CLKMEM O/Z Memory interface Output pin. Leave None

clock for SDRAM unconnected

HPI. HDS2 I HPI data strobe 2 Pull high with 10 K Ω For functional

input resistor protection and/or

low power

Interrupt and Reset Pins

INT[4:0] I Active-low external If unmasked, pull up high For functional H, FS Input

user interrupt inputs with 10 K Ω resistor. If protection and/or

masked, connect to ground. low power

RESET I Active-low reset This pin always is used and For functional H, FS Input

connected, but for protection

functional protection, use

an external 10 K Ω pull-up

resistor on this pin.

Bit I/O Signals

GPIO[7:6,4:0] (LQFP) I/O/Z 7-bit (LQFP package) BK Input

GPIO[7:0] (BGA) or 8-bit (BGA (GPIO5

package) input/output only)

lines H

(except

EMIF.CKE O/Z SDRAM CKE signal Output pin. Leave None Input

GPIO5)

(GPIO4) unconnected. (GPIO4)

XF O/Z External flag Output pin. Leave None Output

unconnected.

EMIF.CKE O/Z SDRAM CKE signal Output pin. Leave None Output

unconnected. (XF)

Oscillator/Clock Signals

CLKOUT O/Z DSP clock output None. Leave floating or None Output

signal connect to TP for debug

purposes

X2/CLKIN I/O System None. This pin is always None Oscillator Input

clock/oscillator input used.

X1 O Output pin from the Output pin. Leave To minimize Oscillator Output

internal system unconnected. power

oscillator for the consumption

crystal

Timer Signals

TIN/TOUT0 I/O/Z Timer0 input/output If not configured as output, To minimize H Input

pull up high with 10 K Ω power

resistor consumption

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HPI Pins Consideration

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Table 1. Suggested Guidelines for Terminating Emulation and Unused Pins on the

VC5503/5506/5507/5509A DSPs (continued)

Terminal Multiplexed How to Control Reset

Name Signal Name I/O/Z

(1)

Function if Pins are Not Used Reason BK

(2)

Condition

Real-Time Clock

RTCINX1 I Real-time clock Pull down low To minimize Input

oscillator input power

consumption

RTCINX2 O Real-time clock Output pin. Leave None Output

oscillator output unconnected

I2C

SDA I/O/Z I2C (bidirectional) Pull up high with 10 K Ω To minimize H Hi-Z

data resistor power

consumption

SCL I/O/Z I2C (bidirectional) Pull up high with 10 K Ω To minimize H Hi-Z

data resistor power

consumption

Multichannel Buffered Serial Port (McBSP) Signals

CLKR0 I/O/Z McBSP0 receive Configure as an output and To minimize H Hi-Z

clock leave floating or pull up power

high with 10 K Ω resistor consumption

DR0 I McBSP0 receive data Pull up high with 10 K Ω To minimize FS Input

resistor power

consumption

FSR0 I/O/Z McBSP0 receive Configure as an output and To minimize Hi-Z

frame synchronization leave floating or pull up power

high with 10 K Ω resistor. consumption

CLKX0 I/O/Z McBSP0 transmit Configure as an output and To minimize H Input

clock leave floating or pull up power

high with 10 K Ω resistor. consumption

DX0 O/Z McBSP0 transmit Output pin. Leave None Hi-Z

data unconnected

FSX0 I/O/Z McBSP0 transmit Configure as an output and To minimize Input

frame synchronization leave floating or pull up power

high with 10 K Ω resistor. consumption

S10 I/O/Z McBSP1 receive H Input

clock or MultiMedia

Card/Secure Digital1

command/response.

At reset, this pin is

configured

as McBSP1.CLKR.

McBSP1.CLKR I/O/Z McBSP1 receive Configure as an output and To minimize

clock. McBSP1.CLKR leave floating or pull up power

serves as the serial high with 10 K Ω resistor. consumption

shift clock for the

serial port receiver.

McBSP1.CLKR is

selected when the

External Bus

Selection Register

has 00 in the Serial

Port1 Mode bit field

or following reset.

MMC1.CMD I/O/Z MMC1 or SD1 If the serial bus is To minimize

SD1.CMD command/response configured for MMC or SD power

mode, and MMC or SD consumption

interface is not used,

configure bus for McBSP

mode.

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HPI Pins Consideration

Table 1. Suggested Guidelines for Terminating Emulation and Unused Pins on the

VC5503/5506/5507/5509A DSPs (continued)

Terminal Multiplexed How to Control Reset

Name Signal Name I/O/Z

(1)

Function if Pins are Not Used Reason BK

(2)

Condition

S11 I/O/Z McBSP1 data receive Input

or Secure Digital1

data1

McBSP1.DR I/Z McBSP1 serial data Pull up high with 10 K Ω To minimize

receive resistor power

consumption

SD1.DAT1 I/O/Z SD1 data1 If the serial bus is To minimize

configured for SD mode, power

and SD interface is not consumption

used, configure bus for

McBSP mode.

S12 I/O/Z McBSP1 receive Input

frame synchronization

or Secure Digital1

data2

McBSP1.FSR I/Z McBSP1 receive Pull up high with 10 K Ω To minimize

frame synchronization resistor power

consumption

SD1.DAT2 I/O/Z SD1 data2 If the serial bus is To minimize

configured for SD mode, power

and SD interface is not consumption

used, configure bus for

McBSP mode.

S13 O/Z McBSP1 serial data BK Hi-Z

transmit or

Multimedia

Card/Secure Digital1

serial clock

McBSP1.DX O/Z McBSP1 serial data Output pin. Leave None

transmit unconnected.

MMC1.CLK O MMC1 or SD1 serial Output pin. Leave None

SD1.CLK clock unconnected.

S14 I/O/Z McBSP1 transmit H Input

clock or Multimedia

Card/Secure Digital1

data0

McBSP1.CLKX I/O/Z McBSP1 transmit Pull up high with 10 K Ω To minimize

clock resistor power

consumption

MMC1.DAT I/O/Z MMC1 or SD1 data0 If the serial bus is To minimize

SD1.DAT0 configured for MMC or SD power

mode, and MMC or SD consumption

interface is not used,

configure bus for McBSP

mode.

S15 I/O/Z McBSP1 transmit Input

frame synchronization

or Secure Digital1

data3

McBSP1.FSX I/O/Z McBSP1 transmit Pull up high with 10 K Ω

frame synchronization resistor

SD1.DAT3 I/O/Z SD1 data3 If the serial bus is

configured for MMC or SD

mode, and MMC or SD

interface is not used,

configure bus for McBSP

mode.

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Table 1. Suggested Guidelines for Terminating Emulation and Unused Pins on the

VC5503/5506/5507/5509A DSPs (continued)

Terminal Multiplexed How to Control Reset

Name Signal Name I/O/Z

(1)

Function if Pins are Not Used Reason BK

(2)

Condition

S20 I/O/Z McBSP2 receive H Input

clock or Multimedia

Card/Secure Digital2

command/response

McBSP2.CLKR I/O/Z McBSP2 receive Configured as an output To minimize

clock and leave floating or pull up power

high with 10 K Ω resistor consumption

MMC2.CMD I/O/Z MMC2 or SD2 If the serial bus is To minimize

SD2.CMD command/response configured for MMC or SD power

mode, and MMC or SD consumption

interfaces is not used,

configure bus for McBSP

mode.

S21 I/O/Z McBSP2 data receive Input

or Secure Digital2

data1

McBSP2.DR I McBSP2 serial data Pull up high with 10 K Ω

receive resistor

SD2.DAT1 I/O/Z SD2 data1 If the serial bus is

configured for MMC or SD

mode, and MMC or SD

interfaces is not used,

configure bus for McBSP

mode.

S22 I/O/Z McBSP2 receive Input

frame synchronization

or Secure Digital2

data2

McBSP2.FSR I McBSP2 receive Pull up high with 10 K Ω

frame synchronization resistor

SD2.DAT2 I/O/Z SD2 data2 If the serial bus is

configured for MMC or SD

mode, and MMC or SD

interfaces is not used,

configure bus for McBSP

mode.

S23 O/Z McBSP2 data BK Hi-Z

transmit or

Multimedia

Card/Secure Digital2

serial clock

McBSP2.DX O/Z McBSP2 serial data Output pin. Leave None

transmit unconnected.

MMC2.CLK O MMC2 or SD2 serial Output pin. Leave None

SD2.CLK clock unconnected.

S24 I/O/Z McBSP2 transmit H Input

clock or Multimedia

Card/Secure Digital2

data0

McBSP2.CLKX I/O/Z McBSP2 transmit Configured as an output To minimize

clock and leave floating or pull up power

high with 10 K Ω resistor consumption

MMC2.DAT I/O/Z MMC2 or SD2 data0 If the serial bus is To minimize

SD2.DAT0 pin configured for MMC or SD power

mode, and MMC or SD consumption

interfaces is not used,

configure bus for McBSP

mode.

Board and System Design Considerations for the TMS320VC5503/5506/5507/5509A DSPs10 SPRAB14 – November 2008

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www.ti.com

HPI Pins Consideration

Table 1. Suggested Guidelines for Terminating Emulation and Unused Pins on the

VC5503/5506/5507/5509A DSPs (continued)

Terminal Multiplexed How to Control Reset

Name Signal Name I/O/Z

(1)

Function if Pins are Not Used Reason BK

(2)

Condition

S25 I/O/Z McBSP2 transmit Input

frame synchronization

or Secure Digital2

data3

McBSP2.FSX I/O/Z McBSP2 frame Configured as an output To minimize

synchronization and leave floating or pull up power

high with 10 K Ω resistor consumption

SD2.DAT3 I/O/Z SD2 data3 If the serial bus is To minimize

configured for SD mode, power

and SD interface is not consumption

used, configure bus for

McBSP mode.

A/D

AIN0 I Analog input channel Analog input. Leave None Input

0 unconnected.

AIN1 I Analog input channel Analog input. Leave None Input

1 unconnected.

AIN2 (BGA only) I Analog input channel Analog input. Leave None Input

2 (BGA package only) unconnected.

AIN3 (BGA only) I Analog input channel Analog input. Leave None Input

3. (BGA package unconnected.

only)

Test/Emulation Pins ( Use or not use, terminate as below)

TCK I IEEE standard 1149.1 PU Input

test clock H

TDI I IEEE standard 1149.1 PU Input

test clock

TDO O/Z IEEE standard 1149.1 Hi-Z

test clock

TMS I IEEE standard 1149.1 PU Input

test clock

TRST I IEEE standard 1149.1 Pull down to ground via 10 For functional PD Input

test clock K Ω resistor protection FS

EMU0 I/O/Z Emulator 0 pin Pull up high with 4.7 K Ω For functional PU Input

resistor protection

EMU1/ OFF I/O/Z Emulator 1 Pull up high with 4.7 K Ω For functional PU Input

pin/disable all outputs resistor protection

Supply Pins

S Digital power, + V

. Always need to be None

Dedicated power connected.

supply for the core

CPU.

S Digital power, + V

. Always need to be None

Dedicated power connected.

supply for the core

CPU.

USBV

S Digital power, + V

. Always need to be None

Dedicated power connected.

supply for the I/O of

the USB module (DP,

DN , and PU).

RDV

S Digital power, + V

. Always need to be None

Dedicated power connected.

supply for the I/O pins

of the RTC module.

RCV

S Digital power, + V

. Always need to be None

Dedicated power connected.

supply for the RTC

module.

SPRAB14 – November 2008 Board and System Design Considerations for the TMS320VC5503/5506/5507/5509A DSPs 11

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8 Summary

9 References

Summary

www.ti.com

Table 1. Suggested Guidelines for Terminating Emulation and Unused Pins on the

VC5503/5506/5507/5509A DSPs (continued)

Terminal Multiplexed How to Control Reset

Name Signal Name I/O/Z

(1)

Function if Pins are Not Used Reason BK

(2)

Condition

S Analog power, + V

. Always need to be None

Dedicated power connected.

supply for the 10-bit

A/D.

ADV

S Analog digital Power, Always need to be None

+ V

. Dedicated connected.

power supply for the

digital portion of the

10-bit A/D.

USBPLLV

S Digital power, + V

. Always need to be None

Dedicated power connected.

supply pin for the

USB PLL.

S Digital ground. Always need to be None

Dedicated ground for connected.

the I/O and core pins.

S Analog ground. Always need to be None

Dedicated ground for connected.

the 10–bit A/D.

ADV

S Analog digital ground. Always need to be None

Dedicated ground for connected.

the digital portion of

the10-bit A/D.

USBPLLV

S Digital ground. Always need to be None

Dedicated ground for connected.

the USB PLL.

Miscellaneous

NC No connection None None

The information provided in this document and the reference documentation listed inSection 9 will help

DSP designers optimize their VC5503/5506/5507/5509A board power consumption and assist with

system-level issues.

• TMS320VC5503 Fixed-Point Digital Signal Processor Data Manual (SPRS245 )

• TMS320VC5506 Fixed-Point Digital Signal Processor Data Manual (SPRS375 )

• TMS320VC5507 Fixed-Point Digital Signal Processor Data Manual (SPRS244 )

• TMS320VC5509A Fixed-Point Digital Signal Processor Data Manual (SPRS205 )

• TMS320VC5507/5509 DSP Universal Serial Bus (USB) Module Reference Guide (SPRU596 )

• TMS320VC5503/5507/5509 DSP Real-Time Clock (RTC) Reference Guide (SPRU594 )

• TMS320VC5501/5502/5503/5507/5509 DSP Inter-Integrated Circuit Module Reference Guide

(SPRU146 )

• TMS320VC5503/5507/5509 DSP Host Port Interface (HPI) Reference Guide (SPRU619 )

• TMS320VC5503/5507/5509 DSP External Memory Interface (EMIF) Reference Guide (SPRU670 )

• TMS320VC5501/5502/5503/5507/5509/5510 DSP Multichannel Buffered Serial Port (McBSP)

Reference Guide (SPRU592 )

Board and System Design Considerations for the TMS320VC5503/5506/5507/5509A DSPs12 SPRAB14 – November 2008

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