Atmel SAMA5D2-XULT User manual

Atmel
Brand
Atmel
Model
SAMA5D2-XULT
Type
User manual
SMART
Atmel-44028B-ATARM-SAMA5D2-Xplained-Ultra-User Guide_02-Oct-15
Introduction
This user guide introduces the Atmel
®
SAMA5D2 Xplained Ultra evaluation kit
(SAMA5D2-XULT) and describes the development and debugging capabilities for
applications running on the Atmel | SMART SAMA5D2 ARM
®
Cortex
®
-A5-based
embedded microprocessor unit (eMPU).
Scope
This guide provides details on the SAMA5D2-XULT. It is made up of five main
sections:
Section 1. describes the evaluation kit content and its main features.
Section 2. provides instructions to power up the SAMA5D2-XULT board.
Section 3. provides information on obtaining sample code and technical
support.
Section 4. provides an overview of the SAMA5D2-XULT board.
Section 5. describes the SAMA5D2-XULT board components.
Atmel | SMART SAMA5D2 Series
SAMA5D2 Xplained Ultra Evaluation Kit
USER GUIDE
SAMA5D2 Xplained Ultra [USER GUIDE]
Atmel-44028B-ATARM-SAMA5D2-Xplained-Ultra-User Guide_02-Oct-15
2
Kit Contents
The SAMA5D2-XULT includes:
Board
̶ One SAMA5D2-XULT board
Cables
̶ One Micro-AB type USB cable
Welcome letter
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Table of Contents
Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Scope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Kit Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1. Evaluation Kit Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.1 Electrostatic Warning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.2 Power Supply Warning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2. Power Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1 Power up the Board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3. Sample Code and Technical Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4. Hardware Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4.2 Equipment List. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4.3 Board Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
5. Board Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
5.1 Board Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
5.2 Connectors on board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5.3 Function Blocks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5.4 PIO Usage and Interface Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.5 PIO Usage on Expansion Connectors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
5.6 SAMA5D2-XULT Board Schematics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
6. Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
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1. Evaluation Kit Specifications
1.1 Electrostatic Warning
1.2 Power Supply Warning
Table 1-1. Evaluation Kit Specifications
Characteristic Specifications
Board SAMA5D2-XULT
Board supply voltage USB and/or Battery powered
Temperature
Operating 0°C to +70°C
Storage -40°C to +85°C
Relative Humidity 0 to 90% (non-condensing)
Dimensions: Main board 135 × 88 × 20 mm
RoHS status Compliant
Board Identification SAMA5D2 XPLAINED ULTRA
WARNING
ESD-Sensitive Electronic Equipment!
The evaluation kit is shipped in a protective anti-static package. The board system
must not be subject to high electrostatic potentials.
We recommend using a grounding strap or similar ESD protective device when
handling the board in hostile ESD environments (offices with synthetic carpet, for
example). Avoid touching the component pins or any other metallic element on
the board.
Electrostatic
sensitive
device
WARNING
Hardware Power Supply Limitation
Powering the board with voltages higher than 5 VCC (e.g., the 12 VCC power
adapters from other kits such as Arduino kits) may damage the board.
WARNING
Hardware Power Budget
Using the USB as the main power source (max. 500 mA) is acceptable only with the
use of the on-board peripherals and low-power LCD extension.
When external peripheral or add-on boards need to be powered, we recommend
the use of an external power adapter connected to the USB Micro-AB connectors
(can provide up to 1.2A on the 3.3V node).
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2. Power Source
Several options are available to power up the SAMA5D2-XULT board:
USB-powered through the USB Micro-AB connector (J23 - default configuration)
Powered through a rechargeable battery Li-polymer 3.7V connected to J3 or J4
Powered through the USB Micro-AB connector on the Atmel Embedded Debugger (EDBG) interface (J14)
2.1 Power up the Board
Unpack the board, taking care to avoid electrostatic discharge. Connect the USB Micro-AB cable to the connector
(J23). Then connect the other end of the cable to a free USB port of your PC.
WARNING
Unlike Arduino Uno boards, the SAMA5D2-XULT board runs at 3.3V. The maximum
voltage that the I/O pins can tolerate is 3.3V. Providing higher voltages (e.g., 5V) to
an I/O pin could damage the board.
Table 2-1. Electrical Characteristics
Electrical Parameter Value
Input voltage 5 VCC
Maximum Input voltage (limits) 6 VCC
Maximum DC 3.3V current available 1.2A
I/O voltage 3.3V only
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3. Sample Code and Technical Support
After boot up, you can run some sample code or your own application on the development kit. You can download
sample code and get technical support from www.atmel.com.
Linux software and demos can be found on http://www.at91.com/linux4sam/bin/view/Linux4SAM/.
WARNING
Please make sure to load the latest software version before starting your
evaluation. For more information, please go to
http://www.at91.com/linux4sam/bin/view/Linux4SAM/.
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4. Hardware Overview
4.1 Introduction
The Atmel SAMA5D2XULT is a full-featured evaluation platform for the Atmel SAMA5D2 series ARM-based
embedded microprocessor units (eMPU). It allows users to extensively evaluate, prototype and create application-
specific designs.
4.2 Equipment List
The SAMA5D2-XULT board is based on the integration of an ARM Cortex-A5-based microprocessor with external
memory, one Ethernet physical layer transceiver, one SD/MMC interface, one host USB port and one device USB
port, one 24-bit RGB LCD and debug interfaces.
Seven headers, compatible with Arduino R3 (Uno, Due) and two Xplained headers are available for various shield
connections.
4.3 Board Features
Table 4-1. Board Specifications
Characteristics Specifications
Dimensions (L x W x H) 135 x 88 x 20 mm
Processor SAMA5D27 (289-ball BGA package), 14x14 mm body, 0.8 mm ball pitch
Oscillators
MPU, EDBG: 12 MHz crystal
RTC: 32.768 kHz
PHY: 25 MHz
Main Memory
2 x DDR3L SDRAM 2 Gbit - 16 Mbit x 16 x 8 banks (total 4 Gbit = 512 Mbyte)
1 x eMMC NAND Flash 4 Gbit
Accessory memories
One Serial EEPROM SPI
One optional QSPI Serial Flash
One EEPROM with MAC Address and Serial Number
SD/MMC One 4-bit SD card connector
USB
One USB Host with power switch
One Micro-AB USB device
Display
One LCD interface connector, LCD TFT Controller with overlay, alpha-blending, rotation, scaling and color
space conversion
Image Sensor One ISC interface and connector
Ethernet One Ethernet PHY (RMII 10/100 MHz)
Debug port
One JTAG interface connector
One EDBG interface with CDC
One serial debug console interface (3v3 level)
Expansion connector
Arduino R3 compatible set of connectors
XPRO set of connectors
Board supply voltage
5V from USB
On-board power regulation by PMIC
External Battery powered capability
Battery On-board PowerCap
User interface
Reset, Wake-up and free user push button
One tri-color user LED (red, green, blue)
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5. Board Components
5.1 Board Overview
The fully-featured SAMA5D2-XULT board integrates multiple peripherals and interface connectors as shown in
Figure 5-1.
Figure 5-1. SAMA5D2-XULT Board Overview
5.1.1 Default Jumper Settings
Figure 5-1 shows the default jumper settings. Blue jumpers are configuration items. Red jumpers are current
measurement points. Table 5-2 describes the functionality of the jumpers.
R18
R11
R24
C1
C3
TP3
C2
R17
R16
R15
R14
Q1
C8
R9
R8
Q2
C9
R10
R23
C5
C6
R5
R1
TP1 TP2
J1
R27
R22
R21
R7
R6
C7
C11
R12
R25
U1
C4
JP1
BP1
C12
L2
R35
R31
R32
R34
R33
R39
R36
R37
R38
J2
R28
J3
R26
R20
R19
L1
C13
L3
Q3
C10
R13
C14
R29
R2
R3
R4
L4
J5
C18
C16
R48
R45
R47
JP2
R40
R42
J4
R30
R41
D1
U2
C17
C20
TP5
Y1
D4
R46
D3
C15
R43
TP4
Q4
C21
J6
R64
U3
R61
R60
R49
C25
D2
R44
C19
C22
L6
L5
TP6
JP3
C24
R59
C35
C34
R70
R69
R68
R67
C36
C31
C28
C29
C30
C27
JP4
C37
TP7
C23
R63
C33
C26
Q5
Y2
R66
R65
J9
J8
C38
R58
R57
R56
R55
R54
R53
C39
R52
R51
R50
R71
R62
C32
R73
R72
J17
R81
R80
R79
R78
R77
R76
Y3
L10
J7
L7
L8
L9
R74
J11
C42
R123
R105
R100
C41
C40
R96
R95
R94
R93
R92
R91
R90
R89
R88
R87
R86
R85
R84
R83
R82
JP5
R75
J10
J13
J12
C43
R103
R122
R121
R120
R119
R118
R117
R116
R115
R114
R113
R112
R111
R110
R109
R108
R124
R104
R99
R130
C44
R129
C45
R131L12
L11
J18
R137
R136
R135
R134
R133
R132
JP6
C46
Y4
R138
C47
TP8
R102R101
79R89R
U5
J14
J19
R152
R146
C51
R143R142
R141R140
R139
C48
R128R127
R126R125
R107R106
U4
C50
C49
L13
U7
J15
R154
R151
R150
R149
R148
R147
R145
R144
U6
R153
U8
R158
R155
C52
J16
R163
R161
R159
R156
R162
R160
R157
BP2
U9
C53
U10
R169
R167
R165
R164
U11
R177
R175
R173
R171
R182
R181
C55
R180
C54
R179
R178
J22
R172
R170
R168
R166
JP7
L14
C56
J20
BP3
J21
R176
R174
J23
J24
JP8
C60
C59
R184
R183
C57
JP9
J26
J25
C58
42
3
42
3
4
1
3
4
2
3
2
D22
SCL1
F3_RXD
SDA1
F0_RXD
F3_TXD
F0_TXD
F4_RXD
F4_TXD
GND
AREF
SDA0
SCL0
A5-USB-A
D23
V5V5
8
10
9
12
11
13
BOOT_DIS
21
19
20
17
18
XPRO EXT2
16
14
15
1
0
3
2
4
5
6
7
XPRO EXT1
XPRO POWER
VDD_5V_IN
F1_TXD
F1_RXD
WWW.ATMEL.COM
D51
D49
D50
D48
PIOBU
A5-JTAGEDBG-JTAG
D47
D46
EDBG-USB
SDMMC1
ISC
D45
D43
D44
D42
DIGITAL
VDDBU
D41
D40
B
B
D39
D37
D38
D36
HSIC
A
WAKE UP
D35
D33
D34
D32
SDMMC0
D31
D30
RESET
D29
D27
D28
D26
VDDIODDR
D25
D24
D53
GND
GND
D52
A
A5-USB-B
R
CANTX1
CANRX1
VDD_3V3
CANRX0
CANTX0
VBAT
STAT
ETH
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
NC
GND
GND
5V
3V3
RST
3V3
CLASS D
TM
VDDCORE
POWER
3.3V LEVELS
RTS GND
RXD VCCTXD
CTS
EDBG_DIS
DEBUG
PB_USER
DEBUG_DIS
LCD
Pin1
VBAT
RGB LED
VDD_3V3_LP
Table 5-1. SAMA5D2-XULT Jumper Settings
Jumper Default Function
JP1 OPEN Disable EDBG
JP2 OPEN Disable Debug
JP3 CLOSE VDD_3V3_LP current measurement
JP4 CLOSE VDDCORE current measurement
JP5 CLOSE VDDISC + VDDIOP0/1/2 current measurement
JP6 CLOSE VDDBU current measurement
JP7 CLOSE VDDIODDR_MPU current measurement
JP8 CLOSE VDD_5V_IN current measurement
JP9 OPEN Disable CS of SPI&QSPI&eMMC memories
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5.2 Connectors on board
Table 5-2 describes the interface connectors on the SAMA5D2-XULT.
5.3 Function Blocks
5.3.1 Processor
The Atmel
®
| SMART SAMA5D2 Series is a high-performance, power-efficient embedded MPU based on the
ARM
®
Cortex
®
-A5 processor. Please refer to the SAMA5D2 Series datasheet for more information.
5.3.2 Power Supply Topology and Power Distribution
5.3.2.1 Power Supplies
Detailed information on the device power supplies is provided in the tables “SAMA5D2 Power Supplies” and
“Power Supply Connections” in the SAMA5D2 Series datasheet.
Table 5-2. SAMA5D2-XULT Board Interface Connectors
Connector Interfaces to
J23 USB A Device. Supports USB device using a type Micro-AB connector
J13 USB Host B. Supports USB host using a type A connector
J1 Serial DBGU (3.3V level)
J11 JTAG, 10 pin IDC connector
J14 EDBG USB connector
J15 USB C (not populated)
J6 Ethernet
J2
Expansion connector with all LCD controller signals for display module connection (QTouch
®
, TFT LCD
display with touchscreen and backlight)
J19 SDHCI SD/MMC connector
J3, J4 Battery connectors
J12 Tamper connector (not populated)
J7, J8, J9,
J16, J17,
J20, J21, J22
Expansion connectors with Arduino R3 compatible PIO signals
J24, J25, J26 Xplained Pro Expansion connectors
J10 EDBG JTAG (not populated)
J18 ISC interface
J5 Class-D amplifier output
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Figure 5-2. Processor Power Lines Supplies
5.3.2.2 Power-up and Power-down Considerations
Power-up and power-down considerations are described in section “Power Considerations” of the SAMA5D2
Series datasheet.
5.3.2.3 ACT8945A Power Management IC
The ACT8945A is a complete, cost-effective and highly-efficient ActivePMU™ power management solution,
optimized to provide a single-chip power solution and voltage sequencing for Atmel
SAMA5D2/SAMA5D3/SAMA5D4 and SAM9 series MPUs. It also meets the control requirements of these devices.
The ACT8945A features three step-down DC-DC converters and four low-noise, low-dropout linear regulators
along with a complete battery charging solution featuring the advanced ActivePath™ system-power selection
function.
(3V3)
(1V2)
(1V35)
(3V3)
(3V3) (3V3) (3V3)
(1V2) (2V5)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(1V35)
(1V2)
(1V2)
(1V2)
(1V2)
(2V5)
(3V3)
(1V2)
(1V2) (3V3)
(3V3)
(3V3)
(3V3 or 1V8)
(3V3 or 1V8)
VDDBU
VDDCORE
VDDPLLA
VDDIOP0
VDDIOP1
VDDIOP2
VDDHSIC
VDDUTMIC
VDDUTMII
VDDSDHC
VDDPLLA
VDDOSC
VDDISC
VDDFUSE
VDDAUDIOPLL
VDDBU
VDDIODDR
VDDANA
VDDANA
VDDIOP0 VDDIOP1 VDDIOP2
VDDHSIC VDDFUSE
VDDUTMII VDDSDHC
VDDOSC VDDISC
VDDUTMIC
VDDCORE
VDDIODDR
VDDAUDIOPLL
GNDUTMII
VDDBU
VDDCORE
VDDIODDR
VDDANA
VDDIOP0 VDDIOP1 VDDIOP2
VDDHSIC VDDFUSE
VDDUTMII VDDSDHC
VDDPLLA VDDOSC VDDISC
VDDUTMIC
GNDUTMII
VDDAUDIOPLL
C135
100nF
C31
100nF
C29
100nF
C128
100nF
C140
100nF
C132
100nF
C134
100nF
C43
4.7uF
C80
100nF
R269
1R 1%
C131
100nF
C102
100nF
C144
100nF
C27
10uF
C101
100nF
C136
100nF
C111
100nF
C118
100nF
C70
10uF
C97
1nF
C30
1nF
C108
100nF
C119
100nF
C142
4.7uF
C137
1nF
C28
10uF
C110
100nF
C138
100nF
R264 0R
C107
100nF
R131
1R 1%
C88
100nF
C71
10uF
C133
100nF
C104
100nF
C45
100nF
C120
100nF
C105
1nF
C125
100nF
C114
100nF
SAMA5D27-CN
U6G
GNDANA_2
K5
GNDBU
N6
GNDCORE_1
E7
GNDCORE_2
E9
GNDCORE_3
H4
GNDCORE_4
K12
GNDCORE_5
M5
GNDCORE_6
M9
GNDDDR_1
D14
GNDDDR_2
E11
GNDDDR_3
E12
GNDDDR_4
E14
GNDDDR_5
H14
GNDDDR_6
J14
GNDDDR_7
L14
GNDDPLL
T5
GNDAUDIOPLL
T4
GNDIOP0_1
F6
GNDIOP0_2
G7
GNDIOP1_1
M13
GNDIOP1_2
P14
GNDIOP2
F9
GNDISC
G4
GNDOSC
T6
GNDPLLA
U5
GNDSDMMC
R11
GNDUTMII
P9
GNDUTMIC
R7
VDDANA_2
L5
VDDBU
N7
VDDCORE_1
D7
VDDCORE_2
D9
VDDCORE_3
H3
VDDCORE_4
K13
VDDCORE_5
N5
VDDCORE_6
N9
VDDDDR_1
D11
VDDDDR_2
D12
VDDDDR_3
D15
VDDDDR_4
E15
VDDDDR_5
H15
VDDDDR_6
J15
VDDDDR_7
L15
VDDAUDIOPLL
T3
VDDFUSE
M12
VDDHSIC
R9
VDDIOP0_1
E6
VDDIOP0_2
F7
VDDIOP1_1
N13
VDDIOP1_2
R14
VDDIOP2
F10
VDDISC
F4
VDDOSC
T7
VDDPLLA
U4
VDDSDMMC
P11
VDDUTMII
P8
VDDUTMIC
P7
GNDANA_1
L3
VDDANA_1
K3
C122
1nF
C147
4.7uF
C103
100nF
C84
1nF
C143
100nF
C148
4.7uF
WARNING
The power-up sequence provided in the SAMA5D2 Series datasheet must be
respected for reliable operation.
WARNING
Refer to the ACT8945A datasheet at www.active-semi.com for more details.
SAMA5D2 Xplained Ultra [USER GUIDE]
Atmel-44028B-ATARM-SAMA5D2-Xplained-Ultra-User Guide_02-Oct-15
11
The three DC-DC converters utilize a high efficiency, fixed-frequency (2 MHz), current-mode PWM control
architecture that requires a minimum number of external components. Two DC-DC converters are capable of
supplying up to 1100 mA of output current, while the third supports up to 1200 mA. All four low-dropout linear
regulators are high performance, low-noise regulators that supply up to 320 mA of output current.
Figure 5-3. Board Power Management
Note: 1. Occasional board startup problems occurred when powered from a USB source having a weak VBUS level below 4.8V. To
avoid the voltage drop and consequential startup problems, production boards were assembled with a 0 Ω resistor in place
of the Schottky diode D9 shown here.
Supply Group Configuration
The ACT8945A provides:
All power supplies required by the SAMA5D2 device:
̶ 1.2V VDDCORE, VDDPLLA, VDDUTMIC, VDDHSIC
̶ 1.35V VDDIODDR
̶ 2.0V VDDBU
̶ 3.3V VDDIOP, VDDISC, VDDEDBG
̶ 2.5V VDDFUSE
̶ 3.3V VDDOSC, VDDUTMI, VDDANA, VDDAUDIOPLL
Power supplies to external chips on the main board:
̶ 1.8V VDDSDHC1V8
̶ 2.5V VDDLED
̶ 4.8V VSYS_5V
VDD_2V5
Populate R if
no Super Cap
(Super)-Capacitor
energy storage
VDD_3V3
VDD_3V3
VDD_1V8
WAKE UP RESET
For DDR3 For MPU
VIN_5V
nPBSTAT
VBAT
VBAT
VDD_5V_IN
VDD_1V2
VDD_1V35
VDD_3V3
VBAT
VDDFUSE
VSYS_5V
VDD_3V3_LP
VDD_LED
VSYS_5V
VDDSDHC1V8
VSYS_5V
VSYS_5V
VDDHSIC
VDD_3V3
VDD_1V2
VDDCORE
VDD_1V35
VDDIOP0
VDDIOP2
VDDIOP1
VDDPLLA
VDDUTMIC
VDDIODDR
VDD_3V3_LP
VDDAUDIOPLL
VDDANA
VDDOSC
VDDUTMII
VDD_5V_IN
VSYS_5V
VDDBU
VDDISC
VDD_3V3
VDD_3V3
VSYS_5V VDDB_5V
USBA_VBUS_5V[10]
EDBG_USB_VBUS_5V[14]
SHDN[9]
PMIC_CHGLEV_PA12[7]
PMIC_IRQ_PB13[7]
PMIC_TWD0_PD21[8]
PMIC_TWCK0_PD22[8]
NRST[9,10,12,14,15]
5V_EXT_INP[15]
PMIC_LBO/EXP_PC8[8,15]
C19
4.7uF
R17 100R 1%
C180
10uF
R30 0R
L7
180ohm at 100MHz
1 2
R293 2R2
J3
1X3Pin
1
2
3
R129 2R2
R14 49.9K 1%
R284 0R
C2
10uF
L12 10uH_150mA
L16
180ohm at 100MHz
1 2
L18
180ohm at 100MHz
1 2
JP3
Header 1X2
1
2
Q2
BSS138
1
3
2
R12
100K
C8
100nF
R303 0R
R9 1K
R24
DNP
(3.9K 1%)
U22
FAN48610
VIN
A3
SW1
B1
SW2
B2
EN
B3
PGND1
C1
VOUT2
A2
VOUT1
A1
AGND
C3
PGND2
C2
L8
180ohm at 100MHz
1 2
R26
DNP(8.2K 1%)
C10 100nF
C38
100nF
JPR3
Jumper
C60
10uF
L27
0.47uH
C24
100nF
R16 100R 1%
D6
BAT54C
3
1
2
C181
22uF
R710K
C59
10uF
R27
2.43K 1%
TP11
SMD
C46
100nF
BP3Tact Switch
C22
10uF
JPR4
Jumper
C20
10uF
R330 0R
R22 1.5M 1%
R19
0R
JP7
Header 1X2
1
2
C44
DNP(1uF)
C37
10uF
R8
68K
C23
10uF
+
C42
0.2F/3.3V
JPR5
Jumper
C58
100nF
JP8
Header 1X2
1
2
R327 0R
R44 100R 1%
R139
DNP(2.2K)
C7
DNP(1nF)
JP4
Header 1X2
1
2
R13
49.9K 1%
L6 2.2uH
R18
11K 1%
C169
4.7uF
JPR6
Jumper
L22 10uH_150mA
R610K
C165
4.7uF
C173
4.7uF
D5
RB160M-60TR
JPR7
Jumper
U12
TPS2113
IN1
8
VSNS
3
EN
2
IN2
6
GND
5
ILIM
4
OUT
7
STAT
1
R20 100R 1%
L23
180ohm at 100MHz
1 2
Q7
DNP
(IRLML6402)
1
32
R21 2.2M 1%
L10
180ohm at 100MHz
1 2
L3
180ohm at 100MHz
1 2
JP6
Header 1X2
1
2
R187 10K
Q1
BSS138
1
3
2
C17
4.7uF
JPR8
Jumper
BP2Tact Switch
C166
47nF
J4
DNP(Header 1X2 2.00MM)
1
2
R186 10K
C13
4.7uF
C164
10uF
L20 10uH_150mA
C3
10uF
R300 2R2
R34510K
C163
10uF
L9
180ohm at 100MHz
1 2
Q3
BSS138
1
3
2
JP5
Header 1X2
1
2
C1
100nF
L5 2.2uH
R280 100R 1%
C167
100nF
L19
180ohm at 100MHz
1 2
TP14
SMD
D1 RED
R41 DNP(0R)
R185 390R 1%
C176
10uF
D9
(replaced with 0R-1206
- see User Guide)
L1 2.2uH
R15
100K
R11
DNP(11K 1%)
U2 ACT8945AQJ405-T
CHGIN
33
ACIN
21
LBI
20
ISET
23
REFBP
1
CHGLEV
22
nRSTO
11
nIRQ
12
nPBSTAT
13
nLBO
19
SDA
27
SCL
26
VSEL
25
PWRHLD
10
GNDA
3
PWREN
18
GNDP12
37
GNDP3
14
EXPAD
41
VSYS1
31
VSYS2
32
VP1
39
VP2
35
VP3
16
INL
6
NC1
40
nSTAT
28
BAT1
29
BAT2
30
TH
24
SW1
38
OUT1
2
SW2
36
OUT2
34
SW3
15
OUT3
17
OUT4
4
OUT5
5
OUT6
8
OUT7
7
nPBIN
9
(See note 1)
12
SAMA5D2 Xplained Ultra [USER GUIDE]
Atmel-44028B-ATARM-SAMA5D2-Xplained-Ultra-User Guide_02-Oct-15
5.3.2.4 Power Boost 5V
To generate a true 5V voltage from the PMIC output (4.8V typical), a FAN48610 low-power boost regulator is
integrated into the design. This feeds the 5V USB host and the 5V LCD.
Figure 5-4. Power Boost 5V
5.3.2.5 Input Power Options
There are several power options for the SAMA5D2-XULT board.
The USB-powered operation is the default configuration. It comes from the USB device port connected to a PC or
a 5V DC supply. The USB supply is sufficient to power the board in most applications. It is important to note that
when the USB supply is used, the USB-B Host port has limited power. If USB Host port is required for the
application, it is recommended that an external DC supply be used.
Figure 5-5 provides the schematics of power options.
Figure 5-5. Input Powering Scheme
Note: USB-powered operation eliminates additional wires and batteries. It is the preferred mode of operation for
any project that requires only a 5V source at up to 500 mA.
5.3.2.6 Battery Supply Source
The ACT8945A features an advanced battery charger that incorporates the ActivePath architecture for system
power selection. This combination of circuits provides a complete, advanced battery-management system that
automatically selects the best available input supply, manages charge current to ensure system power availability,
and provides a complete, high accuracy (±0.5%), thermally regulated, full-featured single-cell linear Li+ charger.
The ActivePath circuitry monitors the state of the input supply, the battery, and the system, and automatically
reconfigures itself to optimize the power system. If a valid input supply is present, ActivePath powers the system
from the input while charging the battery in parallel. This allows the battery to charge as quickly as possible, while
supplying the system. If a valid input supply is not present, ActivePath powers the system from the battery. Finally,
if the input is present and the system current requirement exceeds the capability of the input supply, ActivePath
allows system power to be drawn from both the battery and the input supply.
VSYS_5V VDDB_5V
C180
10uF
U22
FAN48610
VIN
A3
SW1
B1
SW2
B2
EN
B3
PGND1
C1
VOUT2
A2
VOUT1
A1
AGND
C3
PGND2
C2
L27
0.47uH
C181
22uF
R34510K
VDD_5V_IN
USBA_VBUS_5V[10]
EDBG_USB_VBUS_5V[14]
C60
10uF
C59
10uF
C58
100nF
JP8
Header 1X2
1
2
U12
TPS2113
IN1
8
VSNS
3
EN
2
IN2
6
GND
5
ILIM
4
OUT
7
STAT
1
R187 10K
JPR8
Jumper
R186 10K
R185 390R 1%
SAMA5D2 Xplained Ultra [USER GUIDE]
Atmel-44028B-ATARM-SAMA5D2-Xplained-Ultra-User Guide_02-Oct-15
13
Figure 5-6. Battery Powering Scheme
Charger Input Interrupts
In order to ease input supply detection and eliminate the size and cost of external detection circuitry, the charger
has the ability to generate interrupts based upon the status of the input supply. This function is capable of
generating an interrupt when the input is connected, disconnected, or both, when the charger state machine
transitions.
Charge Status Indicator
The charger provides a charge-status indicator output, nSTAT. nSTAT is an open-drain output which sinks current
when the charger is in an active-charging state, and is high-Z otherwise. nSTAT features an internal 8 mA current
limit, and is capable of directly driving a LED (D1).
Precision Voltage Detector
The LBI input connects to one input of a precision voltage comparator, which can be used to monitor a system
voltage such as the battery voltage. An external resistive-divider network can be used to set voltage monitoring
thresholds. The output of the comparator is present at the nLBO open-drain output and connected to the led red
D1.
Table 5-3. PIOs Used to Control the Battery Charger
PIO Function
PA12 CHGLEV: Charge Current Selection Input
PB13
nIRQ: Open-Drain Interrupt Output. nIRQ is asserted any time an unmasked fault condition exists or a charger
interrupt occurs.
PC8
nLBO: Low Battery Indicator Output. nLBO is asserted low whenever the voltage at LBI is lower than1.2V; it is high-
Z otherwise.
nPBSTAT
VBAT
VBAT
VSYS_5V
VSYS_5V
VSYS_5V
VDD_3V3
PMIC_CHGLEV_PA12[7]
PMIC_IRQ_PB13[7]
PMIC_TWD0_PD21[8]
PMIC_TWCK0_PD22[8]
NRST[9,10,12,14,15]
PMIC_LBO/EXP_PC8[8,15]
C19
4.7uF
R17 100R 1%
R30 0R
J3
1X3Pin
1
2
3
R26
DNP(8.2K 1%)
R16 100R 1%
R710K
R27
2.43K 1%
R44 100R 1%
C7
DNP(1nF)
R610K
R20 100R 1%
C166
47nF
J4
DNP(Header 1X2 2.00MM)
1
2
C164
10uF
C163
10uF
C167
100nF
D1 RED
R41 DNP(0R)
C176
10uF
U2 ACT8945AQJ405-T
CHGIN
33
ACIN
21
LBI
20
ISET
23
REFBP
1
CHGLEV
22
nRSTO
11
nIRQ
12
nPBSTAT
13
nLBO
19
SDA
27
SCL
26
VSEL
25
VSYS1
31
VSYS2
32
VP1
39
VP2
35
VP3
16
INL
6
NC1
40
nSTAT
28
BAT1
29
BAT2
30
TH
24
SW1
38
OUT1
2
SW2
36
OUT2
34
SW3
15
OUT3
17
14
SAMA5D2 Xplained Ultra [USER GUIDE]
Atmel-44028B-ATARM-SAMA5D2-Xplained-Ultra-User Guide_02-Oct-15
Figure 5-7. Battery Connector J3 and Optional J4
5.3.2.7 Backup Power Supply
The SAMA5D2-XULT board requires a power source in order to permanently power the backup part of the
SAMA5D2 device (refer to SAMA5D2 Series datasheet). A super capacitor sustains such permanent power to
VDDBU when all system power sources are off.
Figure 5-8. VDDBU Powering Scheme Option
5.3.2.8 Power Supply Control
In the ACT8945A, three DC-DC converters (1.8V, 1.2V, 3.3V) and two LDO outputs are available.
All ACT8945A outputs can be controlled by the TWI interface through software.
Table 5-4. Battery J3 Signal Descriptions
Pin Mnemonic Signal Description
1 VBAT Battery I/O (exploitation and charging). Connect this pin directly to the battery anode (+ terminal)
2 GND Common ground
3TH
Temperature Sensing Input. Connect to battery thermistor. TH is pulled up with a 102 μA (typical)
current internally.
R18
R11
R24
C1
C3
TP3
C2
R17
R16
R15
R14
Q1
C8
R9
R8
Q2
C9
R10
R23
C5
C6
R5
R1
TP1 TP2
J1
R27
R22
R21
R7
R6
C7
C11
R12
R25
U1
C4
JP1
BP1
C12
L2
R35
R31
R32
R34
R33
R39
R36
R37
R38
J2
R28
J3
R26
R20
R19
L1
C13
L3
Q3
C10
R13
C14
R29
R2
R3
R4
L4
J5
C18
C16
R48
R45
R47
JP2
R40
R42
J4
R30
R41
D1
U2
C17
C20
TP5
Y1
D4
R46
D3
C15
R43
TP4
Q4
C21
J6
R64
U3
R61
R60
R49
C25
D2
R44
C19
C22
L6
L5
TP6
JP3
C24
R59
C35
C34
R70
R69
R68
R67
C36
C31
C28
C29
C30
C27
JP4
C37
TP7
C23
R63
C33
C26
Q5
Y2
R66
R65
J9
J8
C38
R58
R57
R56
R55
R54
R53
C39
R52
R51
R50
R71
R62
C32
R73
R72
J17
R81
R80
R79
R78
R77
R76
Y3
L10
J7
L7
L8
L9
R74
J11
C42
R123
R105
R100
C41
C40
R96
R95
R94
R93
R92
R91
R90
R89
R88
R87
R86
R85
R84
R83
R82
JP5
R75
J10
J13
J12
C43
R103
R122
R121
R120
R119
R118
R117
R116
R115
R114
R113
R112
R111
R110
R109
R108
R124
R104
R99
R130
C44
R129
C45
R131 L12
L11
J18
R137
R136
R135
R134
R133
R132
JP6
C46
Y4
R138
C47
TP8
R102R101
79R89R
U5
J14
J19
R152
R146
C51
R143R142
R141R140
R139
C48
R128R127
R126R125
R107R106
U4
C50
C49
L13
U7
J15
R154
R151
R150
R149
R148
R147
R145
R144
U6
R153
U8
R158
R155
C52
J16
R163
R161
R159
R156
R162
R160
R157
BP2
U9
C53
U10
R169
R167
R165
R164
U11
R177
R175
R173
R171
R182
R181
C55
R180
C54
R179
R178
J22
R172
R170
R168
R166
JP7
L14
C56
J20
BP3
J21
R176
R174
J23
J24
JP8
C60
C59
R184
R183
C57
JP9
J26
J25
C58
42
3
42
3
4
1
3
4
2
3
2
D22
SCL1
F3_RXD
SDA1
F0_RXD
F3_TXD
F0_TXD
F4_RXD
F4_TXD
GND
AREF
SDA0
SCL0
A5-USB-A
D23
V5V5
8
10
9
12
11
13
BOOT_DIS
21
19
20
17
18
XPRO EXT2
16
14
15
1
0
3
2
4
5
6
7
XPRO EXT1
XPRO POWER
VDD_5V_IN
F1_TXD
F1_RXD
WWW.ATMEL.COM
D51
D49
D50
D48
PIOBU
A5-JTAGEDBG-JTAG
D47
D46
EDBG-USB
SDMMC1
ISC
D45
D43
D44
D42
DIGITAL
VDDBU
D41
D40
B
B
D39
D37
D38
D36
HSIC
A
WAKE UP
D35
D33
D34
D32
SDMMC0
D31
D30
RESET
D29
D27
D28
D26
VDDIODDR
D25
D24
D53
GND
GND
D52
A
A5-USB-B
R
CANTX1
CANRX1
VDD_3V3
CANRX0
CANTX0
VBAT
STAT
ETH
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
NC
GND
GND
5V
3V3
RST
3V3
CLASS D
TM
VDDCORE
POWER
3.3V LEVELS
RTS GND
RXD VCCTXD
CTS
EDBG_DIS
DEBUG
PB_USER
DEBUG_DIS
LCD
Pin1
VBAT
RGB LED
VDD_3V3_LP
Populate R if
no Super Cap
(Super)-Capacitor
energy storage
VDDBU
VDD_3V3
D6
BAT54C
3
1
2
C46
100nF
C44
DNP(1uF)
+
C42
0.2F/3.3V
R139
DNP(2.2K)
JPR6
Jumper
D5
RB160M-60TR
JP6
Header 1X2
1
2
R280 100R 1%
SAMA5D2 Xplained Ultra [USER GUIDE]
Atmel-44028B-ATARM-SAMA5D2-Xplained-Ultra-User Guide_02-Oct-15
15
The three DC-DC outputs can be enabled or disabled by the SAMA5D2 SHDN output:
SHDN = 0: The DC-DC output is disabled.
SHDN = 1: The DC-DC output is enabled.
Two push buttons are also available:
Wakeup push button: When pressed, the ACT8945A power outputs are restarted if the ACT8945A is in
shutdown mode.
Reset push button: When pressed, the ACT8945A transfers the reset signal to the MPU.
5.3.3 Reset Circuitry
The reset sources for SAMA5D2-XULT board are:
Power-on reset from the power management unit (PMIC)
Push button reset BP3
External reset from Arduino connectors
JTAG or EDBG reset from an in-circuit emulator
Figure 5-9. Reset/Wakeup and Shutdown Control
5.3.4 Clock Circuitry
The SAMA5D2-XULT board includes four clock sources:
Two clocks are alternatives for the SAMA5D2 processor (12 MHz, 32 kHz)
One crystal oscillator used for the Ethernet RMII chip (25 MHz)
One crystal oscillator used for the EDBG (12 MHz)
Figure 5-10. Clock Circuitry
WAKE UP RESET
VSYS_5V
VSYS_5V
VSYS_5V
SHDN[9]
R30 0R
R14 49.9K 1%
Q2
BSS138
1
3
2
R12
100K
C8
100nF
R9 1K C10 100nF
TP11
SMD
BP3Tact Switch
R19
0R
R8
68K
R13
49.9K 1%
R20 100R 1%
Q1
BSS138
1
3
2
BP2Tact Switch
Q3
BSS138
1
3
2
TP14
SMD
R41 DNP(0R)
R15
100K
nPBSTAT
nLBO
19
SDA
27
SCL
26
VSEL
25
PWRHLD
10
GNDA
3
PWREN
18
GNDP12
37
GNDP3
14
EXPAD
41
SW2
OUT2
34
SW3
15
OUT3
17
OUT4
4
OUT5
5
OUT6
8
OUT7
7
nPBIN
9
ETH_XI
ETH_XO
C34 22pF
C35
22pF
Y2
25MHz CL=20pF
1
23
4
R68
DNP(1M)
XOUT32
XIN32
XIN
XOUT
R109
DNP(1M)
R146 DNP(1M)
C40
22pF
C45
27pF
C41
22pF
Y4
12MHz CL=15pF
1
4
3
2
C47
27pF
Y3
32.768KHz CL=12.5pF
1
23
4
16
SAMA5D2 Xplained Ultra [USER GUIDE]
Atmel-44028B-ATARM-SAMA5D2-Xplained-Ultra-User Guide_02-Oct-15
5.3.5 Memory
5.3.5.1 Memory Organization
The SAMA5D2 features a DDR/SDR memory interface and an External Bus Interface (EBI) to permit interfacing to
a wide range of external memories and to almost any kind of parallel peripheral.
This section describes the memory devices that equip the SAMA5D2-XULT board.
5.3.5.2 DDR3/SDRAM
Two DDR3L/SDRAM (MT41H128M16JT-125-K - 2 Gbit = 16 Mbit x 16 x 8 banks) are used as main system
memory and totalling 4 Gbit of SDRAM on the board. The memory bus is 32 bits wide and operates with a
frequency of up to 166 MHz.
Figure 5-11. DDR3L
DDR_VREF
DDR_D0
DDR_D1
DDR_D2
DDR_D3
DDR_D4
DDR_D5
DDR_D6
DDR_D7
DDR_D8
DDR_D9
DDR_D10
DDR_D11
DDR_D12
DDR_D13
DDR_D14
DDR_D15
DDR_D16
DDR_D17
DDR_D18
DDR_D19
DDR_D20
DDR_D21
DDR_D22
DDR_D23
DDR_D24
DDR_D25
DDR_D26
DDR_D27
DDR_D28
DDR_D29
DDR_D30
DDR_D31
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_BA0
DDR_BA1
DDR_BA2
DDR_BA0
DDR_BA1
DDR_BA2
DDR_RESETN DDR_RESETN
DDR_CLK+
DDR_CLK-
DDR_CKE
DDR_CS
DDR_RAS
DDR_CAS
DDR_WE
DDR_CLK+
DDR_CLK-
DDR_CKE
DDR_CS
DDR_RAS
DDR_CAS
DDR_WE
DDR_DQS0-
DDR_DQS0+
DDR_DQS1-
DDR_DQS1+
DDR_DQS2+
DDR_DQS2-
DDR_DQS3-
DDR_DQS3+
DDR_DQM1
DDR_DQM0
DDR_DQM3
DDR_DQM2
DDR_VREF DDR_VREF
VDD_1V35
VDD_1V35
VDD_1V35
VDD_1V35
VDD_1V35
VDD_1V35
VDDIODDR
L14 10uH_150mA
C56
4.7uF
C83
4.7uF
R178 0R R258 0R
R180
6.8K 1%
R179 DNP(1K)
C55
100nF
U8
MT41K128M16JT-125:K
CK
J7
CK#
K7
CKE
K9
CS#
L2
RAS#
J3
CAS#
K3
WE#
L3
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC#
N7
A13
T3
A14
T7
BA0
M2
BA1
N8
BA2
M3
DQ0
E3
DQ1
F7
DQ2
F2
DQ3
F8
DQ4
H3
DQ5
H8
DQ6
G2
DQ7
H7
ODT
K1
VSS1
A9
VSS2
B3
VSS3
E1
VSS4
G8
VSSQ4
D8
VSSQ3
D1
VSSQ2
B9
VSSQ1
B1
VSSQ5
E2
VDDQ1
A1
VDDQ2
A8
VDDQ3
C1
VDDQ4
C9
VDDQ5
D2
VDD1
B2
VDD2
G7
UDQS#
B7
UDM
D3
LDM
E7
LDQS#
G3
UDQS
C7
LDQS
F3
DQ8
D7
DQ10
C8
DQ11
C2
DQ14
B8
DQ12
A7
DQ15
A3
DQ13
A2
VDD9
D9
VSSQ6
E8
VDDQ6
E9
VDDQ7
F1
VSSQ7
F9
VSSQ8
G1
VSSQ9
G9
VREFDQ
H1
VDDQ8
H2
VDDQ9
H9
NC1
J1
NC2
J9
VSS5
J2
VSS6
J8
VDD4
K2
VDD5
K8
NC3
L1
ZQ
L8
NC4
L9
VSS7
M1
A15
M7
VREFCA
M8
VSS8
M9
VDD6
N1
VDD7
N9
VSS9
P1
VSS10
P9
VDD8
R1
VDD3
R9
VSS11
T1
RESET#
T2
VSS12
T9
DQ9
C3
C121
100nF
U4
MT41K128M16JT-125:K
CK
J7
CK#
K7
CKE
K9
CS#
L2
RAS#
J3
CAS#
K3
WE#
L3
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC#
N7
A13
T3
A14
T7
BA0
M2
BA1
N8
BA2
M3
DQ0
E3
DQ1
F7
DQ2
F2
DQ3
F8
DQ4
H3
DQ5
H8
DQ6
G2
DQ7
H7
ODT
K1
VSS1
A9
VSS2
B3
VSS3
E1
VSS4
G8
VSSQ4
D8
VSSQ3
D1
VSSQ2
B9
VSSQ1
B1
VSSQ5
E2
VDDQ1
A1
VDDQ2
A8
VDDQ3
C1
VDDQ4
C9
VDDQ5
D2
VDD1
B2
VDD2
G7
UDQS#
B7
UDM
D3
LDM
E7
LDQS#
G3
UDQS
C7
LDQS
F3
DQ8
D7
DQ10
C8
DQ11
C2
DQ14
B8
DQ12
A7
DQ15
A3
DQ13
A2
VDD9
D9
VSSQ6
E8
VDDQ6
E9
VDDQ7
F1
VSSQ7
F9
VSSQ8
G1
VSSQ9
G9
VREFDQ
H1
VDDQ8
H2
VDDQ9
H9
NC1
J1
NC2
J9
VSS5
J2
VSS6
J8
VDD4
K2
VDD5
K8
NC3
L1
ZQ
L8
NC4
L9
VSS7
M1
A15
M7
VREFCA
M8
VSS8
M9
VDD6
N1
VDD7
N9
VSS9
P1
VSS10
P9
VDD8
R1
VDD3
R9
VSS11
T1
RESET#
T2
VSS12
T9
DQ9
C3
C72
100nF
R254 DNP(1K)
C91
100nF
R238
240R 1%
C54
100nF
R124
240R 1%
C145
100nF
R182
1R 1%
R181
6.8K 1%
SAMA5D2 Xplained Ultra [USER GUIDE]
Atmel-44028B-ATARM-SAMA5D2-Xplained-Ultra-User Guide_02-Oct-15
17
5.3.5.3 DDR_CAL Analog Input
One specific analog input, DDR_CAL, is used to calibrate all DDR I/Os.
Figure 5-12. DDR Signals and CAL Analog Input
DDR_D0
DDR_D1
DDR_D2
DDR_D3
DDR_D4
DDR_D5
DDR_D6
DDR_D7
DDR_D8
DDR_D9
DDR_D10
DDR_D11
DDR_D12
DDR_D13
DDR_D14
DDR_D15
DDR_D16
DDR_D17
DDR_D18
DDR_D19
DDR_D20
DDR_D21
DDR_D22
DDR_D23
DDR_D24
DDR_D25
DDR_D26
DDR_D27
DDR_D28
DDR_D29
DDR_D30
DDR_D31
DDR_DQM0
DDR_DQM1
DDR_DQM2
DDR_DQM3
DDR_DQS0+
DDR_DQS0-
DDR_DQS1+
DDR_DQS1-
DDR_DQS2+
DDR_DQS2-
DDR_DQS3+
DDR_DQS3-
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_BA0
DDR_BA1
DDR_RAS
DDR_CAS
DDR_BA2
DDR_CS
DDR_WE
DDR_VREF
DDR_RESETN
DDR_CLK+
DDR_CLK-
DDR_CKE
VDD_1V35
R242
100K
R250
23.2K 1%
R243
100K
C106
22pF
SAMA5D27-CN
U6E
DDR_A0
F12
DDR_A1
C17
DDR_A10
C15
DDR_A11
A16
DDR_A12
A17
DDR_A13
G11
DDR_A2
B17
DDR_A3
B16
DDR_A4
C16
DDR_A5
G14
DDR_A6
F14
DDR_A7
F11
DDR_A8
C14
DDR_A9
D13
DDR_BA0
H12
DDR_BA1
H13
DDR_BA2
F17
DDR_CAL
E13
DDR_CAS
G12
DDR_CKE
F16
DDR_CLK
E17
DDR_CLKN
D17
DDR_CS
G13
DDR_D0
B12
DDR_D1
A12
DDR_D10
H17
DDR_D11
K17
DDR_D12
K16
DDR_D13
J13
DDR_D14
K14
DDR_D15
K15
DDR_D16
B8
DDR_D17
B9
DDR_D18
C9
DDR_D19
A9
DDR_D2
C12
DDR_D20
A10
DDR_D21
D10
DDR_D22
B11
DDR_D23
A11
DDR_D24
J12
DDR_D25
H10
DDR_D26
J11
DDR_D27
K11
DDR_D28
L13
DDR_D29
L11
DDR_D3
A13
DDR_D30
L12
DDR_D31
M17
DDR_D4
A14
DDR_D5
C13
DDR_D6
A15
DDR_D7
B15
DDR_D8
G17
DDR_D9
G16
DDR_DQM0
C11
DDR_DQM1
G15
DDR_DQM2
C8
DDR_DQM3
H11
DDR_DQS0
B13
DDR_DQS1
J17
DDR_DQS2
C10
DDR_DQS3
L17
DDR_DQSN0
B14
DDR_DQSN1
J16
DDR_DQSN2
B10
DDR_DQSN3
L16
DDR_RAS
F13
DDR_RESETN
E16
DDR_VREFCM
D16
DDR_VREFB0
H16
DDR_WE
F15
C100
100nF
C99
100nF
18
SAMA5D2 Xplained Ultra [USER GUIDE]
Atmel-44028B-ATARM-SAMA5D2-Xplained-Ultra-User Guide_02-Oct-15
5.3.5.4 eMMC
The Secure Digital Multimedia Card (SDMMC) Controller supports the Embedded MultiMedia Card (e.MMC)
Specification V4.41, the SD Memory Card Specification V3.0, and the SDIO V3.0 specification. It is compliant with
the SD Host Controller Standard V3.0 specification
One MTFC4GLDEA 4 GB eMMC is connected to the processor through the SDMMC0 port.
Figure 5-13. eMMC
Table 5-5. SDMMC Reference Documents
Name Link
SD Host Controller Simplified Specification V3.00 www.sdcard.org
SDIO Simplified Specification V3.00 www.sdcard.org
Physical Layer Simplified Specification V3.01 www.sdcard.org
Embedded MultiMedia Card (e.MMC) Electrical Standard 4.51 www.jedec.org
(3V3 or 1V8)
47K pull down on SDHC0_CMD_PA1 close to MPU.
IN=0: S1 Closed
IN=1: S2 Closed
(3V3)
Impedance match of
CLK/CMD/DAT[7:0] 50R
39R on SDHC0_CK_PA0 close to MPU.
(3V3 or 1V8)
VDDSDHC
VDDSDHC
VDDSDHC
VDDSDHC1V8 VDDSDHC
VDD_3V3
VDD_3V3
VDD_3V3
VDD_3V3
SDHC0_DAT0_PA2[7]
SDHC0_DAT1_PA3[7]
SDHC0_DAT2_PA4[7]
SDHC0_DAT3_PA5[7]
SDHC0_DAT4_PA6[7]
SDHC0_DAT5_PA7[7]
SDHC0_DAT6_PA8[7]
SDHC0_DAT7_PA9[7]
SDHC0_CMD_PA1[7]
SDHC0_CK_PA0[7]
SDHC0_RSTN_PA10[7]
SDHC0_VDDSEL_PA11[7]
R255DNP(47K)
C81
100nF
R23247K
R14947K
U13
ADG849
S2
6
S1
4
IN
1
D
5
VDD
2
GND
3
U11 MTFC4GLDEA-0M WT
NC11
A1
NC4
A2
DAT0
A3
DAT1
A4
DAT2
A5
NC5
A6
NC6
A7
NC7
A8
NC18
A9
NC95
A10
NC94
A11
NC93
A12
NC92
A13
NC91
A14
NC90
B1
DAT3
B2
DAT4
B3
DAT5
B4
DAT6
B5
DAT7
B6
NC89
B7
NC74
B8
NC53
B9
NC52
B10
NC51
B11
NC50
B12
NC49
B13
NC19
B14
NC34
C1
VDDI
C2
NC33
C3
VSSQ4
C4
NC32
C5
VCCQ4
C6
NC31
C7
NC30
C8
NC29
C9
NC25
C10
NC23
C11
NC22
C12
NC21
C13
NC20
C14
NC48
D1
NC46
D2
NC39
D3
NC38
D4
NC37
D12
NC36
D13
NC35
D14
NC1
E1
NC2
E2
NC3
E3
VCC3
E6
VSS2
E7
VSS5
N5
NC8
E8
NC9
E9
NC10
E10
NC12
E12
NC13
E13
NC14
E14
NC15
F1
NC16
F2
NC17
F3
VCC2
F5
NC24
F10
NC26
F12
NC27
F13
NC28
F14
NC88
G1
NC81
G2
VSS1
G5
NC78
G10
NC40
G12
NC41
G13
NC42
G14
NC79
G3
NC43
H1
NC44
H2
NC45
H3
VSS3
H10
NC54
H12
NC55
H13
NC56
H14
NC47
H5
NC57
J1
NC58
J2
NC59
J3
NC60
J5
NC69
J13
NC70
J14
NC71
K1
NC72
K2
NC73
K3
NC77
K7
VSS4
K8
VCC1
K9
NC80
K10
NC82
K12
NC83
K13
NC84
K14
NC85
L1
NC86
L2
NC87
L3
NC96
L12
NC97
L13
NC98
L14
NC99
M1
NC100
M2
NC101
M3
VCCQ5
M4
CMD
M5
CLK
M6
NC105
M7
NC106
M8
NC107
M9
NC108
M10
NC109
M11
NC110
M12
NC111
M13
NC112
M14
NC113
N1
VSSQ1
N2
NC115
N3
VCCQ3
N4
NC117
J12
NC118
N7
NC119
N8
NC120
N9
NC75
N10
NC76
N11
NC68
N12
NC67
N13
NC66
N14
NC65
P1
NC64
P2
VCCQ1
P3
VSSQ3
P4
VCCQ2
P5
VSSQ2
P6
NC63
P7
NC61
P8
NC62
P9
NC114
P10
NC104
P11
NC103
P12
NC102
P13
NC116
P14
RST
K5
VCC0
J10
NC121
E5
NC122
N6
NC123
K6
R235
DNP(47K)
R225
10K
R14247K
R211 0R
C79
100nF
R23747K
R212 DNP(0R)
R14447K
R14747K
R140 39R
C69
100nF
C61
2.2uF
R23447K
C85
1uF
R210 DNP(0R)
R15147K
C73
2.2uF
R23647K
C86
100nF
R23347K
SAMA5D2 Xplained Ultra [USER GUIDE]
Atmel-44028B-ATARM-SAMA5D2-Xplained-Ultra-User Guide_02-Oct-15
19
5.3.5.5 CS Disable
The SAMA5D2 device boots according to the following sequence:
1. SD CARD connected on SDHC1
2. DataFlash connected on NPCS0 SPI0
3. Optional QSPI flash connected on QSPI0 QSPI_CS0
4. eMMC connected to SDHC0
In this sequence, the first device found with bootable contents is selected as the boot source. The others are
disregarded.
On-board jumper (JP9) controls the selection (CS#) of the on-board bootable memory components (eMMC and
Serial DataFlash) using a non-inverting 3-state buffer.
Figure 5-14. CS Disable
The rule of operation is:
JP9 = OFF (default) → enable normal boot from eMMC or serial Flash if mounted
JP9 = ON → booting from optional serial DataFlash or eMMC is disabled
Refer to the SAMA5D2 Series datasheet for more information on standard boot strategies and sequencing.
20
SAMA5D2 Xplained Ultra [USER GUIDE]
Atmel-44028B-ATARM-SAMA5D2-Xplained-Ultra-User Guide_02-Oct-15
5.3.6 Additional Memories
5.3.6.1 Serial Data Flash
The SAMA5D2 provides two high-speed Serial Peripheral Interface (SPI) controllers. One port is used to interface
with the on-board serial DataFlash.
The four main signals used in the SPI are Clock, Data In, Data Out, and Chip Select. The SPI is a serial interface
similar to the I
2
C bus interface but with three main differences:
It operates at a higher speed.
Transmit and receive data lines are separate.
Device access is chip select-based instead of address-based.
Figure 5-15. Serial DataFlash
5.3.6.2 QSPI Serial Flash
The SAMA5D2 provides two Quad Serial Peripheral Interfaces (QSPI). One port is used to interface with the optional
on-board QSPI serial DataFlash.
The Quad SPI Interface (QSPI) is a synchronous serial data link that provides communication with external
devices in Master mode.
The QSPI can be used in SPI mode to interface to serial peripherals (such as ADCs, DACs, LCD controllers, CAN
controllers and sensors), or in Serial Memory mode to interface to serial Flash memories.
The QSPI allows the system to execute code directly from a serial Flash memory (XIP) without code shadowing to
RAM. The serial Flash memory mapping is seen in the system as other memories (ROM, SRAM, DRAM,
embedded Flash memory, etc.).
With the support of the Quad SPI protocol, the QSPI allows the system to use high-performance serial Flash
memories which are small and inexpensive, in place of larger and more expensive parallel Flash memories
Figure 5-16. Optional QSPI Serial DataFlash
SPI0_CS0_PA17
VDD_3V3
SPI0_MOSI_PA15[7]
SPI0_MISO_PA16[7]
SPI0_SPCK_PA14[7]
C53
100nF
U9
AT25DF321A
HOLD
7
GND
4
VCC
8
CS
1
SCK
6
SI
5
SO
2
WP
3
QSPI0_CS
VDD_3V3
QSPI0_SCK_PA22 [7]
QSPI0_IO0_PA24[7]
QSPI0_IO1_PA25[7]
QSPI0_IO2_PA26[7]
QSPI0_IO3_PA27[7]
C52
100nF
U10
DNP(N25Q128A13ESE40F)
DQ0
5
DQ1
2
W#/VPP/DQ2
3
HOLD#/DQ3
7
VCC
8
S#
1
C
6
Vss
4
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Atmel SAMA5D2-XULT User manual

Atmel
Brand
Atmel
Model
SAMA5D2-XULT
Type
User manual
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