Compaq Deskpro EP a/C466/810e Technical Reference Manual

Technical

Reference

Guide

For the

Compaq Deskpro EP Series Personal Computers

This hardcopy is designed to be placed into a standard 3-ring binder. Provided below is a title block that

can be cut out and placed into the slip or taped onto the edge of the binder.

Deskpro EP Series Personal Computers

TRG

Technical Reference Guide

Compaq Deskpro EP Series Personal Computers

First Edition – April 1998

i

NOTICE

The information in this document is subject to change without notice.

COMPAQ COMPUTER CORPORATION SHALL NOT BE LIABLE FOR TECHNICAL OR

EDITORIAL ERRORS OR OMISSIONS HEREIN; NOR FOR INCIDENTAL OR

CONSEQUENTIAL DAMAGES RESULTING FROM THE FURNISHING, PERFORMANCE,

OR USE OF THIS MATERIAL. IT IS THE RESPONSIBILITY OF MANUFACTURERS TO

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COMPLY WITH FCC CLASS B EMISSIONS REQUIREMENTS.

This guide contains information protected by copyright. No part of this document may be

photocopied or reproduced in any form without prior written consent from Compaq Computer

Corporation.



1998 Compaq Computer Corporation

Compaq, Deskpro, LTE, Contura, Presario, ProLinea

Registered U.S. Patent and Trademark Office

Product names mentioned in this document may be trademarks and/or registered trademarks of other companies.

“Pentium” and “MMX” are trademarks of Intel Corporation.

“Windows” is a trademark of Microsoft Corporation.

For more information regarding specifications and Compaq-specific parts please contact Compaq

Computer Corporation, Industry Relations Department.

Technical Reference Guide

for

Compaq Deskpro EP Series Personal Computers

First Edition - April 1998

Document Number DSK-107A/0498

Technical Reference Guide

Compaq Deskpro EP Series Personal Computers

First Edition - April 1998

ii

Technical Reference Guide

Compaq Deskpro EP Series Personal Computers

First Edition – April 1998

iii

TABLE OF CONTENTS

CHAPTER 1 INTRODUCTION.............................................................................................................

1.1 ABOUT THIS GUIDE...........................................................................................................1-1

1.1.1 USING THIS GUIDE.....................................................................................................1-1

1.1.2 ADDITIONAL INFORMATION SOURCES..................................................................1-1

1.2 NOTATIONAL CONVENTIONS.......................................................................................... 1-2

1.2.1 VALUES........................................................................................................................1-2

1.2.2 RANGES........................................................................................................................ 1-2

1.2.3 SIGNAL LABELS..........................................................................................................1-2

1.2.4 REGISTER NOTATION AND USAGE .........................................................................1-2

1.2.5 BIT NOTATION............................................................................................................1-2

1.3 COMMON ACRONYMS AND ABBREVIATIONS.............................................................. 1-3

CHAPTER 2 SYSTEM OVERVIEW.....................................................................................................

2.1 INTRODUCTION.................................................................................................................. 2-1

2.2 FEATURES...........................................................................................................................2-2

2.2.1 STANDARD FEATURES..............................................................................................2-2

2.2.2 OPTIONS.......................................................................................................................2-2

2.3 MECHANICAL DESIGN...................................................................................................... 2-3

2.3.1 CABINET LAYOUT......................................................................................................2-3

2.3.2 CHASSIS LAYOUT....................................................................................................... 2-4

2.3.3 SYSTEM BOARD LAYOUT.........................................................................................2-5

2.4 SYSTEM ARCHITECTURE..................................................................................................2-6

2.4.1 PROCESSOR.................................................................................................................2-8

2.4.2 MEMORY...................................................................................................................... 2-8

2.4.3 SUPPORT CHIPSET......................................................................................................2-9

2.4.4 MASS STORAGE.......................................................................................................... 2-9

2.4.5 SERIAL AND PARALLEL INTERFACES....................................................................2-9

2.4.6 UNIVERSAL SERIAL BUS INTERFACE...................................................................2-10

2.4.7 GRAPHICS SUBSYSTEM...........................................................................................2-10

2.5 SPECIFICATIONS.............................................................................................................. 2-11

CHAPTER 3 PROCESSOR/MEMORY SUBSYSTEM........................................................................

3.1 INTRODUCTION.................................................................................................................. 3-1

3.2 66-MH

Z

SLOT 1 PROCESSOR/MEMORY SUBSYSTEM ...................................................3-2

3.2.1 CELERON PROCESSOR...............................................................................................3-3

3.2.2 PENTIUM II PROCESSOR............................................................................................ 3-3

3.2.3 PROCESSOR CHANGING/UPGRADING.....................................................................3-4

3.2.4 SYSTEM MEMORY......................................................................................................3-5

3.2.5 SUBSYSTEM CONFIGURATION.................................................................................3-8

3.3 100-MH

Z

SLOT 1 PROCESSOR/MEMORY SUBSYSTEM..................................................3-9

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First Edition - April 1998

iv

3.3.1 PENTIUM II PROCESSOR.......................................................................................... 3-10

3.3.2 SYSTEM MEMORY.................................................................................................... 3-12

3.3.3 SUBSYSTEM CONFIGURATION...............................................................................3-13

CHAPTER 4 SYSTEM SUPPORT.........................................................................................................

4.1 INTRODUCTION.................................................................................................................. 4-1

4.2 PCI BUS OVERVIEW...........................................................................................................4-2

4.2.1 PCI CONNECTOR.........................................................................................................4-3

4.2.2 PCI BUS MASTER ARBITRATION..............................................................................4-4

4.2.3 PCI BUS TRANSACTIONS...........................................................................................4-5

4.2.4 OPTION ROM MAPPING .............................................................................................4-8

4.2.5 PCI INTERRUPT MAPPING.........................................................................................4-9

4.2.6 PCI POWER MANAGEMENT SUPPORT.....................................................................4-9

4.2.7 PCI CONFIGURATION............................................................................................... 4-10

4.3 AGP BUS OVERVIEW ....................................................................................................... 4-11

4.3.1 BUS TRANSACTIONS................................................................................................ 4-11

4.3.2 AGP CONFIGURATION............................................................................................. 4-14

4.3.3 AGP CONNECTOR..................................................................................................... 4-15

4.4 ISA BUS OVERVIEW.........................................................................................................4-16

4.4.1 ISA CONNECTOR ......................................................................................................4-17

4.4.2 ISA BUS TRANSACTIONS......................................................................................... 4-18

4.4.3 DIRECT MEMORY ACCESS......................................................................................4-20

4.4.4 INTERRUPTS..............................................................................................................4-23

4.4.5 INTERVAL TIMER.....................................................................................................4-27

4.4.6 ISA CONFIGURATION...............................................................................................4-27

4.5 SYSTEM CLOCK DISTRIBUTION.................................................................................... 4-28

4.6 REAL-TIME CLOCK AND CONFIGURATION MEMORY...............................................4-29

4.6.1 CONFIGURATION MEMORY BYTE DEFINITIONS................................................ 4-30

4.7 I/O MAP AND REGISTER ACCESSING............................................................................4-46

4.7.1 SYSTEM I/O MAP ......................................................................................................4-46

4.7.2 82371 SOUTH BRIDGE GPIO CONFIGURATION.....................................................4-47

4.7.3 87309 I/O CONTROLLER CONFIGURATION ........................................................... 4-49

4.8 SYSTEM MANAGEMENT SUPPORT ............................................................................... 4-50

4.8.1 FLASH ROM WRITE PROTECT ................................................................................ 4-50

4.8.2 USER SECURITY........................................................................................................ 4-50

4.8.3 I/O SECURITY............................................................................................................ 4-51

4.8.4 POWER MANAGEMENT........................................................................................... 4-51

CHAPTER 5 INPUT/OUTPUT INTERFACES.....................................................................................

5.1 INTRODUCTION.................................................................................................................. 5-1

5.2 ENHANCED IDE INTERFACE............................................................................................5-1

5.2.1 IDE PROGRAMMING...................................................................................................5-1

5.2.2 IDE CONNECTOR........................................................................................................5-9

5.3 DISKETTE DRIVE INTERFACE........................................................................................5-10

5.3.1 DISKETTE DRIVE PROGRAMMING........................................................................ 5-11

5.3.2 DISKETTE DRIVE CONNECTOR.............................................................................. 5-14

5.4 SERIAL INTERFACE......................................................................................................... 5-15

Technical Reference Guide

Compaq Deskpro EP Series Personal Computers

First Edition – April 1998

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5.4.1 RS-232 INTERFACE ................................................................................................... 5-15

5.4.2 SERIAL INTERFACE PROGRAMMING....................................................................5-16

5.5 PARALLEL INTERFACE................................................................................................... 5-21

5.5.1 STANDARD PARALLEL PORT MODE..................................................................... 5-21

5.5.2 ENHANCED PARALLEL PORT MODE..................................................................... 5-22

5.5.3 EXTENDED CAPABILITIES PORT MODE............................................................... 5-22

5.5.4 PARALLEL INTERFACE PROGRAMMING.............................................................. 5-23

5.5.5 PARALLEL INTERFACE CONNECTOR ...................................................................5-27

5.6 KEYBOARD/POINTING DEVICE INTERFACE ...............................................................5-28

5.6.1 KEYBOARD INTERFACE OPERATION ...................................................................5-28

5.6.2 POINTING DEVICE INTERFACE OPERATION .......................................................5-30

5.6.3 KEYBOARD/POINTING DEVICE INTERFACE PROGRAMMING ......................... 5-30

5.6.4 KEYBOARD/POINTING DFEVICE INTERFACE CONNECTOR.............................. 5-34

5.7 UNIVERSAL SERIAL BUS INTERFACE...........................................................................5-35

5.7.1 USB KEYBOARD CONSIDERATIONS...................................................................... 5-35

5.7.2 USB CONFIGURATION.............................................................................................. 5-35

5.7.3 USB CONTROL........................................................................................................... 5-36

5.7.4 USB CONNECTOR ..................................................................................................... 5-36

CHAPTER 6 POWER AND SIGNAL DISTRIBUTION.......................................................................

6.1 INTRODUCTION.................................................................................................................. 6-1

6.2 POWER SUPPLY ASSEMBLY/CONTROL..........................................................................6-1

6.2.1 POWER SUPPLY ASSEMBLY......................................................................................6-2

6.2.2 POWER CONTROL.......................................................................................................6-3

6.3 POWER DISTRIBUTION...................................................................................................... 6-5

6.3.1 3/5/12 VDC DISTRIBUTION.........................................................................................6-5

6.3.2 LOW VOLTAGE DISTRIBUTION................................................................................6-6

6.4 GENERAL SIGNAL DISTRIBUTION ..................................................................................6-7

CHAPTER 7 BIOS ROM .......................................................................................................................

7.1 INTRODUCTION.................................................................................................................. 7-1

7.2 BOOT FUNCTIONS..............................................................................................................7-2

7.2.1 BOOT BLOCK............................................................................................................... 7-2

7.2.2 QUICKBOOT.................................................................................................................7-2

7.2.3 SILENTBOOT ............................................................................................................... 7-2

7.3 MEMORY DETECTION AND CONFIGURATION..............................................................7-3

7.4 CLIENT MANAGEMENT SUPPORT................................................................................... 7-4

7.4.1 SYSTEM ID/REVISION/SERIAL NO. .......................................................................... 7-6

7.4.2 SYSTEM INFORMATION TABLE...............................................................................7-6

7.4.3 EDID RETRIEVE........................................................................................................ 7-12

7.4.4 DRIVE FAULT PREDICTION.....................................................................................7-12

7.4.5 SYSTEM MAP RETRIEVAL....................................................................................... 7-13

7.4.6 FLASH ROM FUNCTIONS......................................................................................... 7-14

7.4.7 POWER BUTTON FUNCTIONS.................................................................................7-14

7.4.8 ACCESSING CMOS....................................................................................................7-16

Technical Reference Guide

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First Edition - April 1998

vi

7.4.9 ACCESSING CMOS FEATURE BITS......................................................................... 7-16

7.4.10 SECURITY FUNCTIONS............................................................................................ 7-18

7.5 PNP SUPPORT.................................................................................................................... 7-19

7.5.1 SMBIOS....................................................................................................................... 7-20

7.6 POWER MANAGEMENT FUNCTIONS ............................................................................7-21

7.6.1 INDEPENDENT PM SUPPORT .................................................................................. 7-21

7.6.2 ACPI SUPPORT........................................................................................................... 7-21

7.6.3 APM SUPPORT........................................................................................................... 7-22

7.7 USB LEGACY SUPPORT ................................................................................................... 7-24

7.8 BIOS UPGRADING............................................................................................................. 7-24

APPENDIX A ERROR MESSAGES AND CODES...............................................................................

A.1 INTRODUCTION.................................................................................................................A-1

A.2 POWER-ON MESSAGES..................................................................................................... A-1

A.3 BEEP/KEYBOARD LED CODES........................................................................................ A-1

A.4 POWER-ON SELF TEST (POST) MESSAGES.................................................................... A-2

A.5 PROCESSOR ERROR MESSAGES (1

XX

-

XX

) ...................................................................... A-3

A.6 MEMORY ERROR MESSAGES (2

XX

-

XX

)........................................................................... A-4

A.7 KEYBOARD ERROR MESSAGES (30

X

-

XX

)....................................................................... A-4

A.8 PRINTER ERROR MESSAGES (4

XX

-

XX

)............................................................................ A-5

A.9 VIDEO (GRAPHICS) ERROR MESSAGES (5

XX

-

XX

).......................................................... A-5

A.10 DISKETTE DRIVE ERROR MESSAGES (6

XX

-

XX

) ......................................................... A-6

A.11 SERIAL INTERFACE ERROR MESSAGES (11

XX

-

XX

)................................................... A-6

A.12 MODEM COMMUNICATIONS ERROR MESSAGES (12

XX

-

XX

).................................... A-7

A.13 HARD DRIVE ERROR MESSAGES (17

XX

-

XX

)............................................................... A-8

A.14 HARD DRIVE ERROR MESSAGES (19

XX

-

XX

)............................................................... A-9

A.15 VIDEO (GRAPHICS) ERROR MESSAGES (24

XX

-

XX

) .................................................... A-9

A.16 AUDIO ERROR MESSAGES (3206-

XX

)......................................................................... A-10

A.17 NETWORK INTERFACE ERROR MESSAGES (60

XX

-

XX

) ........................................... A-10

A.18 SCSI INTERFACE ERROR MESSAGES (65

XX

-

XX

, 66

XX

-

XX

, 67

XX

-

XX

) ....................... A-11

A.19 POINTING DEVICE INTERFACE ERROR MESSAGES (8601-

XX

).............................. A-11

A.20 CEMM PRIVILEDGED OPS ERROR MESSAGES........................................................ A-12

A.21 CEMM EXCEPTION ERROR MESSAGES ................................................................... A-12

APPENDIX B ASCII CHARACTER SET.............................................................................................

B.1 INTRODUCTION..................................................................................................................B-1

APPENDIX C KEYBOARD...................................................................................................................

C.1 INTRODUCTION..................................................................................................................C-1

C.2 KEYSTROKE PROCESSING................................................................................................C-2

C.2.1 TRANSMISSIONS TO THE SYSTEM ..........................................................................C-3

C.2.2 KEYBOARD LAYOUTS ...............................................................................................C-4

C.2.3 KEYS.............................................................................................................................C-7

C.2.4 KEYBOARD COMMANDS.........................................................................................C-10

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Compaq Deskpro EP Series Personal Computers

First Edition – April 1998

vii

C.2.5 SCAN CODES.............................................................................................................C-10

APPENDIX D AUDIO CARD.................................................................................................................

D.1 INTRODUCTION.................................................................................................................D-1

D.2 FUNCTIONAL DESCRIPTION............................................................................................ D-2

D.2.1 PCM AUDIO PROCESSING......................................................................................... D-4

D.2.2 FM SYNTHESIS AUDIO PROCESSING...................................................................... D-7

D.3 AUDIO CARD PROGRAMMING........................................................................................ D-8

D.3.1 CONFIGURATION....................................................................................................... D-8

D.3.2 CONTROL....................................................................................................................D-9

D.4 SPECIFICATIONS............................................................................................................. D-11

APPENDIX E ATI RAGE IIC GRAPHICS CARD...............................................................................

E.1 INTRODUCTION..................................................................................................................E-1

E.2 FUNCTIONAL DESCRIPTION.............................................................................................E-2

E.2.1 ATI RAGE IIC GRAPHICS CONTROLLER..................................................................E-3

E.3 DISPLAY CONFIGURATIONS ............................................................................................E-4

E.4 PROGRAMMING..................................................................................................................E-5

E.4.1 CONFIGURATION........................................................................................................E-5

E.4.2 CONTROL.....................................................................................................................E-5

E.5 POWER MANAGEMENT.....................................................................................................E-6

E.5.1 MONITOR CONTROL ..................................................................................................E-6

E.5.2 POWER CONSUMPTION .............................................................................................E-6

E.6 CONNECTORS.....................................................................................................................E-7

E.6.2 MONITOR CONNECTOR.............................................................................................E-7

E.6.3 MULTIMEDIA INTERFACE CONNECTOR ................................................................E-8

APPENDIX F ATI RAGE PRO AGP 1X GRAPHICS CARD ..............................................................

F.1 INTRODUCTION..................................................................................................................F-1

F.2 FUNCTIONAL DESCRIPTION.............................................................................................F-2

F.2.1 ATI RAGE PRO TURBO AGP GRAPHICS CONTROLLER.........................................F-3

F.3 DISPLAY MODES................................................................................................................F-4

F.4 PROGRAMMING..................................................................................................................F-5

F.4.1 CONFIGURATION........................................................................................................F-5

F.4.2 CONTROL.....................................................................................................................F-5

F.5 MONITOR POWER MANAGEMENT CONTROL...............................................................F-6

F.6 CONNECTORS.....................................................................................................................F-6

F.6.1 MEMORY EXPANSION CONNECTOR.......................................................................F-6

F.6.2 MONITOR CONNECTOR.............................................................................................F-7

F.6.3 MULTIMEDIA INTERFACE CONNECTOR ................................................................F-8

Technical Reference Guide

Compaq Deskpro EP Series Personal Computers

First Edition - April 1998

viii

APPENDIX G DIAMOND FIRE GRAPHICS CARD...........................................................................

G.1 INTRODUCTION.................................................................................................................G-1

G.2 FUNCTIONAL DESCRIPTION............................................................................................ G-2

G.2.1 SGS nVIDIA RIVA 128 GRAPHICS CONTROLLER................................................... G-3

G.3 DISPLAY MODES............................................................................................................... G-4

G.4 PROGRAMMING................................................................................................................. G-5

G.4.1 CONFIGURATION....................................................................................................... G-5

G.4.2 CONTROL....................................................................................................................G-5

G.5 MONITOR POWER MANAGEMENT CONTROL.............................................................. G-6

G.6 CONNECTORS.................................................................................................................... G-6

G.6.1 MONITOR CONNECTOR............................................................................................ G-7

G.6.2 MEDIA PORT CONNECTOR ...................................................................................... G-8

Technical Reference Guide

Compaq Deskpro EP Series Personal Computers

First Edition – April 1998

ix

LIST OF FIGURES

F

IGURE

2–1. C

OMPAQ

D

ESKPRO

EP P

ERSONAL

C

OMPUTERS WITH

M

ONITOR

..........................................2-1

F

IGURE

2–2. C

ABINET

L

AYOUT

, F

RONT

V

IEW

.......................................................................................2-3

F

IGURE

2–3. C

ABINET

L

AYOUT

, R

EAR

V

IEW

.........................................................................................2-3

F

IGURE

2–4. C

HASSIS

L

AYOUT

, T

OP

V

IEW

............................................................................................2-4

F

IGURE

2–5. S

YSTEM

B

OARD

L

AYOUT

, C

OMPONENT

S

IDE

.....................................................................2-5

F

IGURE

2–6. S

YSTEM

A

RCHITECTURE

, B

LOCK DIAGRAM

........................................................................2-7

F

IGURE

2–7. P

ROCESSOR

A

RCHITECTURAL

C

OMPARISON

D

IAGRAM

........................................................2-8

F

IGURE

3–1. 66-MH

Z

S

LOT

1 P

ROCESSOR

/M

EMORY

S

UBSYSTEM

A

RCHITECTURE

...................................3-2

F

IGURE

3–2. C

ELERON

P

ROCESSOR

I

NTERNAL

A

RCHITECTURE

...............................................................3-3

F

IGURE

3–3.

P

ENTIUM

II P

ROCESSOR

I

NTERNAL

A

RCHITECTURE

.............................................................3-3

F

IGURE

3–4. S

YSTEM

M

EMORY

M

AP

.....................................................................................................3-7

F

IGURE

3–5. 100-MH

Z

S

LOT

1 P

ROCESSOR

/M

EMORY

S

UBSYSTEM

A

RCHITECTURE

.................................3-9

F

IGURE

3–6. 350-/400-MH

Z

P

ENTIUM

II P

ROCESSOR

I

NTERNAL

A

RCHITECTURE

.................................. 3-10

F

IGURE

4–1. PCI B

US

D

EVICES AND

F

UNCTIONS

.....................................................................................4-2

F

IGURE

4–2. PCI B

US

C

ONNECTOR

(32-B

IT

T

YPE

).................................................................................4-3

F

IGURE

4–3. T

YPE

0 C

ONFIGURATION

C

YCLE

........................................................................................4-6

F

IGURE

4–4. PCI C

ONFIGURATION

S

PACE

M

AP

......................................................................................4-7

F

IGURE

4–5. AGP 1X D

ATA

T

RANSFER

(P

EAK

T

RANSFER

R

ATE

: 266 MB/

S

)........................................ 4-12

F

IGURE

4–6. AGP 2X D

ATA

T

RANSFER

(P

EAK

T

RANSFER

R

ATE

: 532 MB/

S

)........................................ 4-13

F

IGURE

4–7. AGP B

US

C

ONNECTOR

...................................................................................................4-15

F

IGURE

4–8. ISA B

US

B

LOCK

D

IAGRAM

................................................................................................4-16

F

IGURE

4–9. ISA E

XPANSION

C

ONNECTOR

..........................................................................................4-17

F

IGURE

4–10. M

ASKABLE

I

NTERRUPT

P

ROCESSING

, B

LOCK

D

IAGRAM

.................................................. 4-23

F

IGURE

4–11. C

ONFIGURATION

M

EMORY

M

AP

.................................................................................... 4-29

F

IGURE

5–1. 40-P

IN

IDE C

ONNECTOR

. .................................................................................................5-9

F

IGURE

5–2. 34-P

IN

D

ISKETTE

D

RIVE

C

ONNECTOR

.............................................................................. 5-14

F

IGURE

5–3. S

ERIAL

I

NTERFACE

C

ONNECTOR

(M

ALE

DB-9

AS VIEWED FROM REAR OF CHASSIS

)........... 5-15

F

IGURE

5–4. P

ARALLEL

I

NTERFACE

C

ONNECTOR

(F

EMALE

DB-25

AS VIEWED FROM REAR OF CHASSIS

).. 5-27

F

IGURE

5–5. 8042-T

O

-K

EYBOARD

T

RANSMISSION OF

C

ODE

ED

H

, T

IMING

D

IAGRAM

............................ 5-28

F

IGURE

5–6. K

EYBOARD OR

P

OINTING

D

EVICE

I

NTERFACE

C

ONNECTOR

............................................... 5-34

F

IGURE

5–7. U

NIVERSAL

S

ERIAL

B

US

C

ONNECTOR

(

ONE OF TWO AS VIEWED FROM REAR OF CHASSIS

).....5-36

F

IGURE

6–1. P

OWER

S

UPPLY

A

SSEMBLY AND

A

SSOCIATED

C

IRCUITRY

, B

LOCK

D

IAGRAM

.......................6-1

F

IGURE

6–2. P

OWER

C

ABLE

D

IAGRAM

..................................................................................................6-5

F

IGURE

6–3. L

OW

V

OLTAGE

R

EGULATOR

C

IRCUITRY

, B

LOCK

D

IAGRAM

.................................................6-6

F

IGURE

6–4. G

ENERAL

S

IGNAL

D

ISTRIBUTION

, F

UNCTIONAL

B

LOCK

D

IAGRAM

.......................................6-7

F

IGURE

6–5. F

RONT

P

ANEL

(B

EZEL

) C

ONTROL

/I

NDICATOR

C

ONNECTOR

................................................6-8

F

IGURE

6–6. W

AKE

-O

N

-LAN NIC C

ONNECTOR

....................................................................................6-8

F

IGURE

B–1. ASCII C

HARACTER

S

ET

...................................................................................................B-1

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First Edition - April 1998

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F

IGURE

C–1. K

EYSTROKE

P

ROCESSING

E

LEMENTS

, B

LOCK

D

IAGRAM

....................................................C-2

F

IGURE

C–2. K

EYBOARD

-T

O

-S

YSTEM

T

RANSMISSION OF

C

ODE

58

H

, T

IMING

D

IAGRAM

..........................C-3

F

IGURE

C–3. U.S. E

NGLISH

(101-K

EY

) K

EYBOARD

K

EY

P

OSITIONS

.......................................................C-4

F

IGURE

C–4. N

ATIONAL

(102-K

EY

) K

EYBOARD

K

EY

P

OSITIONS

............................................................C-4

F

IGURE

C–5. U.S. E

NGLISH

W

INDOWS

(101W-K

EY

) K

EYBOARD

K

EY

P

OSITIONS

...................................C-5

F

IGURE

C–6. N

ATIONAL

W

INDOWS

(102W-K

EY

) K

EYBOARD

K

EY

P

OSITIONS

........................................C-5

F

IGURE

C–7. U.S. E

NGLISH

W

INDOWS

(101WE-K

EY

) K

EYBOARD

K

EY

P

OSITIONS

.................................C-6

F

IGURE

C–8. N

ATIONAL

W

INDOWS

(102WE-K

EY

) K

EYBOARD

K

EY

P

OSITIONS

......................................C-6

F

IGURE

C–9. S

CANNER

E

LEMENTS

, B

LOCK

D

IAGRAM

..........................................................................C-14

F

IGURE

C–10. S

CANNER OPERATION

F

LOW

C

HART

..............................................................................C-16

F

IGURE

D–1. A

UDIO

C

ARD

L

AYOUT

..................................................................................................... D-1

F

IGURE

D–2. A

UDIO

C

ARD

B

LOCK

D

IAGRAM

........................................................................................ D-3

F

IGURE

D–3. A

NALOG

S

IGNAL

S

AMPLING

/Q

UANTIZING

........................................................................ D-4

F

IGURE

D–4. DAC O

PERATION

........................................................................................................... D-5

F

IGURE

D–5. A

UDIO

C

ARD

-

TO

-ISA B

US

PCM A

UDIO

D

ATA

F

ORMATS

/ B

YTE

O

RDERING

...................... D-6

F

IGURE

D–6. FM S

YNTHESIS

P

ATCH

.................................................................................................... D-7

F

IGURE

D–7. A

UDIO

C

AR

-

TO

-ISA B

US

FM A

UDIO

D

ATA

F

ORMAT

........................................................ D-7

F

IGURE

E–1. ATI RAGE IIC AGP G

RAPHICS

C

ARD

L

AYOUT

(C

OMPAQ P

/

N

332836-001) ......................... 1

F

IGURE

E–2. ATI RAGE IIC AGP G

RAPHICS

C

ARD

B

LOCK DIAGRAM

...................................................... 2

F

IGURE

E–3. ATI 3D RAGE IIC G

RAPHICS

C

ONTROLLER

I

NTERNAL

A

RCHITECTURE

............................... 3

F

IGURE

E–4. VGA M

ONITOR

C

ONNECTOR

, (F

EMALE

DB-15,

AS VIEWED FROM REAR

)................................. 7

F

IGURE

E–5. M

ULTIMEDIA

I

NTERFACE

C

ONNECTOR

(40-P

IN

H

EADER

P1).................................................. 8

F

IGURE

F–1. ATI RAGE PRO AGP G

RAPHICS

C

ARD

L

AYOUT

(

P

/

N

008061-

XXX

)....................................F-1

F

IGURE

F–2. ATI RAGE PRO AGP G

RAPHICS

C

ARD

B

LOCK DIAGRAM

.................................................F-2

F

IGURE

F–3. ATI 3DR

AGE

P

RO

G

RAPHICS

C

ONTROLLER

I

NTERNAL

A

RCHITECTURE

...............................F-3

F

IGURE

F–4. VGA M

ONITOR

C

ONNECTOR

, (F

EMALE

DB-15,

AS VIEWED FROM REAR

)..............................F-7

F

IGURE

F–5. M

ULTIMEDIA

I

NTERFACE

C

ONNECTOR

(40-P

IN

H

EADER

P1)...............................................F-8

F

IGURE

G–1. D

IAMOND

F

IRE

AGP G

RAPHICS

C

ARD

L

AYOUT

................................................................. G-1

F

IGURE

G–2. D

IAMOND

F

IRE

AGP G

RAPHICS

C

ARD

B

LOCK DIAGRAM

................................................... G-2

F

IGURE

G–3. SGS

N

VIDIA RIVA 128 G

RAPHICS

C

ONTROLLER

I

NTERNAL

A

RCHITECTURE

................... G-3

F

IGURE

G–4. VGA M

ONITOR

C

ONNECTOR

, (F

EMALE

DB-15,

AS VIEWED FROM REAR

). ........................... G-7

F

IGURE

G–5. M

EDIA

P

ORT

C

ONNECTOR

(26-P

IN

H

EADER

P1) ............................................................... G-8

Technical Reference Guide

Compaq Deskpro EP Series Personal Computers

First Edition – April 1998

xi

LIST OF TABLES

T

ABLE

1–1. A

CRONYMS AND

A

BBREVIATIONS

.......................................................................................1-3

T

ABLE

2–1. A

RCHITECTURAL

C

OMPARISON

.............................................................................................2-6

T

ABLE

2–2. S

UPPORT

C

HIPSETS

............................................................................................................2-9

T

ABLE

2–3. G

RAPHICS

S

UBSYSTEM

C

OMPARISON

................................................................................ 2-10

T

ABLE

2–4. E

NVIRONMENTAL

S

PECIFICATIONS

.................................................................................... 2-11

T

ABLE

2–5. E

LECTRICAL

S

PECIFICATIONS

...........................................................................................2-11

T

ABLE

2–6. P

HYSICAL

S

PECIFICATIONS

...............................................................................................2-11

T

ABLE

2–7. D

ISKETTE

D

RIVE

S

PECIFICATIONS

..................................................................................... 2-12

T

ABLE

2–8. 8

X

CD-ROM D

RIVE

S

PECIFICATIONS

................................................................................ 2-12

T

ABLE

2–9. H

ARD

D

RIVE

S

PECIFICATIONS

...........................................................................................2-13

T

ABLE

3–1. P

ROCESSOR

/M

EMORY

A

RCHITECTURAL

C

OMPARISON

...........................................................3-1

T

ABLE

3–2. P

ENTIUM

II COVINGTON P

ROCESSOR

B

US

/C

ORE

S

PEED

S

WITCH

S

ETTINGS

.......................3-4

T

ABLE

3–3. SPD A

DDRESS

M

AP

(SDRAM DIMM).................................................................................3-6

T

ABLE

3–4. H

OST

/PCI B

RIDGE

C

ONFIGURATION

R

EGISTERS

(443EX, F

UNCTION

0) ................................3-8

T

ABLE

3–5. P

ENTIUM

II M

ICROPROCESSOR

B

US

/C

ORE

S

PEED

S

WITCH

S

ETTINGS

.................................. 3-11

T

ABLE

3–6. H

OST

/PCI B

RIDGE

C

ONFIGURATION

R

EGISTERS

(443BX, F

UNCTION

0) .............................. 3-13

T

ABLE

4–1. PCI B

US

C

ONNECTOR

P

INOUT

............................................................................................4-3

T

ABLE

4–2. PCI B

US

M

ASTERING

D

EVICES

...........................................................................................4-4

T

ABLE

4–3. PCI D

EVICE

C

ONFIGURATION

A

CCESS

................................................................................4-6

T

ABLE

4–4. PCI F

UNCTION

C

ONFIGURATION

A

CCES

..............................................................................4-7

T

ABLE

4–5. PCI D

EVICE

I

DENTIFICATION

.............................................................................................4-8

T

ABLE

4–6. PCI/ISA B

RIDGE

C

ONFIGURATION

R

EGISTERS

(82371, F

UNCTION

0).................................. 4-10

T

ABLE

4–7. PCI/AGP B

RIDGE

C

ONFIGURATION

R

EGISTERS

(82371, F

UNCTION

1).................................4-14

T

ABLE

4–8. AGP B

US

C

ONNECTOR

P

INOUT

.........................................................................................4-15

T

ABLE

4–9. ISA E

XPANSION

C

ONNECTOR

P

INOUT

............................................................................... 4-17

T

ABLE

4–10. D

EFAULT

DMA C

HANNEL

A

SSIGNMENTS

....................................................................... 4-20

T

ABLE

4–11. DMA P

AGE

R

EGISTER

A

DDRESSES

................................................................................. 4-21

T

ABLE

4–12. DMA C

ONTROLLER

R

EGISTERS

...................................................................................... 4-22

T

ABLE

4–13. M

ASKABLE

I

NTERRUPT

P

RIORITIES AND

A

SSIGNMENTS

.................................................... 4-24

T

ABLE

4–14. M

ASKABLE

I

NTERRUPT

C

ONTROL

R

EGISTERS

.................................................................. 4-24

T

ABLE

4–15. I

NTERVAL

T

IMER

F

UNCTIONS

.........................................................................................4-27

T

ABLE

4–16. I

NTERVAL

T

IMER

C

ONTROL

R

EGISTERS

........................................................................... 4-27

T

ABLE

4–17. C

LOCK

G

ENERATION AND

D

ISTRIBUTION

........................................................................ 4-28

T

ABLE

4–18. C

ONFIGURATION

M

EMORY

(CMOS) M

AP

....................................................................... 4-30

T

ABLE

4–19. S

YSTEM

I/O M

AP

...........................................................................................................4-46

T

ABLE

4–20. 82371 S

OUTH

B

RIDGE

G

ENERAL

P

URPOSE

I

NPUT

P

ORT

U

TILIZATION

............................... 4-47

T

ABLE

4–21. 82371 S

OUTH

B

RIDGE

G

ENERAL

P

URPOSE

O

UTPUT

P

ORT

U

TILIZATION

............................ 4-48

T

ABLE

4–22. 87309 I/O C

ONTROLLER

P

N

P S

TANDARD

C

ONFIGURATION

R

EGISTERS

.............................. 4-49

T

ABLE

5–1. IDE PCI C

ONFIGURATION

R

EGISTERS

................................................................................5-2

Technical Reference Guide

Compaq Deskpro EP Series Personal Computers

First Edition - April 1998

xii

T

ABLE

5–2. IDE B

US

M

ASTER

C

ONTROL

R

EGISTERS

.............................................................................5-3

T

ABLE

5–3. IDE ATA C

ONTROL

R

EGISTERS

.........................................................................................5-4

T

ABLE

5–4. IDE C

ONTROLLER

C

OMMANDS

..........................................................................................5-7

T

ABLE

5–5. 40-P

IN

IDE C

ONNECTOR

P

INOUT

.......................................................................................5-9

T

ABLE

5–6. D

ISKETTE

D

RIVE

C

ONTROLLER

C

ONFIGURATION

R

EGISTERS

............................................. 5-11

T

ABLE

5–7. D

ISKETTE

D

RIVE

C

ONTROLLER

R

EGISTERS

....................................................................... 5-12

T

ABLE

5–8. 34-P

IN

D

ISKETTE

D

RIVE

C

ONNECTOR

P

INOUT

................................................................... 5-14

T

ABLE

5–9. DB-9 S

ERIAL

C

ONNECTOR

P

INOUT

................................................................................... 5-15

T

ABLE

5–10. S

ERIAL

I

NTERFACE

C

ONFIGURATION

R

EGISTERS

.............................................................. 5-16

T

ABLE

5–11. S

ERIAL

I

NTERFACE

C

ONTROL

R

EGISTERS

........................................................................ 5-17

T

ABLE

5–12. P

ARALLEL

I

NTERFACE

C

ONFIGURATION

R

EGISTERS

......................................................... 5-23

T

ABLE

5–13. P

ARALLEL

I

NTERFACE

C

ONTROL

R

EGISTERS

................................................................... 5-24

T

ABLE

5–14. DB-25 P

ARALLEL

C

ONNECTOR

P

INOUT

.......................................................................... 5-27

T

ABLE

5–15. 8042-T

O

-K

EYBOARD

C

OMMANDS

.................................................................................. 5-29

T

ABLE

5–16. K

EYBOARD

/M

OUSE

I

NTERFACE

C

ONFIGURATION

R

EGISTERS

........................................... 5-30

T

ABLE

5–17. CPU C

OMMANDS

T

O

T

HE

8042...................................................................................... 5-32

T

ABLE

5–18. K

EYBOARD

/P

OINTING

D

EVICE

C

ONNECTOR

P

INOUT

........................................................ 5-34

T

ABLE

5–19. USB I

NTERFACE

C

ONFIGURATION

R

EGISTERS

................................................................. 5-35

T

ABLE

5–20. USB C

ONTROL

R

EGISTERS

.............................................................................................5-36

T

ABLE

5–21.

USB C

ONNECTOR

P

INOUT

..............................................................................................5-36

T

ABLE

6–1. P

OWER

S

UPPLY

A

SSEMBLY

S

PECIFICATIONS

........................................................................6-2

T

ABLE

7–1. P

N

P C

LIENT

M

ANAGEMENT

F

UNCTIONS

(INT15)................................................................7-4

T

ABLE

7–2. P

N

P BIOS F

UNCTIONS

.....................................................................................................7-19

T

ABLE

7–3. APM BIOS F

UNCTIONS

(INT15) ..................................................................................... 7-23

T

ABLE

A–1. P

OWER

-O

N

M

ESSAGES

..................................................................................................... A-1

T

ABLE

A–2. B

EEP

/K

EYBOARD

LED C

ODES

.......................................................................................... A-1

T

ABLE

A–3. P

OWER

-O

N

S

ELF

T

EST

(POST) M

ESSAGES

........................................................................ A-2

T

ABLE

A–4. P

ROCESSOR

E

RROR

M

ESSAGES

......................................................................................... A-3

T

ABLE

A–5. M

EMORY

E

RROR

M

ESSAGES

............................................................................................. A-4

T

ABLE

A–6. K

EYBOARD

E

RROR

M

ESSAGES

.......................................................................................... A-4

T

ABLE

A–7. P

RINTER

E

RROR

M

ESSAGES

.............................................................................................. A-5

T

ABLE

A–8. V

IDEO

(G

RAPHICS

) E

RROR

M

ESSAGES

.............................................................................. A-5

T

ABLE

A–9. D

ISKETTE

D

RIVE

E

RROR

M

ESSAGES

.................................................................................. A-6

T

ABLE

A–10. S

ERIAL

I

NTERFACE

E

RROR

M

ESSAGES

............................................................................. A-6

T

ABLE

A–11. S

ERIAL

I

NTERFACE

E

RROR

M

ESSAGES

............................................................................. A-7

T

ABLE

A–12. H

ARD

D

RIVE

E

RROR

M

ESSAGES

...................................................................................... A-8

T

ABLE

A–13. H

ARD

D

RIVE

E

RROR

M

ESSAGES

...................................................................................... A-9

T

ABLE

A–14. H

ARD

D

RIVE

M

ESSAGES

................................................................................................. A-9

T

ABLE

A–15. A

UDIO

E

RROR

M

ESSAGES

............................................................................................. A-10

T

ABLE

A–16. N

ETWORK

I

NTERFACE

E

RROR

M

ESSAGES

...................................................................... A-10

T

ABLE

A–17. SCSI I

NTERFACE

E

RROR

M

ESSAGES

............................................................................. A-11

T

ABLE

A–18. P

OINTING

D

EVICE

I

NTERFACE

E

RROR

M

ESSAGES

........................................................... A-11

T

ABLE

A–19. CEMM P

RIVILEGED

O

PS

E

RROR

M

ESSAGES

.................................................................. A-12

T

ABLE

A–20. CEMM E

XCEPTION

E

RROR

M

ESSAGES

......................................................................... A-12

Technical Reference Guide

Compaq Deskpro EP Series Personal Computers

First Edition – April 1998

xiii

T

ABLE

C–1. K

EYBOARD

-

TO

-S

YSTEM

C

OMMANDS

...............................................................................C-10

T

ABLE

C–2. K

EYBOARD

S

CAN

C

ODES

.................................................................................................C-11

T

ABLE

C–3. S

CANNER

P

ERFORMANCE

C

HART

.....................................................................................C-17

T

ABLE

C–4. S

CANNER

I/F S

IGNALS

.....................................................................................................C-18

T

ABLE

C–5. S

CANNER

S

PECIFICATIONS

...............................................................................................C-20

T

ABLE

D–1. A

UDIO

M

ODE

D

IFFERENCES

.............................................................................................. D-6

T

ABLE

D–2. A

UDIO

C

ARD

I/O M

AP

..................................................................................................... D-9

T

ABLE

D–3. C

OMPATIBILITY

M

ODE

A

UDIO

M

IXER

C

ONTROL

R

EGISTER

M

APPING

................................... D-9

T

ABLE

D–4. E

XTENDED

M

ODE

A

UDIO

M

IXER

C

ONTROL

R

EGISTER

M

APPING

........................................ D-10

T

ABLE

D–5. FM S

YNTHESIZER

C

ONTROL

R

EGISTER

M

APPING

.............................................................. D-10

T

ABLE

D–6. A

UDIO

C

ARD

S

PECIFICATIONS

........................................................................................ D-11

T

ABLE

E–1. 2D G

RAPHICS

D

ISPLAY

M

ODES

(

W

/EDO RAM)...................................................................... 4

T

ABLE

E–2. 3D G

RAPHICS

D

ISPLAY

M

ODES

............................................................................................... 4

T

ABLE

E–3. ATI RAGE IIC PCI C

ONFIGURATION

S

PACE

R

EGISTERS

....................................................... 5

T

ABLE

E–4. S

TANDARD

VGA M

ODE

I/O M

APPING

.................................................................................. 5

T

ABLE

E–5. M

ONITOR

P

OWER

M

ANAGEMENT

C

ONDITIONS

...................................................................... 6

T

ABLE

E–6. DB-15 M

ONITOR

C

ONNECTOR

P

INOUT

................................................................................. 7

T

ABLE

E–7. M

ULTIMEDIA

I

NTERFACE

C

ONNECTOR

P

INOUT

...................................................................... 8

T

ABLE

F–1. 2D G

RAPHICS

D

ISPLAY

M

ODES

(

W

/SGRAM)........................................................................F-4

T

ABLE

F–2. 3D G

RAPHICS

D

ISPLAY

M

ODES

............................................................................................F-4

T

ABLE

F–3. ATI RAGE PRO PCI C

ONFIGURATION

S

PACE

R

EGISTERS

..................................................F-5

T

ABLE

F–4. S

TANDARD

VGA M

ODE

I/O M

APPING

................................................................................F-5

T

ABLE

F–5. M

ONITOR

P

OWER

M

ANAGEMENT

C

ONDITIONS

....................................................................F-6

T

ABLE

F–6. DB-15 M

ONITOR

C

ONNECTOR

P

INOUT

...............................................................................F-7

T

ABLE

F–7. M

ULTIMEDIA

I

NTERFACE

C

ONNECTOR

P

INOUT

...................................................................F-8

T

ABLE

G–1. 2D G

RAPHICS

D

ISPLAY

M

ODES

(

W

/SGRAM)...................................................................... G-4

T

ABLE

G–2. SGS

N

VIDA RIVA 128 PCI C

ONFIGURATION

S

PACE

R

EGISTERS

...................................... G-5

T

ABLE

G–3. S

TANDARD

VGA M

ODE

I/O M

APPING

.............................................................................. G-5

T

ABLE

G–4. M

ONITOR

P

OWER

M

ANAGEMENT

C

ONDITIONS

.................................................................. G-6

T

ABLE

G–5. DB-15 M

ONITOR

C

ONNECTOR

P

INOUT

............................................................................. G-7

T

ABLE

G–6. M

EDIA

P

ORT

C

ONNECTOR

P

INOUT

.................................................................................... G-8

Technical Reference Guide

Compaq Deskpro EP Series Personal Computers

First Edition - April 1998

xiv

Technical Reference Guide

Compaq Deskpro EP Series of Personal Computers

First Edition - April 1998

1-1

Chapter 1

INTRODUCTION

1.

Chapter 1 INTRODUCTION

1.1

ABOUT THIS GUIDE

This guide provides technical information about the Compaq Deskpro EP Series of Personal

Computers. This document includes information regarding system design, function, and features

that can be used by programmers, engineers, technicians, and system administrators.

1.1.1

USING THIS GUIDE

This guide consists of chapters and appendices. The chapters primarily describe the hardware

and firmware elements contained within the chassis and specifically deal with the system board

and the power supply assembly. The appendices contain general information about standard

peripheral devices such as the keyboard as well as separate audio or other interface cards, as well

as other general information in tabular format.

1.1.2

ADDITIONAL INFORMATION SOURCES

This guide does not describe in detail other manufacturer’s components used in the product

covered. For more information on individual commercial-off-the-shelf (COTS) components refer

to the indicated manufacturers’ documentation. The products covered by this guide use

architecture based on industry-standard specifications that can be referenced for detailed

information.

Hardcopy documentation sources:

♦ The Lotus/Intel/Microsoft Expanded Memory Specification, Ver. 4.0

♦ PCI Local Bus Specification Revision 2.1

Online information sources:

♦ Compaq Computer Corporation: http://www.compaq.com

♦ Intel Corporation: http://www.intel.com

♦ National Semiconductor Incorporated: http://www.national.com

♦ AGP forum: http://www.agpforum.org/index.htm

♦ ATI Incorporated: http://www.atitech.com

♦ NVIDIA Corp.: http://www.nvidia.com

Chapter 1 Introduction

Compaq Deskpro EP Series of Personal Computers

First Edition – April 1998

1-2

1.2 NOTATIONAL CONVENTIONS

1.2.1 VALUES

Hexadecimal values are indicated by the letter “h” following an alpha-numerical value. Binary

values are indicated by the letter “b” following a value of ones and zeros. Memory addresses

expressed as “SSSS:OOOO” (SSSS = 16-bit segment, OOOO = 16-bit offset) can be assumed as

a hexadecimal value. Values that have no succeeding letter can be assumed to be decimal.

1.2.2 RANGES

Ranges or limits for a parameter are shown as a pair of values separated by two dots:

Example: Bits <7..4> = bits 7, 6, 5, and 4.

1.2.3 SIGNAL LABELS

Signal names are indicated using abbreviations, acronyms, or, if possible, the full signal name in

all capital letters. Signals that are meant to be active low are indicated with a dash immediately

following the name.

1.2.4 REGISTER NOTATION AND USAGE

This guide uses standard Intel naming conventions in discussing the microprocessor’s (CPU)

internal registers. Registers that are accessed through programmable I/O using an indexing

scheme are indicated using the following format:

03C5.17h

Index port

Data port

In the example above, register 03C5.17h is accessed by writing the index port value 17h to the

index address (03C4h), followed by a write to or a read from port 03C5h.

1.2.5 BIT NOTATION

Bit values are labeled with bit <0> representing the least-significant bit (LSb) and bit <7>

representing the most-significant bit (MSb) of a byte. Bytes, words, double words, and quad

words are typically shown with most-significant portions on the left or top and the least-

significant portions on the right or bottom respectively.

Technical Reference Guide

Compaq Deskpro EP Series of Personal Computers

First Edition - April 1998

1-3

1.3 COMMON ACRONYMS AND ABBREVIATIONS

Table 1-1 lists the acronyms and abbreviations used in this guide.

Table 1–1.

Acronyms and Abbreviations

Table 1-1.

Acronyms and Abbreviations

Acronym/Abbreviation Description

A ampere

AC alternating current

ACPI Advanced Configuration and Power Interface

A/D analog-to-digital

AGP Accelerated graphics port

API application programming interface

APM advanced power management

ASIC application-specific integrated circuit

AT 1. attention (commands) 2. 286-based PC architecture

ATA AT attachment (mode)

AVI audio-video interleaved

AVGA Advanced VGA

BCD binary-coded decimal

BIOS basic input/output system

bis second/new revision

BitBLT bit block transfer

BNC Bayonet Neill-Concelman (connector)

bps or b/s bits per second

BSP Bootstrap processor

CAS column address strobe

CD compact disk

CD-ROM compact disk read-only memory

CDS compct disk system

CF carry flag

CGA color graphics adapter

Ch channel

CLUT color look-up table (pallete)

cm centimeter

CMC cache/memory controller

CMOS complimentary metal-oxide semiconductor (configuration memory)

Cntlr controller

codec compressor/decompressor

CPQ Compaq

CPU central processing unit

CRT cathode ray tube

CSM Compaq system management / Compaq server management

DAA direct access arrangement

DAC digital-to-analog converter

db decibel

DC direct current

DCH DOS compatibility hole

DDC Display Data Channel

DF direction flag

Continued

Chapter 1 Introduction

Compaq Deskpro EP Series of Personal Computers

First Edition – April 1998

1-4

Table 1-1. Acronyms and Abbreviations

Continued

Acronym/Abbreviation Description

DIMM dual inline memory module

DIN Deutche IndustriNorm (connector standard)

DIP dual inline package

DMA direct memory access

DMI Desktop management interface

dpi dots per inch

DRAM dynamic random access memory

DRQ data request

ECC error correction coding

EDID extended display identification data

EDO extended data out (RAM type)

EEPROM electrically eraseable PROM

EGA enhanced graphics adapter

EIA Electronic Industry Association

EISA extended ISA

EPP enhanced parallel port

EIDE enhanced IDE

ESCD Extended System Configuration Data (format)

EV Environmental Variable (data)

ExCA Exchangeable Card Architecture

FIFO first in / first out

FL flag (register)

FM frequency modulation

FPM fast page mode (RAM type)

FPU Floating point unit (numeric or math coprocessor)

ft foot

GB gigabyte

GND ground

GPIO general purpose I/O

GPOC general purpose open-collector

GUI graphics user interface

h hexadecimal

HW hardware

hex hexadecimal

Hz hertz

IDE integrated drive element

IEEE Institute of Electrical and Electronic Engineers

IF interrupt flag

I/F interface

in inch

INT interrupt

I/O input/output

IPL initial program loader

IrDA InfraRed Data Association

IRQ interrupt request

ISA industry standard architecture

JEDEC Joint Electron Device Engineering Council

Kb / KB kilobits / kilobytes (x 1024 bits / x 1024 bytes)

Kb/s kilobits per second

kg kilogram

KHz kilohertz

kv kilovolt

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Compaq Deskpro EP a/C466/810e Technical Reference Manual

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