Intel Scalable User guide

Scalable
Intel
Brand
Intel
Model
Scalable
Type
User guide

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Intel Scalable Switch FPGA IP for PCI Express is a configurable switch that provides connectivity for up to 32 downstream ports or embedded endpoints. It supports Hot Plug capability for downstream ports, allowing for flexible configurations. The IP implements upstream and downstream port configuration spaces and routes packets between ports. Use cases include connecting multiple devices like FPGAs, ASICs, or microcontrollers to a single PCIe root port, enabling high-speed data transfer and communication.

Intel Scalable Switch FPGA IP for PCI Express is a configurable switch that provides connectivity for up to 32 downstream ports or embedded endpoints. It supports Hot Plug capability for downstream ports, allowing for flexible configurations. The IP implements upstream and downstream port configuration spaces and routes packets between ports. Use cases include connecting multiple devices like FPGAs, ASICs, or microcontrollers to a single PCIe root port, enabling high-speed data transfer and communication.

Scalable Switch Intel® FPGA IP for
PCI Express* User Guide
Updated for Intel® Quartus® Prime Design Suite: 20.4
IP Version: 1.0.0
Online Version
Send Feedback UG-20265
ID: 683515
Version: 2021.01.08
Contents
1. Introduction................................................................................................................... 3
Contents
Scalable Switch Intel® FPGA IP for PCI Express* User Guide Send Feedback
2
1. Introduction
The Scalable Switch Intel FPGA IP for PCI Express is a fully configurable switch that
implements one fully configurable upstream port and connectivity for up to 32 discrete
(i.e., external) downstream ports or embedded (i.e., internal) endpoints. This IP
supports Hot Plug capability for the downstream ports. You can use the Scalable
Switch Intel FPGA IP along with the Intel P-Tile Avalon Streaming IP for PCI Express in
TLP Bypass mode to configure the discrete downstream ports or use the Scalable
Switch Intel FPGA IP to configure the embedded endpoints allowing the use of fewer
PCIe physical links. The Scalable Switch Intel FPGA IP implements the upstream and
downstream port configuration spaces and associated logic to route packets between
the different ports.
The following figure shows the Scalable Switch Intel FPGA IP with discrete EPs. Note
that the Switch can also support embedded EPs.
Figure 1. Scalable Switch Intel FPGA IP for PCI Express with Discrete EPs
...
...
Intel FPGA
UP Port
Intel Switch
Upstream
Port IP
Intel Switch
Downstream
Port IPs
User Logic
PCIe Hard IP (in TLP Bypass)
Intel Switch IP
User Logic
External to the FPGA
EP 0 EP 1 EP N- 1
DN
Port N-1
DN
Port 1
DN
Port 0
RP
Intel Switch
IP
Intel Switch
IP
Intel Switch
IP
Intel Switch
IP
To purchase a license for the Scalable Switch Intel FPGA IP for PCI Express, contact
your local Intel Regional Sales Office and use the ordering code IP-PCIESCSWTCH.
683515 | 2021.01.08
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Intel Corporation. All rights reserved. Intel, the Intel logo, and other Intel marks are trademarks of Intel
Corporation or its subsidiaries. Intel warrants performance of its FPGA and semiconductor products to current
specifications in accordance with Intel's standard warranty, but reserves the right to make changes to any
products and services at any time without notice. Intel assumes no responsibility or liability arising out of the
application or use of any information, product, or service described herein except as expressly agreed to in
writing by Intel. Intel customers are advised to obtain the latest version of device specifications before relying
on any published information and before placing orders for products or services.
*Other names and brands may be claimed as the property of others.
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Intel Scalable User guide

Scalable
Intel
Brand
Intel
Model
Scalable
Type
User guide
This manual is also suitable for

Intel Scalable Switch FPGA IP for PCI Express is a configurable switch that provides connectivity for up to 32 downstream ports or embedded endpoints. It supports Hot Plug capability for downstream ports, allowing for flexible configurations. The IP implements upstream and downstream port configuration spaces and routes packets between ports. Use cases include connecting multiple devices like FPGAs, ASICs, or microcontrollers to a single PCIe root port, enabling high-speed data transfer and communication.

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