HuMANDATA LTD.
Cyclone IV GX FPGA Board
ACM-024 Series
User’s Manual
Ver. 1.1
Table of Contents
Table of ContentsTable of Contents
Table of Contents
Revision History
Revision HistoryRevision History
Revision History
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1
11
1
Introduction
IntroductionIntroduction
Introduction
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1
11
1
1. Shared Pins
1. Shared Pins 1. Shared Pins
1. Shared Pins [IMPORTANT]
[IMPORTANT][IMPORTANT]
[IMPORTANT]
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2
2. Specifications
2. Specifications2. Specifications
2. Specifications
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33
3
3. Overview
3. Overview3. Overview
3. Overview
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4
44
4
3.1. Name of Parts ...................................................................................................... 4
3.2. Block Diagram ..................................................................................................... 5
3.3. Power Supply ....................................................................................................... 6
3.4. Clock ..................................................................................................................... 6
3.5. JTAG Connector (CN3) ....................................................................................... 6
3.6. Configuration Mode Switch (SW1) .................................................................... 7
4. High Speed Serial Transceiver (ALTGX)
4. High Speed Serial Transceiver (ALTGX)4. High Speed Serial Transceiver (ALTGX)
4. High Speed Serial Transceiver (ALTGX)
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88
8
5. FPGA Configuration
5. FPGA Configuration5. FPGA Configuration
5. FPGA Configuration
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9
99
9
6. Configuration Device Programming
6. Configuration Device Programming6. Configuration Device Programming
6. Configuration Device Programming
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99
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6.1. Generating jic file ................................................................................................ 9
6.2. Programming Configuration Device .................................................................. 9
7. Additional Documentation and User Support
7. Additional Documentation and User Support7. Additional Documentation and User Support
7. Additional Documentation and User Support
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1010
10
Precautions
Do Not
1. This product uses ordinary off-the-shelf electronic components, and is therefore inappropriate for use in
applications that require special quality or reliability and are expected to protect human lives or prevent
accidents, such as safety mechanisms in fields including space, aeronautics, medicine, and nuclear
power.
2. Do not be used underwater or in high-humidity environments.
3. Do not be used in the presence of corrosive gases, combustible gases, or other flammable gases.
4. Do not turn on power when circuit board surface is in contact with other metal.
5. Do not apply voltage higher than rated voltage.
Attention
6. This manual may be revised in the future without notice owing to improvements.
7. All efforts have been made to produce the best manual possible, but if users notice an error or other
problem, we ask that they notify us.
8. Item 7 notwithstanding, HuMANDATA cannot be held liable for the consequences arising from use of
this product.
9. HuMANDATA cannot be held liable for consequences arising from using this product in a way different
from the uses described herein, or from uses not shown herein.
10. This manual, circuit diagrams, sample circuits, and other content may not be copied, reproduced, or
distributed without permission.
11. If the product emits smoke, catches fire, or becomes unusually hot, cut the power immediately.
12. Be careful of static electricity.
13. This product may be subject to the export restrictions of Japan, the United States, or other countries.
Purchasers are responsible for properly observing export restrictions.
14. HuMANDATA firmly refuses to export (including reexporting) products to countries or regions subject to
export restrictions.
Product Warranty and Scope of Support
1. HuMANDATA guarantees that its products can be assembled as shown in published circuit diagrams and other design documents.
There may be differences between actual components or their prescribed quantities and model numbers and those shown in circuit
diagrams.
2. Except for the guarantee in item 1, above, no guarantees whatsoever are made. When assembling the product as shown in a circuit
diagram is impossible, and the problem can be solved by revising the diagram, HuMANDATA will revise the diagram. When a
problem can be solved only by replacing components or modifying the product, HuMANDATA will take back the product to replace it
with a properly functioning product.
3. In case item 2, above, HuMANDATA guarantee its products for a period of 60 days from the date of shipping.
4. If the problem is minor, HuMANDATA will sometimes describe how to make the revision or modification, and ask the customer to
solve the problem.
5. HuMANDATA will determine how to honor the warranty, as through repair, replacement, return, or other action. The customer cannot
specify what action to take.
6. FPGAs and other components used in products sometimes have characteristic defects. Returns and replacements are not possible
even if such defects are discovered, whether before or after purchase.
7. HuMANDATA shall not be obligated to inform customers about defects in the main components used in products.
8. HuMANDATA shall not be obligated to provide support for products, or to provide support for the software of other companies
needed to use HuMANDATA products.
9. Published documentation shall be limited to that published by HuMANDATA at the time of product purchase, and HuMANDATA shall
not be obligated to provide any other documentation.
10. When repairs or replacements are provided under warranty in Japan, purchaser shall pay shipping charges for shipping to
HuMANDATA, and HuMANDATA shall pay shipping charges for shipping to purchaser.
11. When shipping from outside of Japan, purchaser shall pay all expenses including shipping charges and taxes.
12. Under whatever circumstances, HuMANDATA shall provide support for its products for a maximum of one year after shipping from
factory.
13. The Warranty is not applicable and support ends in the event of fire, storm and flood damage, earthquakes, lightning strikes, and
other natural disasters, as well as conflict or other occurrences.
14. Purchaser is assumed to have read and understood all the above when purchasing a HuMANDATA product.
Limitation of Liability
1. Purchasers assume all liability associated with the use of this product.
2. HuMANDATA assumes no liability whatsoever for any direct, indirect, special, incidental, or consequential damages arising from the
use of this product, even if HuMANDATA has been advised of the possibility of such damage, whether legal or in tort.
3. At the time this product is purchased, items 1 and 2 above shall be deemed to have been confirmed by purchaser.
Trademarks and Other Considerations
1. This manual uses various companies’ trademarks in places.
2. HuMANDATA is this company’s registered trademark.
HuMANDATA’s Philosophy
1. HuMANDATA endeavors to raise product quality. We continually make detailed improvements and adjustments that are not shown
in circuit diagrams.
2. HuMANDATA actively publishes, on the Web and in other ways, information considered useful to customers. Examples would be
how to use FPGAs and how to use development tools.
3. HuMANDATA makes efforts for the long-term provision of products and for continuing their long-term support.
4. Instead of concealing small product problems and documentation errors, HuMANDATA makes them public
5. HuMANDATA abides by Japanese law and its spirit. We make no transactions with purchasers who commit illegal acts.
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Revision History
Revision HistoryRevision History
Revision History
Date
DateDate
Date
Revision
RevisionRevision
Revision
Description
DescriptionDescription
Description
Jun. 30, 2011
v1.0 Initial release
Aug. 1, 2012 v1.1 Typo fix: JTAG connector table
Introduction
IntroductionIntroduction
Introduction
Thank you for buying our product ACM-024.
This is an evaluation board equipped with an ALTERA Cyclone IV GX, voltage
regulators, oscillators and configuration device. High Speed Serial Transceiver
(ALTGX) signals are rooted to SIF40 connector.
It can provide you with very convenient and easy-to-use development environment.
* The explanations and screenshots given in this manual are based on Quartus II Ver. 11.0.
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Series v1.
1
1.
1.1.
1. Shared
SharedShared
Shared
Pins
Pins Pins
Pins [IMPORTANT]
[IMPORTANT][IMPORTANT]
[IMPORTANT]
Some I/O pins in this board are fixed to GND or VCCINT (1.2 V) for purpose
adjusting the differences between devices. Some VREFB pins are connected to each
other.
Therefore, these pins should not be used as user I/O port.
For more details, please refer to the circuit schematics.
GND VCCINT(1.2V) VREFB V09REF
E10
K7
G10
P17
P20
V13
F16
N17
G14
P7
W19
W16
G11
P6
G16
R14
N19
T16
G13
R18
G4
R15
M5 V9
G15
T10
G8
R6
T3 U12
G17
T14
H17
T11
R5 W10
G7
U13
J1
7
U15
G9
U19
J7
U16
H16
U7
K17
U17
J19
V6
N16
U8
J5
Y21
N7
V7
To configure the unused I/O pins using Quartus II follow the steps below:
1. Open “Assignments” and click “Device…”
2. Click “Device & Pin Options…” button
3. Open “Unused Pins” tab
4. Set Reserve all unused pins as “As input tri-stated”
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2.
2.2.
2. Specifications
SpecificationsSpecifications
Specifications
Model Name
Model NameModel Name
Model Name
ACM-024-GX50
ACM-024-GX75
ACM-024-GX110
ACM-024-GX150
FPGA
FPGAFPGA
FPGA
EP4CGX50C
F23C8N
EP4CGX75C
F23C8N
EP4CGX110C
F23C8N
EP4CGX150C
F23C7N
Config. Device
Config. DeviceConfig. Device
Config. Device
EPCS64SI16N (ALTERA, 64Mbit)
DDR2 SDRAM
DDR2 SDRAMDDR2 SDRAM
DDR2 SDRAM
MT47H32M16HR-25E-G (Micron, 512Mbit: 8Mbit x 16 x 4 banks)
On
OnOn
On-
--
-Board Clock
Board ClockBoard Clock
Board Clock
30, 50 [MHz]
125 [MHz] (ALTGX reference clock)
External Input Clock
External Input ClockExternal Input Clock
External Input Clock
User I/O (IOA-48/49, IOB-48/49)
MMCX (ALTGX reference clock, unmounted)
Power Input
Power InputPower Input
Power Input
DC 3.3 [V]
(Internal power is generated by an on-board regulator.)
Dimensions
DimensionsDimensions
Dimensions
3.386" x 2.126" (86 x 54 [mm])
Weight
WeightWeight
Weight
36 [g] typ.
User I/Os
User I/OsUser I/Os
User I/Os
100
User Switch
User SwitchUser Switch
User Switch
4 (Push x 2, Slide x 2)
User
UserUser
User
LEDs
LEDsLEDs
LEDs
8
User I/O Connectors
User I/O ConnectorsUser I/O Connectors
User I/O Connectors
66-pin through-hole
dia. 0.9 [mm], 100[mil]/2.54 [mm] pitch
PCB
PCBPCB
PCB
8 Layer FR-4 t1.6 [mm] Immersion gold
Power
PowerPower
Power-
--
-On Reset
On ResetOn Reset
On Reset
200 [ms] typ. (Configuration Reset Signal)
JTAG Connector
JTAG ConnectorJTAG Connector
JTAG Connector
DIL 10-pin header, 2.54 [mm] pitch
Status LEDs
Status LEDsStatus LEDs
Status LEDs
Power (red), Done (blue)
Accessories
AccessoriesAccessories
Accessories
DIL 10-pin headers (Mounted) x 1
DIL 80-pin headers (Cuttable) x 2
RoHS Compliance
RoHS ComplianceRoHS Compliance
RoHS Compliance
YES
*
* *
* There may be cases that these parts and specifications are changed.
There may be cases that these parts and specifications are changed.There may be cases that these parts and specifications are changed.
There may be cases that these parts and specifications are changed.
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3.
3.3.
3. Overview
OverviewOverview
Overview
3.1.
3.1.3.1.
3.1. Name of Parts
Name of PartsName of Parts
Name of Parts
Component Side
Component SideComponent Side
Component Side
Solder Side
Solder SideSolder Side
Solder Side
User I/Os CNB
SIF40
User I/Os CNA
JTAG
Config. Swich
Config. Device
DDR2SDRAM
User Switches
Reference Clock
User
LED
s
Power LED
Done LED
5
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3.2.
3.2.3.2.
3.2. Block
Block Block
Block Diagram
DiagramDiagram
Diagram
JTAG
JTAG
JTAG
JTAG
Power LED (3.3V)
Power LED (3.3V)Power LED (3.3V)
Power LED (3.3V)
DONE LED
DONE LEDDONE LED
DONE LED
VIO(B) INPUT
VIO(B) INPUTVIO(B) INPUT
VIO(B) INPUT
3.3 V INPUT
3.3 V INPUT3.3 V INPUT
3.3 V INPUT
JTAG
JTAGJTAG
JTAG
Buffer
BufferBuffer
Buffer
50 GPIO
50 GPIO50 GPIO
50 GPIO
Oscillator
OscillatorOscillator
Oscillator
50MHz, 30MHz
50MHz, 30MHz50MHz, 30MHz
50MHz, 30MHz
8
88
8
Config. Switch
Config. SwitchConfig. Switch
Config. Switch
POR (240 ms typ.)
POR (240 ms typ.)POR (240 ms typ.)
POR (240 ms typ.) Config. Device
Config. DeviceConfig. Device
Config. Device
EPCS64
EPCS64EPCS64
EPCS64
External CLK (option)
External CLK (option)External CLK (option)
External CLK (option)
User I/Os CNB
User I/Os CNBU ser I/Os CNB
User I/Os CNB
50 GPIO
50 GPIO50 GPIO
50 GPIO
User I/Os CNA
User I/Os CNAU ser I/Os CNA
User I/Os CNA
External CLK (option)
External CLK (option)External CLK (option)
External CLK (option)
HS Transceiver Tx
HS Transceiver Tx HS Transceiver Tx
HS Transceiver Tx
HS Transceiver Rx
HS Transceiver RxHS Transceiver Rx
HS Transceiver Rx
Power Circuit
Power CircuitPower Circuit
Power Circuit
2.5V, 1.8V
2.5V, 1.8V2.5V, 1.8V
2.5V, 1.8V
1.2V, 0.9V
1.2V, 0.9V1.2V, 0.9V
1.2V, 0.9V
4
44
4
4
44
4
DDR2SDRAM
DDR2SDRAMDDR2SDRAM
DDR2SDRAM
(512Mbit)
(512Mbit)(512Mbit)
(512Mbit)
Transceiver
Transceiver Transceiver
Transceiver Ref. Clock
Ref. ClockRef. Clock
Ref. Clock
MMCX (option)
MMCX (option)MMCX (option)
MMCX (option)
4
44
4
Us er LED
Us er LEDUs er LED
Us er LED
Us er Switch
Us er SwitchUs er Switch
Us er Switch
Push x2
Push x2Push x2
Push x2
Slide x2
Slide x2S lide x2
Slide x2
SIF40
SIF40SIF40
SIF40
Cyclone IV GX
Cyclone IV GXCyclone IV GX
Cyclone IV GX
EP4CGX
EP4CGXEP4CGX
EP4CGX
50/75/110/150
50/75/110/15050/75/110/150
50/75/110/150
CF23C*N
CF23C*NCF23C*N
CF23C*N
.jic
.jic.jic
.jic
125MHz
125MHz12 5MHz
125MHz
ACM
ACMACM
ACM-
--
-024 Rev.C
024 Rev.C024 Rev.C
024 Rev.C
Os cillator (option)
Os cillator (option)Os cillator (option)
Os cillator (option)
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3.3.
3.3.3.3.
3.3. Power Supply
Power SupplyPower Supply
Power Supply
This board operates from single DC 3.3 V power supply from CNA and CNB.
Internally required 2.5[V], 1.8[V], 1.2[V] and 0.9[V] are generated by on-board
voltage regulators.
The external power supply should be sufficient and stabilized. Please do not apply
over 3.3V voltage.
The Vccio of BANK B is not connected to 3.3V (V33A). Please input given voltage
from CNB.
By shorting JP1, 3.3V (V33A) is available. Or by switching PJ1 and PJ2, 2.5V is
available.
For more details, please refer to circuit schematic.
3.4.
3.4.3.4.
3.4. Clock
ClockClock
Clock
50 MHz (U10) and 30 MHz (U9) oscillators are equipped as on-board clock.
External clock can be input from user I/O connectors (CNA, CNB).
For more details, please refer to circuit schematic.
3.5.
3.5.3.5.
3.5. JTAG Connector
JTAG ConnectorJTAG Connector
JTAG Connector
(CN3)
(CN3)(CN3)
(CN3)
This connector is used to configure the FPGA and to access to configuration device
in system. Pin assignment is as follows.
CN
CNCN
CN3
33
3
Signal Name
Signal NameSignal Name
Signal Name
JTAG Pin
JTAG PinJTAG Pin
JTAG Pin
Signal Name
Signal NameSignal Name
Signal Name
TCK 1 2 GND
TDO 3 4 VCC
TMS 5 6 -
- 7 8 -
TDI 9 10 GND
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3.6.
3.6.3.6.
3.6. Config
ConfigConfig
Configuration Mode
uration Modeuration Mode
uration Mode
Swi
SwiSwi
Swit
tt
tch
chch
ch
(SW
(SW(SW
(SW1
11
1)
))
)
The specification of configuration switch is below. “ON” means “Low (Ground)”.
SW
SWSW
SW1
11
1
1
11
1
2
22
2
3
33
3
4
44
4
Net Label
Net LabelNet Label
Net Label
MSEL_SW
ASW2
ASW3
X_NCSO
Default
DefaultDefault
Default
OFF OFF
OFF
OFF
Function
FunctionFunction
Function
Config. Mode User Config. Mode
Configuration Mode
Configuration ModeConfiguration Mode
Configuration Mode
MSEL_SW
MSEL_SWMSEL_SW
MSEL_SW
X_NCSO
X_NCSOX_NCSO
X_NCSO
Active Serial (AS)
Active Serial (AS)Active Serial (AS)
Active Serial (AS)
X ON (Low)
JTAG
JTAGJTAG
JTAG
X OFF (High)
X: Don’t care.
MSEL_SW
MSEL_SWMSEL_SW
MSEL_SW
You can set power-on reset time. Default setting on this board is set to use
on-board POR. For more details, please refer to the device datasheet and the
circuit schematic.
X_
X_X_
X_
NCSO
NCSONCSO
NCSO
When you set this to ON, chip select signal of FPGA will be connected to
configuration device. When you use JIC file to access the configuration device,
set this mode to ON (AS mode).
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4.
4.4.
4. High Speed Serial
High Speed SerialHigh Speed Serial
High Speed Serial
Transceiver (
Transceiver (Transceiver (
Transceiver (ALTGX
ALTGXALTGX
ALTGX)
))
)
High Speed Serial Transceiver (ALTGX) signals are routed
to SIF40(*
**
*) connector (CN5). By using accessories including
our products ACC-009/010, the signal can be accessed from
its SMA/MMCX connector. For the pin assignment of the
signal, please refer to the pin list of each accessory.
For reference clock, 125 MHz oscillator is equipped. Or,
external reference clock is available via MMCX connector.
For more details, please refer to the circuit schematic.
*
**
* SIF40 is the interface standard for fast transceivers by HuMANDATA.
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5.
5.5.
5. FPGA Configuration
FPGA ConfigurationFPGA Configuration
FPGA Configuration
To configure the FPGA via JTAG, select FPGA icon detected by [Auto Detect] and
assign a sof file.
If configuration is completed successfully, the DONE LED will light up.
6.
6.6.
6. Configuration Device Programming
Configuration Device ProgrammingConfiguration Device Programming
Configuration Device Programming
To download an FPGA configuration data to the configuration device via JTAG, jic
(JTAG Indirect Configuration) file is required.
To generate a jic file using Quartus II, please refer to the following steps.
6.1.
6.1.6.1.
6.1. Generating
Generating Generating
Generating jic
jicjic
jic
file
filefile
file
Start Quartus II, and open [File] menu and click [Convert Programming Files]
and set items as shown below.
Programming File Type : JTAG Indirect Configuration File (.jic)
Configuration Device : EPCS64
File name : any
Memory Map File : blank
1. Open [Flash Loader] and click [Add Device…], then select mounted [Device
name].
2. Open [SOF Data] and Click [Add File…], then select the sof file.
3. Click [Generate]
6.2.
6.2.6.2.
6.2. Programming Configuration Device
Programming Configuration DeviceProgramming Configuration Device
Programming Configuration Device
Please set configuration mode switch to AS mode.
Click [Add File…] and select the jic file, then check [Program/Configure] and
click [Start].
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7.
7.7.
7.
Additional Documentation and User Support
Additional Documentation and User SupportAdditional Documentation and User Support
Additional Documentation and User Support
The following documents and other supports are available at
http://www.hdl.co.jp/en/
http://www.hdl.co.jp/en/http://www.hdl.co.jp/en/
http://www.hdl.co.jp/en/spc/ACM/acm
spc/ACM/acmspc/ACM/acm
spc/ACM/acm-
--
-024/
024/024/
024/
Circuit Schematic
Pin List
Dimensional drawing
PCB drawing
Net List
… and more.
Cyclone
Cyclone Cyclone
Cyclone IV
IV IV
IV GX
GXGX
GX
FPGA Board
FPGA BoardFPGA Board
FPGA Board
ACM-024 Series
User’s Manual
Ver. 1.
Ver. 1.Ver. 1.
Ver. 1.1
11
1
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A
AA
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g. 1, 2012
. 1, 2012. 1, 2012
. 1, 2012
HuMANDATA LTD.
HuMANDATA LTD.HuMANDATA LTD.
HuMANDATA LTD.
Address: 1-2-10-2F, Nakahozumi, Ibaraki
Osaka, Japan
ZIP 567-0034
Tel: 81-72-620-2002 (Japanese)
Fax: 81-72-620-2003 (Japanese/English)
URL: http://www.hdl.co.jp/en/ (Global)
http://www.hdl.co.jp/ (Japan)
/
