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IC Block Diagram
-11-
-
U20 U23 U31 3.3V/1A 3-TERMINAL POSITIVE VOL TAGEREGULATOR LD1117-3.3 SOT-223
8᧤9$/2:'523287/,1($5$55(*8/$725᧥/'$'-72
Thermal
Protection +
-
For Adjustable Output, disconnect A1 and A2, connect B
INPUT
OUTPUT
ADJ/
GND
A1 A2
B
For Fixed Output, connect A1 and A2, disconnect B 1
2
3
IC Block Diagram
-13-
U10(LCDTV CONTROLLER WITH VIDEO ECODE)MST6E181VS
PIN DIAGRAM (MST6E181VS)
MST6E181VS
198
199
217
2
1
216
215
214
213
212
211
210
209
208
207
206
205
204
203
202
201
200
197
196
195
194
193
192
191
190
189
188
187
186
185
184
183
182
181
180
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
DM_P1
DP_P1
E-pad
CEC
IRIN
GPIO9/PM6/CS1
GPIO8/PM5/RX
GPIO7/PM4/POWER_ON
GPIO6/PM1/TX
DDCA_DA
DDCA_CK
GPIO10/PMGPIO
GPIO13/SAR2
GPIO12/SAR1
GPIO11/SAR0
SPI_CZ
SPI_DO
SPI_DI
SPI_CK
GND_EFUSE
DVDD_NODIE
AVDD_NODIE
DP_P0
DM_P0
TESTPIN
DDCR_CK
VDDP_3
DDCR_DA
VDDC
A_DDR1_A4
A_DDR1_A5
A_DDR1_A6
A_DDR1_A7
A_DDR1_A8
AVDDIO_2.5V
A_DDR1_A9
A_DDR1_A11
A_DDR1_A12
A_DDR1_CKE
NC
A_DDR1_MCLK
AVDDIO_2.5V
A_DDR1_MCLKZ
A_DDR1_DQ15
AVDDIO_2.5V
A_DDR1_DQ14
A_MVREF
A_DDR1_DQ13
A_DDR1_DQ12
A_DDR1_DQ11
A_DDR1_DQ10
AVDDIO_2.5V
A_DDR1_DQ9
A_DDR1_DQ8
UDQS0
UDQM0
AVDD_PLL
DVDD_DDR_1.2V
LDQM0
LDQS0
AVDDIO_2.5V
NC
NC
A_DDR1_DQ7
A_DDR1_DQ6
A_DDR1_DQ5
AVDDIO_2.5V
A_DDR1_DQ4
A_DDR1_DQ3
A_DDR1_DQ2
A_DDR1_DQ1
AVDDIO_2.5V
A_DDR1_DQ0
A_DDR1_WEZ
A_DDR1_CAS
A_DDR1_RAS
A_DDR1_BA0
AVDDIO_2.5V
A_DDR1_BA1
A_DDR1_A10
A_DDR1_A0
A_DDR1_A1
A_DDR1_A2
A_DDR1_A3
NC
NC
VDDC
GPIO21/PWM1
GPIO20/PWM0
VDDP_2
GPIO77/I2S_OUT_MUTE/PWM3/LVSYNC
GPIO76/I2S_IN_BCK/PWM2/LHSYNC
GPIO75/I2S_IN_SD/PWM5/TX3/LDE
GPIO74/I2S_IN_WS/PWM4/RX3/LCK
AVDD_LPLL
AVDD2P5_MOD
VDDC
R_ODD7/RXO0-
R_ODD6/RXO0+
R_ODD5/RXO1-
R_ODD4/RXO1+
R_ODD3/RXO2-
R_ODD2/RXO2+
R_ODD1/RXOC-
R_ODD0/RXOC+
G_ODD7/RXO3-
G_ODD6/RXO3+
G_ODD5/RXO4-
G_ODD4/RXO4+
G_ODD3/RXE0-
G_ODD2/RXE0+
AVDD2P5_MOD
G_ODD1/RXE1-
G_ODD0/RXE1+
B_ODD7/RXE2-
B_ODD6/RXE2+
B_ODD5/RXEC-
B_ODD4/RXEC+
B_ODD3/RXE3-
B_ODD2/RXE3+
B_ODD1/RXE4-
B_ODD0/RXE4+
NC
GPIO49
GPIO47
GPIO45
GPIO38
GPIO37
GPIO36
GPIO32/I2S_OUT_BCK
GPIO30/I2S_OUT_MCK
GPIO28
VDDP_1
VDDC
GPIO27/SPDIF_OUT
GPIO26/SPDIF_IN/RX1/PWM3
GPIO25/TUNER_SDA
GPIO24/TUNER_SCL
GPIO23/I2S_OUT_SD/TX2
GPIO22/I2S_OUT_WS/RX2
TAGC
SIFM
SIFP
AVDD25_PGA
VIFP
VIFM
AVSS_PGA
AVDD25_REF
AVDD_DMPLL
XTAL_OUT
XTAL_IN
NC
NC
NC
LINEOUT_R0
LINEOUT_L0
LINEOUT_R3
LINEOUT_L3
AVDD_AU33
LINEIN_R5
LINEIN_L5
LINEIN_R4
LINEIN_L4
LINEIN_R3
LINEIN_L3
AVDD_AU25
VAG
VRP
VRM
LINEIN_R1
LINEIN_L1
LINEIN_R0
LINEIN_L0
CVBS_OUT1
VCOM
CVBS0
CVBS1
CVBS2
CVBS3
CVBS4
AVDD3P3_ADC
RIN1P
GIN1M
GIN1P
SOGIN1
BIN1P
AVDD2P5_ADC
AVDD1P2
VSYNC0
RIN0P
GIN0M
GIN0P
SOGIN0
BIN0P
HSYNC0
VDDC
NC
NC
NC
NC
NC
NC
NC
ARC
DDCDA_CK
RX2P
RX2N
DDCDA_DA
RX1P
RX1N
AVDD_DVI_3.3V
RX0P
RX0N
RXCP
RXCN
HOTPLUGA
RESET
U?
IC Block Diagram
-16-
U19(HDMI SWITCH) PS331TQFP64G
SiI9185 Pin Mapping
POW2
HPD2
SDA2
SCL2
GND
B21
A21
VCC
B22
A22
GND
B23
A23
VCC
B24
A24
POW1
HPD1
HPD_SINK
SDA_SINK
SCL_SINK
NC
Z1
Y1
Z2
Y2
Z3
Y3
VCC
Z4
Y4
GND
I2C_ADDR
SCL_CTL
SDA_CTL
A34
B34
VCC
A33
B33
A32
B32
A31
B31
GND
SCL3
SDA3
HPD3
POW3
CEXT I2C_RST
SDA1
SCL1
B11
A11
B12
A12
B13
A13
B14
A14
REXT
POWDN
12 3 4 5 6 7 8 9 10 11 12 13 14 15 16
17
18
19
20
50
49
48 47 46 45 44 43 42 41
60
59
58
57
56
55
54
53
52
51
21
22
23
24
25
26
27
28
29
30
31
32
3334353637383940
64
63
62
61
POW_SINK
PS331
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