Important Information Catalyst AL Design-in Guide
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3.4 Display and User Interface ......................................................................................................... 25
3.4.1 DDI (Digital Display Interface) ..................................................................................................... 26
3.4.2 LVDS Display ............................................................................................................................. 26
3.4.3 Backlight .................................................................................................................................... 26
3.5 Inputs and Outputs .................................................................................................................... 26
3.5.1 Low Pin Count Bus ..................................................................................................................... 26
3.5.2 Reset Signals ............................................................................................................................. 27
3.5.3 General-Purpose Input and Output.............................................................................................. 27
3.6 Intel High Definition Audio .......................................................................................................... 28
3.7 Power Requirements ................................................................................................................. 28
3.7.1 Low Power States ...................................................................................................................... 28
3.7.2 Power Supply Architecture .......................................................................................................... 29
3.7.3 Input Power Voltages ................................................................................................................. 29
3.7.4 RTC Backup Power .................................................................................................................... 30
3.7.5 Power Switch ............................................................................................................................. 31
3.7.6 Power Timing Diagrams ............................................................................................................. 32
4 MECHANICAL SPECIFICATIONS ................................................................................................................ 38
4.1 Mechanical Design .................................................................................................................... 38
4.1.1 Mechanical Drawing ................................................................................................................... 38
4.1.2 Total Stack Height ...................................................................................................................... 40
4.1.3 Mounting .................................................................................................................................... 40
4.1.4 Insertion and Removal ................................................................................................................ 41
4.2 Thermal Management................................................................................................................ 41
5 CARRIER BOARD DESIGN ....................................................................................................................... 43
5.1 Design Guidelines ..................................................................................................................... 43
5.1.1 Design Constraints ..................................................................................................................... 43
5.1.2 EMI/RFI Protection ..................................................................................................................... 43
5.1.3 Routing Guidelines ..................................................................................................................... 44
5.1.4 Power Planes ............................................................................................................................. 44
5.1.5 Requirements and Recommendations ......................................................................................... 45
5.1.6 Required Circuitry....................................................................................................................... 45
5.1.7 Carrier Board Configuration ........................................................................................................ 45
5.1.8 Recommended Circuitry ............................................................................................................. 46
5.2 Test and Debug ......................................................................................................................... 46
6 CONNECTORS ....................................................................................................................................... 47
6.1 Identifying Connectors ............................................................................................................... 47
6.2 Signal Headers .......................................................................................................................... 48
6.2.1 J1: Docking Connector: Data .................................................................................................... 48
6.2.2 J2: Docking Connector: Power .................................................................................................. 48
6.2.3 J3: ITP Debug Port .................................................................................................................... 49
7 SYSTEM SPECIFICATIONS ....................................................................................................................... 50
7.1 Power Supply ............................................................................................................................ 50
7.2 Electrical ................................................................................................................................... 51
7.2.1 PCIe Clock Buffer ....................................................................................................................... 51
7.2.2 Universal Serial Bus ................................................................................................................... 51
7.2.3 I
2
C Bus ...................................................................................................................................... 51
7.2.4 SMBus ....................................................................................................................................... 52
7.2.5 LVDS Display and Backlight ....................................................................................................... 52
7.2.6 Reset Signals ............................................................................................................................. 52
7.2.7 General-purpose Inputs and Outputs .......................................................................................... 53
7.2.8 Intel High Definition Audio ........................................................................................................... 53
7.3 General ..................................................................................................................................... 54
7.3.1 Crystal Frequencies.................................................................................................................... 54
7.3.2 Real-Time Clock ......................................................................................................................... 54
7.4 Environmental ........................................................................................................................... 54