USER MANUAL ELIIXA+ 16K/8K CXP MONO – REV L – 08/2017
7.2.3 Multi-Line Gain ............................................................................................................................... 22
7.2.4 HDR mode (Only available on “BH0” Models) ................................................................................ 22
7.2.5 Test Image Pattern Selector ........................................................................................................... 23
7.3 Acquisition Control ................................................................................................................................ 24
7.3.1 External Triggers on GPIO Connector ............................................................................................. 25
7.3.2 CXP Trigger Line .............................................................................................................................. 25
7.3.3 Scan Direction ................................................................................................................................. 26
7.3.4 Full Exposure Control Mode ........................................................................................................... 27
7.3.5 GenICam Triggers ........................................................................................................................... 29
7.3.6 Trigger Presets ................................................................................................................................ 30
7.3.7 Rescaler .......................................................................................................................................... 31
7.4 Digital I/O Control .................................................................................................................................. 32
7.5 Counters & Timers Control .................................................................................................................... 34
7.5.1 Counters ......................................................................................................................................... 34
7.5.2 Timers ............................................................................................................................................. 36
7.6 Gain and Offset ...................................................................................................................................... 37
7.7 Flat Field Correction .............................................................................................................................. 40
7.7.1 Automatic Calibration ..................................................................................................................... 43
7.7.2 Manual Flat Field Correction .......................................................................................................... 43
7.7.3 Save & Restore FFC in User Memory Banks ................................................................................... 44
7.8 Look Up Table ........................................................................................................................................ 45
7.8.1 Save & Restore LUT in User Memory Banks ................................................................................... 45
7.9 Statistics and Line Profile ....................................................................................................................... 47
7.10 Privilege Level ...................................................................................................................................... 48
7.11 Save & Restore Settings in User Memory Banks ................................................................................. 49
APPENDIX ................................................................................................................................ 50
Appendix A. Test Patterns ........................................................................................................ 51
A.1 Test Pattern 1: Vertical wave ................................................................................................................ 51
A.2 Test Pattern 2: Fixed Horizontal Ramps ................................................................................................ 51
A.1.2 In 8 bits (Full) format – No Binning (16384 pixels) ......................................................................... 51
A.2.2 In 12 bits (Medium) format – No Binning (16384 pixels) ............................................................... 52
A.3.2 In 8/12 bits Full/Medium format with Binning (8192 Pixels) ......................................................... 53
Appendix B. Timing Diagrams ................................................................................................... 54
B.1 Synchronization Modes with Variable Exposure Time .......................................................................... 54
B.2 Synchronisation Modes with Maximum Exposure Time ....................................................................... 55