Broadcom AV02-3395EN_UG_HFCT-5014_Eval-Board_2012-02-23 User guide

Type
User guide
HFCT-5014 Evaluation Board
For Avago Technologies HFCT-711XPDZ, HFCT-721XPDZ
10 Gb/s 1310 nm Optical Transceiver
User Guide
Introduction
The document provides a brief introduction to the Avago
HFCT-711XPDZ and HFCT-721XPDZ 1310 nm hotplugga-
ble XFP transceivers. It describes the functionality of the
evaluation board and suggests a recommended proce-
dure to test the product. It should be used in conjunction
with the XFP preliminary Data Sheet.
The Avago HFCT-7**XPDZ is a single mode 1310 nm
optical transceiver that has a link distance of up to 10 km
(10 GbE and 10 GFC) or 2 km (OC192). The transmitter con-
tains a directly modulated 1310 nm Distributed Feedback
(DFB) laser, and a PIN photo detector within the receiver
section. The module is fully compliant to the XFP Multi
Source Agreement and to the appropriate 10 Gb/s stan-
dards for the networking protocol. The optical interface to
the module is provided via a duplex LC receptacle and the
electrical interface through a 30 pin pluggable connector.
1
Some evaluation boards may not be populated with the 1/64
reference clock oscillators.
Figure 1a. Evaluation board top surface (XFP heat sink removed)
Figure 1b. Detail of jumpers and power supply  lters
(XFP cage and heatsink removed)
Evaluation board and Graphical User Interface, GUI
The evaluation kit comprises:
Quantity Description
1 CD-ROM containing the GUI and the XFP
preliminary data sheet
3 sets Power Supply Leads for 2.0mm connector
1 Evaluation board (PCB) including micro controller
1 Preliminary Documentation: Data sheet
1 Standard RS232 male/female cable
A photograph of the evaluation board is shown in Figure
1a
[1]
. Figure 1b shows a close-up (cage removed) of the
module are and shows all electrical connections and the
default setting for the jumpers. This setting enables micro-
processor control of the XFP module and evaluation board.
Note all of the PCB connections, including the RS232 lead,
must be completed prior to the supply of power to the
PCB. However, the XFP module maybe ‘hot-plugged’ into
the PCB after the power supply has been connected.
SW1 - all o
B jumpers - all on
C jumpers - all o
A jumpers - all on
Manual Mod_Desel - on
I2C lines - both on
+3.3V+5V-5.2V +1.8V +1.8V+3.3V GND
2
Power Supply Filters
As suggested in the XFP MSA, the evaluation board is  tted
with a power supply  lter network for each of the power
supply pins on the XFP connector. Where there are two
pins on the XFP30 connector for a Vcc supply level, e.g. 3.3
V, there are two separate supply  lters to enable the isola-
tion of one of the supply rails. Each of the six power supply
lters can be con gured in the following ways:
1. Filter connected
2. Filter bypassed
Note that the power supply for the evaluation board ICs is
not  ltered as it is directly connected to connector 4. This
connection must be present under all circumstances.
See Table 2 for the appropriate jumper settings for each
power supply  lter.
C5
100 nF
C4
22 PF
L1 4.7 PH
C3
100 nF
12
JP1
JUMPER A
JP3
JUMPER B
JP4
JUMPER C
Vcc5_6
12
1
2
CON1
2.0 mm connector
12
Figure 2. Example of the eval board power supply  lter circuit
Table 2. Jumper numbers for each power supply  lter
2 mm Connector Voltage supply Jumper A Jumper B Jumper C
Con 1 +5 V JP1 JP3 JP4
Con 2 -5.2 V JP2 JP5 JP10
Con 3 +1.8 V JP9 JP11 JP12
Con 4 +3.3 V JP13 JP14 JP15
Con 5 GND N/A N/A N/A
Con 6 +1.8 V JP16 JP18 JP19
Con 7 +3.3 V JP17 JP20 JP21
Note: The maximum current on any single connector is 1.0 A.
For each of the power supply circuits, the following modes
of operation are used:
1. When Jumpers A and B are ON’ and C is o the  lter
is connected. This is the recommended mode of
operation.
2. When Jumpers A and B are o and only C is ‘ON’ the
power supply  lter is bypassed. This mode is useful for
testing individual Vcc power supply noise immunity.
See the XFP MSA for Power Supply Noise Immunity
testing requirements. When the Vcc pairs present on
the connector are connected within the module, only
one of the 2.0 mm connectors need be used. However,
the maximum current of 1.0 A of the XFP connector
must be considered.
3
Manual control mode
The 4 dipswitches (SW1) allow the user to manually
control the P_Down/RST, Tx_Dis, and Mod_Desel pins
on the 30 pin connector. In order to place the evaluation
board under microprocessor control all 4 dipswitches
must be set to ‘OFF’.
In order to enter manual control mode it is necessary to
set dipswitch 4 (marked as “Not used” on the evaluation
board) to ON” – this causes the microcontroller on the
evaluation board to release control of the XFP module
and its connector. The behaviour of dipswitches 1-3 when
the evaluation board is in manual mode is summarised in
Table 3.
Other jumpers and switches
Jumper 8 interrupts the connection between dipswitch
3 and the 30 pin connector. If the evaluation board is in
manual mode (dipswitch 4 set to ON”), setting jumper
8 to “OFF” will set the Mod_Desel pin to a high state dis-
abling the I
2
C interface in the XFP module. It is recom-
mended that this jumper be left in the “ON” position and
Table 3.
Dipswitch When set to “OFF” When set to “ON”
1 Sets the P_down/RST pin on the 30 pin connector to ‘1’,
setting the XFP module in power down mode
Sets the P_down/RST pin on the connector to ’ 0’,
setting the XFP module in normal mode and resetting
the module completely
2 Sets the TX_Dis pin on the 30 pin connector to ‘1’,
disabling laser output
Sets the TX_Dis pin on the connector to ‘0’, enabling
laser output
3 Sets the Mod_Desel pin on the 30 pin connector to ‘1’,
disabling the I
2
C interface in the XFP module
Sets the Mod_Desel pin on the 30 pin connector to ‘0’,
enabling the I
2
C interface in the XFP module.
Table 4.
LED Name Colour Description
Mod_desel Green Module selected for communication
Red Module de-selected
Tx Disable Green Laser output enabled
Red Laser disabled
Interrupt Green Module status normal
Red Internal Fault Detected Interrupt Requested
Mod_ABS Green Module present
Red Module not correctly inserted
Rx_LOS Green Light input to Rx is normal
Red Light input to Rx is below the limit
Green Module status is ok
Mod_NR Red MOD_NR = (Txfault asserted) OR (Loss of lock on the Tx) OR (Loss of Lock in Rx signal conditioners)
** Logical OR of 3 possible fault conditions. Red indicates one or more of the fault conditions has
occurred.
Oscillator
enable
Green Oscillator enabled
Red Oscillator disabled
that dipswitch 3 be used to control the logic level on the
Mod_Desel pin when in manual mode.
Jumpers 6 and 7 interrupt the SDA and SCL lines re-
spectively of the I
2
C bus. Setting either of these to OFF”
will impede communication between the microcon-
troller on the evaluation board and the XFP module. It is
recommended that these two jumpers be set to the ON”
position.
Button A1 is for resetting the evaluation board to its
default (power-up) state. Pressing this button will also
reset the XFP module by cycling the P_down/RST pin.
Button A100 is for selecting the reference clock mode. The
possible modes are: 10GbE, 10GFC, OC192, EXT. See the
section entitled “Reference clock options for details.
LED Indicators
There are several LED indicators on the board. They are
listed in table 4, below.
4
10GbE 10GFC OC192
None/Ext
Ref Clock
Figure 3. Reference Clock Selection sequence using “RefCLKsel” button”
Reference clock options
Further LED indicators inform the user of which reference
clock oscillator is currently in use
2
. By depressing the Re-
fCLKsel button on the board, one of the three oscillators
are sequentially selected. A fourth depression results in
all of the oscillators being disabled to allow the user to
connect a baud/64 di erential reference clock to the two
SMAs marked Refclk+ and Refclk-. This external clock can
be either synchronous or asynchronous with the incom-
ing electrical data to the XFP transmitter, see the XFP MSA
for conditions of use.
2
Some evaluation boards may not be populated with the 1/64 reference clock oscillators.
Figure 4. Optimal receiver output eye
High speed signals
The evaluation board has been made using standard
FR4, and the high speed traces for transmit and receive
signals are approximately 4” in length. Hence the board
is not suitable for compliance testing of the XFP receiver
output eye as it has already been degraded by the traces
by the time it reaches the SMA connector. An example of
an optimal output eye is shown in Figure 4. This was ob-
tained by passing a signal from a 10Gb/s BERT through
the 30-pin connector using a host-compliance test board
as described in the XFP MSA.
The XFP transmitter input signal amplitude can be varied
to test for module compliance to the XFP MSA. When
testing Avago XFP modules error-free operation can be
observed when an input signal compliant to MSA Com-
pliance Point B is input to the evaluation board, showing
that Avago XFP modules signi cantly exceed the MSA
requirements.
5
How to install the Graphical User Interface, GUI
The graphical user interface is supplied as a self-extracting
installation  le for Win32-based personal computers. The
executable  le can be copied from the supplied CD-ROM
to a convenient location on the hard drive and run directly
by double-clicking. This will install all necessary software
and create a program group in the Start Menu.
Using the VIEWER Program
When the program is  rst started, there is an initial
welcome splash screen. The evaluation board is preset
to its default condition. The oscillator mode is set to o .
The TX Disable is set to OFF’ (enabled). The Power Down
line is also set to ‘OFF’ (powered up). The screen shown in
Figure 5 is then displayed.
The VIEWER program consists of 5 tabbed pages, three
pull-down menus, and a series of buttons along the
bottom edge. The buttons permit the reading of the data
from the module once only or repeatedly every 1 or 5
seconds. A repeated ‘Read’ can be stopped by using the
Figure 5. GUI opening screen
“Stop Reading button. Please note, any changes made
to the write-able areas of the GUI are not written to the
module until the Write” button is pushed.
Pull-Down Menus
Main: Allows reading the whole of the A0 address space.
The contents of the upper 128 bytes of this space can be
one of various tables depending upon the value of the
table select byte (byte 127). Also allows exiting the GUI
application.
Communication: Allows the choice of the RS232 com
port used by the GUI (default COM1), the selection of fre-
quency of the I
2
C bus, and the frequency of the on-board
reference clock oscillators (if populated). In addition, this
menu contains items for de/asserting the Pdown/RST and
TxDisable pins on the 30-pin connector, and for display-
ing the modules FW revision (this function is speci c to
Avago Technologies).
Help: Displays information about the GUI application itself.
6
Tabbed Pages
The tabbed pages provide an MSA-compliant interface
to the memory space of the XFP module. There are three
pages which cover the address space A0 up to byte 118, in
which the MSA de ned registers are listed and interpreted,
so that both raw register contents and calibrated data are
displayed.
The page entitled A0: Address 0-57” displays the contents
of the signal conditioner control byte and the alarm and
warning threshold values. Some of the bits of the signal
conditioner control byte are userprogrammable – please
see the Avago Technologies HFCT-711XPDZ datasheet for
information on which of these options are available.
The page entitled A0: Address 58-87” displays registers
pertaining to Variable Power Supply control, and also to
BER, FEC, and wavelength control features. Please refer
to the HFCT-711XPDZ datasheet for further information
on the availability of these features. The lower half of this
page shows the status of all the latched  ags showing
alarm or warning conditions. Once read, these are cleared,
but will be re-asserted if the alarm or warning condition
persists.
The page entitled A0: Address 89-118” displays the
masking  ags corresponding to the latched interrupt
ags. Selecting one or more of these prevents the corre-
sponding fault condition in the module from generating
an interrupt. At the bottom of the page, the values of the
analog readbacks are shown, both as raw register values
and as scaled physical quantities. To the right of this area,
the two status bytes are shown (bytes 110 and 111). In the
former, it is possible to set the SoftPDown and SoftTxDis-
able bits to put the module into the corresponding state.
Finally, at the bottom right of the page, it is possible to
enable or disable packet error checking.
The page entitled “Demo Screen displays all of the analog
readbacks in large format (see the HFCT-711XPDZ data-
sheet for the de nition of the AUX-1 and AUX_2 signals),
along with the most important fault  ags: TxFault, LOS,
TxLoL, RxLoL, ModNR. To the left, there is information on
the Manufacturer, Serial Number and Part Number; dis-
played are also the oscillator frequency and the data rate
selected. The data rate is read back from the appropriate
register in the module and does not necessarily re ect the
actual data rate being transmitted or received.
On page entitled “Paging, it is possible to enter the user
or vendor passwords. There is also a  eld for entering a
new user password. To the right, there is a pull-down
menu for page selection, and a button for viewing the
contents of that page. If the page selected is 1, then a new
window with three tabbed pages is opened. These detail
the contents of the Serial ID registers in the module and
are selfexplanatory. For other values of the page number,
a new window is opened which lists the contents of all the
registers in that page in hexadecimal. It is also possible to
write to these registers by selecting the checkbox for the
bytes in question, writing the new value in the appropri-
ate  elds, and pushing the “Write button.
7
Bill of Materials for the XFP Customer Evaluation Board
Table 5 shows the full bill of materials with details of vendors used for some of the components.
Table 5. Bill of Material for Eval Board
Used Part Type Designator Footprint Vendor/Part number
9 0 Ohm R15 R16 R17 R27 R28 R29
R102 R110 R111
0603 Resistors
7 2.0 mm connector CON1 CON2 CON3 CON4 CON5 CON6 CON7 2 MM_SOCKET Connector: Farnell no. 497-162
2 4.7 k R1 R2 0603 Resistors
6 4.7 H
L1 L2 L3 L4 L5 L6 L_FILTER
8 10 k R3 R4 R5 R6 R24 R112 R26 R109 R25 0603 Resistors
1 10 nF C22 0603 Capacitor
1 22 k R7 0603
6 22 F
C4 C8 C9 C13 C16 C19 0603 Capacitor
J1 30 PIN XFP 30 PIN surface mount connector XFP-CON30 C onnector
2 47nF C1 C2 0603 Capacitor
3 74LVC04APW Logic1 Logic2 Logic100 TSSOP14 Logic IC
2 100 Ohm R30 R31 0402
22 100 nF C3 C5 C6 C7 C10 C11 C12 C14 C15 C17 C18 C20
C21 C23 C25 C26 C27 C28 C29 C100 C101 C102
0603 Capacitor
3 100 nF C24 C30 C103 0603 Capacitor
2 100 ohm R8 R113 0603 Resistors
2 130 R100 R101 0603
16 150 Ohm R11 R12 R13 R14 R18 R19 R20 R21 R22 R23 R103
R104 R105 R106 R107 R108
0603
1 Bit rate select A100 DTS6 Microswitch
21 JUMPER JP1 JP2 JP3 JP4 JP5 JP6 JP7 JP8 JP9 JP10 JP11
JP12 JP13 JP14 JP15 JP16 JP17 JP18 JP19 JP20
JP21
Jumper
9 LED_RG L7 L8 L9 L10 L11 L12 L100 L101 L102 LED_RG
1 MAX3232CPE U2 DIP16 Maxim IC
1 Micro Reset A1 DTS6 Microswitch
1 OSCILLATOR O1 OSC-2770Y (10.0 MHz)
3 Oscillator
OSC100
OSC101
OSC102
SD-A2920
SD-A2920
SD-A2920
NEL Frequency Controls Inc.
DPECL (161.13 MHz)
DPECL (164.35 MHz)
DPECL (155.52 MHz)
1 PIC16LF876 U1 DIP28-300 Microcontroller
1 RJ11 Connector RJ-RA 8 Pin Header
9 pin D-type RS232 Connector F. DB-9/F Connector
SMA5 SMA3 SMA4 SMA7
SMA6 SMA1 SMA2
SMA Connector Rosenberger 32K243-40ME3
1 SW-DIP4 SW1 DIPSWITCH4 DIP Switch
8
1 2
3 4
5
6
7 8
9 10
11
12
13 14
15 16
17 18
19
20
21 22
23 24
25
26
27
28
U1
PIC16LF876
Mod_ABS
A1
Micro Reset
R8
100 ohm
C22
10nF
R7
22k
C23
100nF
R1 IN
13
R2 IN
8
T1 IN
11
T2 IN
10
GND
15
V+
2
V-
6
VCC
16
R1 OUT
12
R2 OUT
9
T1 OUT
14
T2 OUT
7
C1+
1
C1 -
3
C2+
4
C2 -
5
U2
MAX3232CPE
C26
100nF
C27
100nF
C28
100nF
C29
100nF
1
2
3
4
5
6
7
8
9
PC1
RS232 Connector F.
RS232_TX
RS232_RX
C25
100nF
GND
RS232_TX RS232_RX
SDA
SCL
Mod_NR
STANDBY
1
GND
2
OUTPUT
3
VDD
4
O1
OSCILLATOR
C21
100nF
Tx_Dis
Pwd/RST
Mod_desel
Interrupt
Rx_LOS
1 2
3 4
5 6
7 8
9 10
11 12
13 14
Logic1
74LVC04APW
C24
100 nF
R10
150 Ohm
R9
150 Ohm
1
3
2
4
RED
GREEN
L7
LED_RG
R12
150 Ohm
R11
150 Ohm
1
3
2
4
RED
GREEN
L8
LED_RG
R14
150 Ohm
R13
150 Ohm
1
3
2
4
RED
GREEN
L9
LED_RG
R15
0 Ohm
R16
0 Ohm
R17
0 Ohm
Mod_desel
Interrupt
Tx_Dis
1
2
3 4
5 6
7
8
9 10
11 12
13 14
Logic2
74LVC04APW
C30
100 nF
R19
150 Ohm
R18
150 Ohm
1
3
2
4
RED
GREEN
L10
LED_RG
R21
150 Ohm
R20
150 Ohm
1
3
2
4
RED
GREEN
L11
LED_RG
R23
150 Ohm
R22
150 Ohm
1
3
2
4
RED
GREEN
L12
LED_RG
R29
0 Ohm
R28
0 Ohm
R27
0 Ohm
Mod_ABS
Mod_NR
Rx_LOS
R26
10k
R25
10k
R24
10k
Vcc_IC
Vcc_IC
Vcc_IC
Vcc_IC
Vcc_IC
Vcc_IC
Vcc_IC
Vcc_IC
R31
100 Ohm
1
2
3
4
5
6
7
8
RJ1
RJ11 for uP on EvalBoard
R30
100 Ohm
Man_Sw
10GbE_enable
OC192_enable10GFC_enable
U1_pin6
The schematics of the evaluation board are shown in the following pages.
9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
J1
30 PIN XFP CONNECTOR
GND
TD+
TD-
GND
Ref clk-
Ref clk+
GND
Pwd/RST
Vcc2
GND
RD+
RD-
GND
GND
Rx_LOS
ModNR
Mod_ABS
SDA
SCL
Vcc3
Vcc3
GND
Vcc5
TxDis
Interrupt
Mod_des
Vee5
GND
GND
C1
47nF
C2
47nF
Pwd/RST
Vcc2_20
SDA
SCL
Pin9
Pin8
Vcc5_6
Tx_Dis
Interrupt
Mod_Desel
Vee5_2
Rx_LOS
ModNR
Mod_Abs
L4
4.7uH
C14
100nF
C12
100nF
1
2
JP13
JUMPER
Pin9
1
2
JP14
JUMPER
1
2
JP15
JUMPER
1
2
3
4
8
7
6
5
SW1
SW-DIP4
R6
10k
1
2
JP6
JUMPER
1
2
JP7
JUMPER
Vcc2_22
Vcc2
Vcc3.3V
R3
10k
R4
10k
R5
10k
1
2
JP8
JUMPER
R1
4.7k
R2
4.7k
Vcc_IC
Vcc_IC
Man_Sw
Refclk_P
Refclk_N
Vcc_IC
C13
22uF
Vcc_IC
1
2
3
SMA1
TD+
1
2
3
SMA2
TD-
1
2
3
SMA5
Ref_clk+
1
2
3
SMA4
SMA RD+
1
2
3
SMA3
Ref_clk-
1
2
3
SMA6
SMA RD-
1
2
CON4
2.0mm connector
L3
4.7uH
C11
100nF
C7
100nF
1
2
JP9
JUMPER
Vcc2_22
1
2
JP11
JUMPER
1
2
JP12
JUMPER
L6
4.7uH
C20
100nF
C18
100nF
1
2
JP17
JUMPER
Pin8
1
2
JP20
JUMPER
1
2
JP21
JUMPER
L1
4.7uH
C5
100nF
C3
100nF
1
2
JP1
JUMPER
Vcc5_6
1
2
JP3
JUMPER
1
2
JP4
JUMPER
L5
4.7uH
C17
100nF
C15
100nF
1
2
JP16
JUMPER
Vcc2_20
1
2
JP18
JUMPER
1
2
JP19
JUMPER
L2
4.7uH
C10
100nF
C6
100nF
1
2
JP2
JUMPER
Vee5_2
1
2
JP5
JUMPER
1
2
JP10
JUMPER
Vcc5.0V
Vee5.0V
Vcc1.8V
Vcc1.8V
Vcc3.3V
C4
22uF
C8
22uF
C9
22uF
C16
22uF
C19
22uF
1
2
CON1
2.0mm connector
1
2
CON2
2.0mm connector
1
2
CON3
2.0mm connector
1
2
CON6
2.0mm connector
1
2
CON7
2.0mm connector
1
2
CON5
2.0mm connector
10
1 2
3 4
5 6
7
8
9 10
11
12
13
14
Logic100
74LVC04APW
C103
100 nF
10GbE_enable
R104
150 Ohm
R103
150 Ohm
1
3
2
4
RED
GREEN
L100
LED_RG
10GFC_enable
R106
150 Ohm
R105
150 Ohm
1
3
2
4
RED
GREEN
L101
LED_RG
OC192_enable
R108
150 Ohm
R107
150 Ohm
1
3
2
4
RED
GREEN
L102
LED_RG
R102
0 Ohm
R110
0 Ohm
R111
0 Ohm
Vcc_IC
10GbE_enable
10GFC_enable
OC192_enable
Vcc_IC
Refclk_P
10GbE_enable
OC192_enable
1 2
3 4
5
6
OSC100
Oscillator DPECL
C100
100nF
Refclk_N
Refclk_P
1 2
3 4
5 6
OSC102
Oscillator DPECL
C102
100nF
Refclk_N
Refclk_P
10GFC_enable
1
2
3
4
5
6
OSC101
Oscillator DPECL
C101
100nF
Refclk_N
Vcc_IC
Vcc_IC
Refclk_N
Refclk_P
R100
130
R101
130
R109
10k
Vcc_IC
Man_Sw
A100
Bit rate select
R113
100 ohm
R112
10k
Vcc_IC
U1_pin6
Figure 6. Schematic for the additional components to provide on-board reference clocks
For product information and a complete list of distributors, please go to our web site: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2012 Avago Technologies. All rights reserved.
AV02-3395EN - February 23, 2012
Errata
In versions of the evaluation board prior to v3.1 there is a trace
missing in the 5 V power supply  lter (visible on the top surface
between C3 and L1). In order to use the 5 V supply it is necessary
to bypass the  ltering by setting jumper JP4 to ‘ON’.
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Broadcom AV02-3395EN_UG_HFCT-5014_Eval-Board_2012-02-23 User guide

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User guide

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