Texas Instruments Universal Op Amp Eval Module With Shutdown User guide

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1998 Mixed-Signal Products
Users Guide
SLVU009
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
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pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customers applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
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Copyright 1998, Texas Instruments Incorporated
How to Use This Manual
iii
Read This First
Preface
Read This First
About This Manual
This Users Guide describes the universal operational amplifier (op amp) eval-
uation module (EVM) with shutdown that can be used to construct many op
amp evaluation circuits. Schematics of the EVM and several example circuits
are included.
How to Use This Manual
This document contains the following chapters:
Chapter 1 Introduction
Chapter 2 Schematics
Chapter 3 Board Layout
Chapter 4 Example Circuits
FCC Warning
This equipment is intended for use in a laboratory test environment only. It gen-
erates, uses, and can radiate radio frequency energy and has not been tested
for compliance with the limits of computing devices pursuant to subpart J of
part 15 of FCC rules, which are designed to provide reasonable protection
against radio frequency interference. Operation of this equipment in other en-
vironments may cause interference with radio communications, in which case
the user at his own expense will be required to take whatever measures may
be required to correct this interference.
Trademarks
TI is a trademark of Texas Instruments Incorporated.
iv
Running Title—Attribute Reference
v
Chapter Title—Attribute Reference
Contents
1 Introduction 1-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.1 Design Features 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2 Power Requirements 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2 Schematics 2-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1 Area Schematics 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3 Board Layout 3-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1 Physical Considerations 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.1 Area 100 – SOIC 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.2 Area 200 – MSOP 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.3 Area 300 – SOIC 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.4 Area 400 – SOT23-6 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2 Component Placement 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.3 Board Layout 3-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4 Example Circuits 4-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.1 Schematic Conventions 4-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.2 Sallen-Key Low-Pass Filter 4-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.3 Sallen-Key High-Pass Filter 4-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.4 Inverting Amplifier 4-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.5 Noninverting Amplifier 4-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.6 Two Operational Amplifier Instrumentation Amplifier 4-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.7 Differential Amplifier 4-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Running Title—Attribute Reference
vi
Figures
2–1 Area 100 Schematic – SOIC (14 pin) 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–2 Area 200 Schematic – MSOP (10 pin) 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–3 Area 300 Schematic – SOIC (8 pin) 2-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–4 Area 400 Schematic – SOT23-6 (6 pin) 2-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–1 Component Placement 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–2 Board Layout Top 3-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–3 Board Layout Bottom 3-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4–1 Sallen-Key Low-Pass Filter with Dual Supply Using Area 100 4-3. . . . . . . . . . . . . . . . . . . . . . .
4–2 Sallen-Key High-Pass Filter with Single Supply Using Area 200 4-5. . . . . . . . . . . . . . . . . . . . .
4–3 Inverting Amplifier with Dual Supply Using Area 300 4-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4–4 Noninverting Amplifier with Single Supply Using Area 400 4-7. . . . . . . . . . . . . . . . . . . . . . . . . .
4–5 Two Operational Amplifier Instrumentation Amplifier with Single Supply
Using Area 200 4-9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4–6 Single Operational Amplifier Differential Amplifier with Single Supply
Using Area 300 4-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1-1
Introduction
Introduction
This Users Guide describes a universal operational amplifier (op amp)
evaluation module (EVM) with shutdown (#SLOP224). The EVM simplifies
evaluation of Texas Instruments surface-mount op amps with the shutdown
feature.
Topic Page
1.1 Design Features 1–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2 Power Requirements 1–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 1
Design Features
1-2
Introduction
1.1 Design Features
The board design allows many circuits to be constructed easily and quickly.
The board has four circuit development areas that can be snapped apart.
Areas 100 and 200 are for dual op amps in the SOIC and MSOP packages.
Area 300 is for single op amps in SOIC packages. Area 400 is for single op
amps in SOT23-6 packages. A few possible circuits are as follows:
Voltage follower
Noninverting amplifier
Inverting amplifier
Simple or algebraic summing amplifier
Difference amplifier
Current to voltage converter
Voltage to current converter
Integrator/low-pass filter
Differentiator/high-pass filter
Instrumentation amplifier
Sallen-Key filter
Two-layer board construction with a ground plane on the solder side ensures
that circuit performance will be on par with final production designs.
1.2 Power Requirements
The devices and designs that are used dictate the input power requirements.
Three input terminals are provided for each area of the board:
Vx+ Positive input power for area x00 i.e., V1+ area 100
GNDx Ground reference for area x00 i.e., GND2 area 200
Vx– Negative input power for area x00 i.e., V4– area 400
Each area has four bypass capacitors – two for the positive supply, and two
for the negative supply. Each supply should have a 1-µF to 10-µF capacitor for
low frequency bypassing and a 0.01-µF to 0.1-µF capacitor for high frequency
bypassing.
When using single-supply circuits, the negative supply is shorted to ground by
bridging C112 or C113 in area 100, C212 or C213 in area 200, C305 or C306
in area 300, or C405 or C406 in area 400. Power input is between Vx+ and
GNDx. The voltage reference circuitry is provided for single-supply
applications that require a reference voltage to be generated.
2-1
Schematics
Schematics
This chapter contains schematics and pin-outs for each of the four areas.
Topic Page
2.1 Area Schematics 2–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 2
Area Schematics
2-2
Schematics
2.1 Area Schematics
Figures 2–1 through 2–4 show schematics for each of the board areas. The
schematics show all components that the board layout can accommodate.
These should only be used as reference, since not all components will be used
at any one time.
Figure 2–1.Area 100 Schematic – SOIC (14 pin)
C104 C105
C112 C113
V1+
V1–
V1+
GND1
V1–
Power Supply Bypass
+
14
1
4
3
2
V1+
V1–
R106
C115
R119
C106
R121
R110
R120
R109
R108
R118C114
C107
A1OUT
1/2 Dual Op Amp
A101–
A102–
A103+
A104+
+
13
11
12
R104
C109
R113
C102
R103
R102
R112
R101
R111
R114
C110
C101
B1OUT
1/2 Dual Op Amp
B101–
B102–
B103+
B104+
R116
C
R
A
U102
R117
Voltage Reference
V1+
VREF1
U101a
U101b
R115
A1/SD
C108
R107
A1 FLT
B1/SD
9
C103
R105
B1 FLT
C111
U101 pins 5, 7, 8, and 10 = NC
6
Area Schematics
2-3
Schematics
Figure 2–2.Area 200 Schematic – MSOP (10 pin)
B2/SD
C204 C205
C212 C213
V2+
V2–
V2+
GND2
V1–
Power Supply Bypass
+
10
1
4
3
2
V2+
V2–
R206
C215
R219
C206
R221
R210
R220
R209
R208
R218
C214
C207
A2OUT
1/2 Dual Op Amp
A201–
A202–
A203+
A204+
+
R204
C209
R213
C202
R203
R202
R212
R201
R211
R214
C210
C201
B2OUT
1/2 Dual Op Amp
B201–
B202–
B203+
B204+
R216
C
R
A
U202
R217
Voltage Reference
U201a
U201b
V2+
VREF2
R215
9
7
8
C208
R207
A2 FLT
C203
R205
B2 FLT
A2/SD
5
C211
6
Area Schematics
2-4
Schematics
Figure 2–3.Area 300 Schematic – SOIC (8 pin)
C304 C303
C305 C306
V3+
V3–
V3+
GND3
V3–
Power Supply Bypass
+
7
6
4
3
2
V3+
V3–
R302
C302
R301
C301
R303
R304
R307
R308
R309
R306
C309
C308
3OUT
301–
302–
303+
304+
R311
C
R
A
U302
R310
Voltage Reference
U301
V3+
VREF3
R312
C307
R305
3 FLT
3/SD
8
C310
U301 pins 1 and 5 = NC
Figure 2–4.Area 400 Schematic – SOT23-6 (6 pin)
C404 C403
C405 C406
V4+
V4–
V4+
GND4
V4–
Power Supply Bypass
+
6
1
2
3
4
V4+
V4–
R402
C402
R401
C401
R403
R404
R407
R408
R409
R406
C409
C408
4OUT
401–
402–
403+
404+
R411
C
R
A
U402
R410
Voltage Reference
U401
V4+
VREF4
R412
C407
R405
4 FLT
4/SD
5
C410
3-1
Board Layout
Board Layout
This chapter shows the universal op amp EVM with shutdown board layout,
and describes the relationships between the four areas.
Topic Page
3.1 Physical Consideration 3–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2 Component Placement 3–3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.3 Board Layout 3–4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 3
Physical Considerations
3-2
Board Layout
3.1 Physical Considerations
The EVM board has four circuit development areas. Each area can be
separated from the others by breaking along the score lines. The circuit layout
in each area supports an op amp package, voltage reference, and ancillary
devices. The op amp package is unique to each area as described in the
following paragraphs. The voltage reference and supporting devices are the
same for all areas. Surface-mount or through-hole components can be used
for all capacitors and resistors on the board.
The voltage reference can be either surface-mount or through-hole. If surface
mount is desired, the TLV431ACDBV5 or TLV431AIDBV5 adjustable shunt
regulators can be used. If through hole is desired, the TLV431ACLP,
TLV431AILP, TL431CLP, TL431ACLP, TL431ILP or TL431AILP adjustable
shunt regulators can be used. Refer to Texas Instruments’
Power Supply
Circuits Data Book
(literature number SLVD002) for details on usage of these
shunt regulators.
Each passive component (resistor or capacitor) has a surface mount 1206
footprint with through holes at 0.2 spacing on the outside of the 1206 pads.
Therefore, either surface-mount or through-hole parts can be used.
3.1.1 Area 100 – SOIC
Area 100 uses 1xx reference designators, and is compatible with dual op amps
with shutdown packaged as a 14-pin SOIC. This surface-mount package is
designated by a D suffix in TI part numbers, as in TLV2463CD, TLV2363ID,
TLV2263AID, etc. Refer to Figure 2–1 for a schematic.
3.1.2 Area 200 – MSOP
Area 200 uses 2xx reference designators, and is compatible with dual op amps
with shutdown packaged as a 10-pin MSOP. The MSOP package is
designated by a DGS suffix in TI part numbers, as in TLV2463CDGS. Refer
to Figure 2–2 for a schematic.
3.1.3 Area 300 – SOIC
Area 300 uses 3xx reference designators, and is compatible with single op
amps with shutdown packaged in the 8-pin SOIC package. This surface-
mount package is designated by a D suffix in TI part numbers, as in
TLV2461CD. Refer to Figure 2–3 for a schematic.
3.1.4 Area 400 – SOT23-6
Area 400 uses 4xx reference designators, and is compatible with single op
amps with shutdown packaged in the 6-pin SOT-23 package. This
surface-mount package is designated by a DBV suffix in TI part numbers, as
in TLV2460CDBV. Refer to Figure 2–4 for a schematic.
Component Placement
3-3
Board Layout
3.2 Component Placement
Figure 3–1 shows component placement for the EVM board.
Figure 3–1.Component Placement
V2+ GND2
Area 100
B104+
B103+
B102–
B101–
B1_OUT
B1_FLT
V1+
B1/SD
VREF1
GND1
A1SD
V1–
A1_OUT
A1_FLT
A104+
A103+
A102–
A101–
1
18
J101
R101
C101
R102
R103
R104
C102
R105
C103
C104
C105
U101
C106
R106
C107
R107
C108
R108
R109
R110
R111
C109
R112
R113
C110
R114
C111
R115
R116
C112
C113
C114
R117
R118
R119
R120
C115
R121
Texas Instruments, 1998
UNIVERSAL OPAMP EVM W/SHUTDOWN
SOIC SLOP224–1
V1+ GND1
REV 2
U102
B204+
B203+
B202–
B201–
B2_OUT
B2_FLT
V2+
B2/SD
VREF2
GND2
A2/SD
V1–
A2_OUT
A2_FLT
A204+
A203+
A202–
A201–
1
18
J201
R201
C201
R202
R203
R204
C202
R205
C203
C204
C205
U201
C206
R206
C207
R207
C208
R208
R209
R210
R211
C209
R212
R213
C210
R214
C211
R215
R216
C212
C213
C214
R217
R218
R219
R220
C215
R221
Texas Instruments, 1998
UNIVERSAL OPAMP EVM W/SHUTDOWN
MSOP SLOP224–2
V2+ GND2
REV 2
U202
V1+ GND1
Texas Instruments, 1998
UNIVERSAL OPAMP EVM W/SHUTDOWN
SOIC SLOP224–3
REV 2
GND3 V3+
R301
C301
R302
C302
R303
R304
C303
C304
R310
R311
U302
R312
C310
U301
C305
C306
R305
C307
C308
C309
R306
R307
R308
R309
VREF3
301–
302–
V3+
GND3
V3–
3FLT
3OUT
303+
304+
3/SD
11
1
GND3 V3+
Texas Instruments, 1998
REV 2
GND4 V4+
R401
C401
R402
C402
R403
R404
C403
C404
C410
R410
R411
U402
R412
U401
C405
C406
R405
C407
C408
C409
R406
R407
R408
R409
VREF4
401–
402–
V4+
GND4
V4–
4FLT
4OUT
403+
404+
4/SD
11
1
GND4 V4+
UNIVERSAL OPAMP EVM W/SHUTDOWN
SOT23–6 SLOP224–4
J301
J401
Score Line
Area 300
Area 200 Area 400
Score Line
Board Layout
3-4
Board Layout
3.3 Board Layout
Figures 3–2 and 3–3 show the EVM top and bottom board layouts,
respectively.
Figure 3–2.Board Layout Top
Board Layout
3-5
Board Layout
Figure 3–3.Board Layout Bottom
3-6
Board Layout
4-1
Example Circuits
Example Circuits
This chapter shows and discusses several example circuits that can be
constructed using the universal operational amplifier EVM. The circuits are all
classic designs that can be found in most operational amplifier design books.
Topic Page
4.1 Schematic Conventions 4–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.2 Sallen-Key Low-Pass Filter 4–3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.3 Sallen-Key High-Pass Filter 4–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.4 Inverting Amplifier 4–7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.5 Noninverting Amplifier 4–8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.6 Two Operational Amplifier Instrumentation Amplifiers 4–9. . . . . . . . . . .
4.7 Differential AMplifier 4–11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 4
Schematic Conventions
4-2
Example Circuits
4.1 Schematic Conventions
Figures 4–1 through 4–6 show schematic examples of circuits that can be
constructed using the universal operational amplifier EVM with shutdown. The
components that are placed on the board are shown in bold. Unused
components are blanked out. Jumpers and other changes are noted. These
examples are only a few of the many circuits that can be built.
/