GW Instek GDS-3000A Logic Analyzer Option User manual

  • I've reviewed the user manual for the GW Instek GDS-3000A DS3A-16LA Logic Analyzer. This document details the setup and operation of the logic analyzer option, including specifics on digital channel configuration, bus decoding for various protocols like UART, I2C, SPI, CAN, and LIN, and different trigger settings. I am ready to answer your questions about this device and its features.
  • What types of logic thresholds are supported?
    What trigger types are supported?
    What serial buses can the analyzer decode?
DS3A-16LA
For GDS-3000A Series
LOGIC ANALYZER OPTION USER MANUAL
ISO-9001 CERTIFIED MANUFACTURER
This manual contains proprietary information, which is protected by
copyright. All rights are reserved. No part of this manual may be
photocopied, reproduced or translated to another language without
prior written consent of Good Will company.
The information in this manual was correct at the time of printing.
However, Good Will continues to improve products and reserves the
rights to change specification, equipment, and maintenance
procedures at any time without notice.
Good Will Instrument Co., Ltd.
No. 7-1, Jhongsing Rd., Tucheng Dist., New Taipei City 236, Taiwan
GDS-3000A Series Options Manual
4
Table of Contents
QUICK REFERENCE ......................................................... 5
Options Menu Tree ........................................................ 6
LOGIC ANALYZER ........................................................... 17
Logic Analyzer Operation ............................................. 19
Bus Key Configuration .................................................. 34
Trigger Settings ............................................................. 63
SPECIFICATIONS ............................................................ 81
INDEX ............................................................................ 82
QUICK REFERENCE
5
QUICK REFERENCE
This chapter describes the menu tree for
functions related to the logic analyzer option.
Options Menu Tree ........................................................ 6
Option Key ......................................................................................... 6
Logic Analyzer .................................................................................... 6
Search - Logic ..................................................................................... 7
Trigger - Logic .................................................................................... 8
Bus ........................................................................................................ 8
Search - Bus ........................................................................................ 9
Trigger - Bus ....................................................................................... 9
Bus - UART ...................................................................................... 10
Bus I2C ........................................................................................... 12
Bus SPI ........................................................................................... 13
Bus Parallel .................................................................................... 14
Bus CAN ........................................................................................ 15
Bus LIN.......................................................................................... 16
GDS-3000A Series Options Manual
6
Options Menu Tree
Option Key
Accesses the functions in the LA/AWG option key.
LA/ AWG
Note
Any option that is not installed will be grayed-out.
Logic Analyzer
Setup the Logic Analyzer inputs.
D15 - D0
On/Off Thresholds Analog
Waveform Height Sample Rate Go Back
D0 ~ D15
Select
On
Off
Set1~Set20
Filename.set
Display
On
Off
Turn On
Turn Off
Turn On
Turn Off
Display
D7~D0
D15~D8
Edit
Labels
D0~D3
D4~D7
D8~D11
D12~D15
Select
XX~XXV
Threshold
User
TTL
5.0V CMOS
3.3V CMOS
2.5V CMOS
ECL
PECL
0V
Choose Preset
Wave_A1
Wave_A2
Select
On
Off
Display
0.1~1.0 X
0.0~8.0 Div
Vertical
Edit
Labels
S
M
L
QUICK REFERENCE
7
Search - Logic
Set the Search function for logic events.
Edge
Pulse Width
Runt
Rise/Fall Time
FFT Peak
Logic
Bus
Search
Search
On
Off
Search
Save All
Marks
Clear All
Marks
Copy Trigger
Settings To
Search
Copy Search
Settings To
Trigger
Search Type
Define Inputs
D0~D15
Select
Clock
High ( H )
Low ( L )
Don’t Care
( X )
Clock EdgeWhen Thresholds
5%
5%
Goes Goes
True False
Is True <
XXns
Is True =
XXns
Is True
XXns
Is True >
XXns
D0~D3
D4~D7
D8~D11
D12~D15
Select
XX~XXV
Threshold
User
TTL
5.0V CMOS
3.3V CMOS
2.5V CMOS
ECL
PECL
0V
Choose Preset
Search
GDS-3000A Series Options Manual
8
Trigger - Logic
Define Inputs
D0~D15
Select
Clock
High ( H )
Low ( L )
Don’t Care
( X )
Type
Logic Mode
Auto
(Untriggered
Roll)
Clock EdgeWhen Threshold
D0~D3
D4~D7
D8~D11
D12~D15
Select
XX~XXV
Threshold
User
TTL
5.0V CMOS
3.3V CMOS
2.5V CMOS
ECL
PECL
0V
Choose Preset
Normal
5%
5%
Goes Goes
True False
Is True <
XXns
Is True =
XXns
Is True
XXns
Is True >
XXns
Holdoff
4ns ~ 10s
Holdoff
Set to
Minimum
Note
The source bus is determined from the bus menu.
Bus
Bus
UART
I2C
SPI
Parallel
CAN
LIN
Goes to the UART bus menu
Goes to the I2C bus menu
Goes to the SPI bus menu
Goes to the Parallel bus menu
Goes to the CAN bus menu
Goes to the LIN bus menu
BUS
B
QUICK REFERENCE
9
Search - Bus
Set the Search function for bus events.
Edge
Pulse Width
Runt
Rise/Fall Time
FFT Peak
Logic
Bus
Search
Search On
Search
On
Off
Search
Save All
Marks
Clear All
Marks
Copy Trigger
Settings To
Search
Copy Search
Settings To
Trigger
Search Type Source Bus
Search
UART*
I2C*
SPI*
Parallel*
Tx Start Bit
Rx Start Bit
Tx End of Packet
Rx End of Packet
Tx Data
Rx Data
Tx Parity Error
Rx Parity Error
Search On
Start
Repeat Start
Stop
Missing Ack
Address
Data
Address/Data
CAN*
LIN*
Search On
Binary
Hex
Data
Search On
Start of Frame
Type of Frame
Identifier
Data
Id & Data
End of Frame
Missing Ack
Bit Stuffing Err
Search On
SS Active
MOSI
MISO
MOSI & MISO
Search On
Sync
Identifier
Data
Id & Data
Wakeup Frame
Sleep Frame
Error
Note
The source bus is determined from the bus trigger
settings.
GDS-3000A Series Options Manual
10
Trigger - Bus
Type
Bus Source Bus
UART*
I2C*
SPI*
Parallel*
Trigger On
Tx Start Bit
Rx Start Bit
Tx End of Packet
Rx End of Packet
Tx Data
Rx Data
Tx Parity Error
Rx Parity Error
Trigger On
Start
Repeat Start
Stop
Missing Ack
Address
Data
Address/Data
Trigger On
SS Active
MOSI
MISO
MOSI & MISO
CAN
LIN
Trigger On
Start of Frame
Type of Frame
Identifier
Data
Id & Data
End of Frame
Missing Ack
Bit Stuffing Err
Trigger On
Sync
Identifier
Data
Id & Data
Wakeup Frame
Sleep Frame
Error
Trigger On
Binary
Hex
Data
Note
The source bus is set in the bus menu.
QUICK REFERENCE
11
Bus - UART
Define Inputs Threshold Configure Bus Display Event Table
Hex
Binary
Polarity Normal
(High = 0)
Custom, 50, 75,
110, 134, 150,
300, 600, 1200,
1800, 2000,
2400, 3600,
4800, 7200,
9600, 14400,
15200, 19200,
28800, 19200,
28800, 31250,
38400, 56000,
57600, 76800,
115200,
128000,
230400,
460800,
921600,
1382400,
1843200,
2764800
Baud Rate
Edit Labels
Bus
UART
D0~D15
Tx Input
D0~D15
Rx Input
Polarity Inverted
(High = 1)
XX~XXV
Threshold
User
TTL
5.0V CMOS
3.3V CMOS
2.5V CMOS
ECL
PECL
0V
Choose Preset
Tx
Rx
Select
Data bits
5~9
Odd
Even
None
Parity
On
Off
Packets
00(NULL)
0A(LF)
0D(CR)
20(SP)
FF
End of Packet
On
Off
Event Table
Save
Event Table ACK
AD0
ADDR
ANALOG
BIT
CAS
CLK
CLOCK
CLR
COUNT
DATA
DTACK
ENABLE
HALT
INT
IN
IRQ
LATCH
LOAD
NMI
User Preset
Edit Character
On
Off
Label Display
Label For
B
Go Back
Goes to the Keypad menu
Edit Character
Analog Source
Digital Source
ASCII
GDS-3000A Series Options Manual
12
Bus I2C
Define Inputs Threshold Include R/W
in address Bus Display Event Table
Hex
Binary
Edit Labels
Bus
I2C
D0~D15
SCLK
D0~D15
SDA
XX~XXV
Threshold
User
TTL
5.0V CMOS
3.3V CMOS
2.5V CMOS
ECL
PECL
0V
Choose Preset
SCLK
SDA
Select On
Off
Event Table
Save
Event Table ACK
AD0
ADDR
ANALOG
BIT
CAS
CLK
CLOCK
CLR
COUNT
DATA
DTACK
ENABLE
HALT
INT
IN
IRQ
LATCH
LOAD
NMI
User Preset
Edit Character
On
Off
Label Display
Label For
B
Go Back
Goes to the Keypad menuEdit Character
Yes
No
Analog Source
Digital Source
On
Off
Data Detail
QUICK REFERENCE
13
Bus SPI
SCLK
SS
MOSI
MISO
Define Inputs Threshold Configure Bus Display Event Table
Hex
Binary
Edit Labels
Bus
SPI
D0~D15
SCLK Input
D0~D15
SS Input
XX~XXV
Threshold
User
TTL
5.0V CMOS
3.3V CMOS
2.5V CMOS
ECL
PECL
0V
Choose Preset
Select On
Off
Event Table
Save
Event Table ACK
AD0
ADDR
ANALOG
BIT
CAS
CLK
CLOCK
CLR
COUNT
DATA
DTACK
ENABLE
HALT
INT
IN
IRQ
LATCH
LOAD
NMI
User Preset
Edit Character
On
Off
Label Display
Label For
B
Go Back
Goes to the Keypad menuEdit Character
D0~D15
MOSI Input
D0~D15
MISO Input
Analog Source
Digital Source
more 1 of 2
SCLK
Active High
Active Low
SS
4~32 bits
Word Size
Bit Order
MS First
Bit Order
LS First
more 2 of 2
GDS-3000A Series Options Manual
14
Bus Parallel
Define Inputs Threshold Bus Display Event Table
Hex
Binary
Edit Labels
Bus
Parallel
XX~XXV
Threshold
User
TTL
5.0V CMOS
3.3V CMOS
2.5V CMOS
ECL
PECL
0V
Choose Preset
On
Off
Event Table
Save
Event Table ACK
AD0
ADDR
ANALOG
BIT
CAS
CLK
CLOCK
CLR
COUNT
DATA
DTACK
ENABLE
HALT
INT
IN
IRQ
LATCH
LOAD
NMI
User Preset
Edit Character
On
Off
Label Display
Label For
B
Go Back
Goes to the Keypad menuEdit Character
Bit D0~D15
D0~D15
1~16
Off
Select Ch
Select Signal
Number of Bits
Clock Edge
D0~D15
Select
QUICK REFERENCE
15
Bus CAN
D0~D15(fixed)
Define Inputs
(Digital Source) Threshold Bit Rate Bus Display Event Table
Hex
Binary
Edit Labels
Bus
CAN
D0~D15
CAN Input
CAN_H
CAN_L
Tx
Rx
Signal Type
Select On
Off
Event Table
Save
Event Table ACK
AD0
ADDR
ANALOG
BIT
CAS
CLK
CLOCK
CLR
COUNT
DATA
DTACK
ENABLE
HALT
INT
IN
IRQ
LATCH
LOAD
NMI
User Preset
Edit Character
On
Off
Label Display
Label For
B
Goes to the Keypad menuEdit Character
Analog Source
Digital Source XX~XXV
Threshold
User
TTL
5.0V CMOS
3.3V CMOS
2.5V CMOS
ECL
PECL
0V
Choose Preset
Custom
10Kbps,
20Kbps,
50Kbps,
125Kbps,
250Kbps,
500Kbps,
800Kbps,
1Mbps
Bit Rate
GDS-3000A Series Options Manual
16
Bus LIN
Define Inputs Threshold Configure Bus Display Event Table
Hex
Binary
Edit Labels
Bus
LIN
D0~D15
LIN Input On
Off
Event Table
Save
Event Table ACK
AD0
ADDR
ANALOG
BIT
CAS
CLK
CLOCK
CLR
COUNT
DATA
DTACK
ENABLE
HALT
INT
IN
IRQ
LATCH
LOAD
NMI
User Preset
Edit Character
On
Off
Label Display
Label For
B
Go Back
Goes to the Keypad menuEdit Character
Analog Source
Digital Source Polarity Normal
(High = 0)
Polarity Inverted
(High = 1)
D0~D15(fixed)
Select
XX~XXV
Threshold
User
TTL
5.0V CMOS
3.3V CMOS
2.5V CMOS
ECL
PECL
0V
Choose Preset
Custom
1.2Kbps
2.4Kbps
4.8Kbps
9.6Kbps
10.417Kbps
19.2Kbps
Bit Rate
v1.x
v2.x
Both
LIN Standard
On
Off
Include Parity
Bits with Id
LOGIC ANALYZER
17
LOGIC ANALYZER
Logic Analyzer Operation ............................................ 19
Overview ........................................................................................... 19
Using the Logic Analyzer Probes .................................................. 20
Digital Display Overview ............................................................... 21
Activating Digital Channels ........................................................... 22
Activate Digital Channels as a Group ............................. 22
Activate Individual Channels ............................................ 23
Moving the Digital Channels or Creating Digital
Channel Groups .................................................................. 24
Digital Channel Vertical Scale ....................................................... 28
Digital Channel Threshold Levels ................................................ 29
Analog Waveform ............................................................................ 30
Adding Labels to Digital Channels or the Analog Waveform . 31
Bus Key Configuration ................................................. 34
Bus Display ....................................................................................... 34
Parallel Bus ........................................................................................ 36
Input Configuration ........................................................... 36
Threshold Configuration ................................................... 37
Bus Encoding ...................................................................... 38
Parallel Bus Event Table ................................................... 39
Adding a Label to the Parallel Bus................................... 40
Serial Bus ........................................................................................... 42
Serial Bus Overview ........................................................... 42
UART Serial Bus Configuration ...................................... 44
I2C Serial Bus Interface ...................................................... 46
SPI Serial Bus Interface ..................................................... 48
CAN Serial Bus Interface .................................................. 49
LIN Serial Bus Interface .................................................... 51
Bus Encoding ...................................................................... 52
Threshold Configuration ................................................................ 53
Serial Bus Event Tables ..................................................... 54
Event Tables Format ......................................................... 58
Adding a Label to the Serial Bus ...................................... 59
Using Cursors with the Serial Bus ................................... 61
GDS-3000A Series Options Manual
18
Trigger Settings ............................................................. 63
Serial Bus Trigger Settings .............................................................. 63
UART BUS Trigger Settings ............................................. 63
I2C Bus Trigger Settings .................................................... 65
SPI Bus Trigger Settings .................................................... 68
Parallel Bus Trigger ............................................................. 69
CAN Bus Trigger Settings ................................................. 70
LIN Bus Trigger Settings ................................................... 73
Common Bus Trigger Settings ...................................................... 75
Bus Trigger Mode ............................................................... 75
Logic Trigger ..................................................................................... 76
Logic Trigger Mode ............................................................ 80
Logic Trigger Holdoff ........................................................ 80
LOGIC ANALYZER
19
Logic Analyzer Operation
Overview
Background
The Logic Analyzer inputs can only be used when
a Logic Analyzer option is installed (GW Instek
model no. DS3A-16LA). The logic analyzer option
has a sample rate of 1GSa/s with bandwidth of
200MHz.
The logic analyzer inputs can be used to measure
discrete inputs or can be used to measure values
on a parallel or serial bus.
Supported Logic
Thresholds
TTL, CMOS,
ECL, PELC,
User- defined
The GDS-3000A supports common
logic thresholds and supports
user-defined thresholds of ± 5V if
the in-built threshold levels are
unsuitable.
Digital Trigger
Types
Edge, Pulse
Width, Timeout,
Bus, Logic
As standard, the digital channels
support basic edge, pulse width,
timeout as well as bus and logic
triggers.
GDS-3000A Series Options Manual
20
Using the Logic Analyzer Probes
Background
This section will describe how to connect the
digital channels to the device under test.
Connection
1. This Logic Analyzer probe does not support hot
swapping. Please insert the Logic Analyzer
probe while the DUT (oscilloscope) is powered
off and then turn it on for usage.
2. Insert the Logic
Analyzer probe into
the Logic Analyzer
input.
3. Connect the ground lead from the logic
analyzer probe (marked G) to the circuit
ground on the DUT.
GND
G
4. Connect another probe lead to a point of
interest on the circuit. Make note of which
probe lead is connected to which point.
5. Repeat step 3 with any remaining probes.
Signal 2
Signal 3
GND
Signal 1
1
2
G
3
….
/