Texas Instruments ADS8402/ADS8406/ADS8412 EVM (Rev. A) User guide

Texas Instruments
Brand
Texas Instruments
Model
ADS8402/ADS8406/ADS8412 EVM (Rev. A)
Type
User guide

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User's Guide
SLAU126A – December 2003 – Revised September 2004
ADS8402/ADS8406/ADS8412 EVM User's Guide
This user's guide describes the characteristics, operation, and use of the
ADS8402/ADS8406/ADS8412 16-bit, high-speed, parallel interface, analog-to-digital converter
evaluation board. A complete circuit description, schematic diagram, and bill of materials are
included.
Contents
1 EVM Overview .............................................................................................. 2
2 Analog Interface ............................................................................................ 2
3 Digital Interface ............................................................................................. 4
4 Power Supplies ............................................................................................. 6
5 Using the EVM .............................................................................................. 7
6 ADS8402/ADS8406/ADS8412EVM BOM ................................................................ 8
7 ADS8402/ADS8406/ADS8412EVM Layouts .......................................................... 10
8 ADS8402/ADS8406/ADS8412EVM Schematic ....................................................... 13
List of Figures
1 Input Buffer Circuit ........................................................................................ 3
2 Top - Layer 1 ............................................................................................... 10
3 Ground Plane - Layer 2 .................................................................................. 11
4 Power Plane - Layer 3 ................................................................................... 12
5 Bottom - Layer 4 .......................................................................................... 13
List of Tables
1 Analog Input Connector .................................................................................. 2
2 Solder Short Jumper Setting ............................................................................ 4
3 Pinout for Parallel Control Connector P2 ............................................................. 4
4 Jumper Settings for Decoder Outputs ................................................................. 5
5 Data Bus Connector P3 ................................................................................... 5
6 Pinout for Converter Control Connector J3 .......................................................... 6
7 Power Supply Test Points ................................................................................ 6
8 Power Connector, J1, Pinout ............................................................................ 6
9 Bill of Materials ............................................................................................. 8
TMS320C5000, TMS320C6000 are trademarks of Texas Instruments.
ADS8402/ADS8406/ADS8412 EVM User's GuideSLAU126A – December 2003 – Revised September 2004 1
www.ti.com
1 EVM Overview
1.1 Features
2 Analog Interface
EVM Overview
• Full-featured evaluation board for the ADS8402 (1.25 MHz), ADS8406 (1.25 MHz), and ADS8412
(2 MHz) high-speed 16-bit, single channel, parallel interface SAR-type analog-to-digital converters.
• Onboard Signal Conditioning
• Onboard Reference
• Input and Output Digital Buffers
• Onboard Decoding for Stacking Multiple EVMs
The ADS8402/ADS8406/ADS8412EVM analog-to-digital converter has pseudo-bipolar differential input. A
pseudo-bipolar differential input is a differential signal (inverting and noninverting input is 180 degrees out
of phase) that is level shifted such that the signals levels are always equal to or above zero volts. The
peak-to-peak amplitude on each input pin can be as large as the reference voltage. See the respective
product data sheet for more information.
The ADS8402/ADS8406/ADS8412EVM comes installed with the unity gain buffer (U2) wired for
single-ended into differential-out configuration. The common-mode voltage is derived from REF3040
reference IC and adjustable using a potentiometer (R9). The common mode voltage pin of the THS4503 is
set to 2.0 V on the evaluation module. A single-ended input signal can be applied at pin-connector P1 or
via SMA connectors J2 (noninverting input). The buffer circuit can be reconfigured for a differential input
by installing resistor R6 and R8 and removing R1. The inverting leg of the differential signal should be
applied
to
either
connector
P1
pin
1
or
SMA
connector
J4
(inverting
input).
See
Table
1 for
pinout
of
analog
connector,
P1.
See
Section
8 for
the
EVM
schematic.
Table 1. Analog Input Connector
Description Signal Name Connector.pin# Signal Name Description
Inverting Input (–) P1.1 P1.2 (+) Noninverting Input
Reserved N/A P1.3 P1.4 N/A Reserved
Reserved N/A P1.5 P1.6 N/A Reserved
Reserved N/A P1.7 P1.8 N/A Reserved
Pin tied to Ground AGND P1.9 P1.10 N/A Reserved
Pin tied to Ground AGND P1.11 P1.12 N/A Reserved
Reserved N/A P1.13 P1.14 N/A Reserved
Pin tied to Ground AGND P1.15 P1.16 N/A Reserved
Pin tied to Ground AGND P1.17 P1.18 N/A Reserved
Reserved N/A P1.19 P1.20 REF+ External Reference Input
ADS8402/ADS8406/ADS8412 EVM User's Guide2 SLAU126A – December 2003 – Revised September 2004
www.ti.com
2.1 Signal Conditioning
1 kΩ
1 kΩ
+V
CC
V
I
0.1 µF
1 µF
25 Ω
(+) IN
(−) IN
6800 pF
1 µF
0.1 µF
1 kΩ
−V
CC
−
+
68 pF
1 kΩ
68 pF
V
OCM
25 Ω
−
+
THS4503
+2.048 V
Analog Interface
It is recommended that the analog input to any SAR-type converter be buffered. The amplifier circuit in
Figure 1 is the buffer circuit used on the ADS8402/ADS8406/ADS8412EVM. This circuit consists of the
THS4503, a high-speed fully differential amplifier configured as a single-ended into differential-out, unity
gain buffer. The circuit shown in Figure 1 was optimized to achieve the ac (i.e., SNR, THD, SFDR, etc)
specifications listed in the ADS8402, ADS8406, and ADS8412 data sheets. The 68-pF and 6800-pF
capacitors in the signal path are polypropylene type, manufactured by WIMA Corporation. Polypropylene
capacitors cause the least distortion of the input signal; therefore, they provide good dynamic performance
from the converter. A low-cost alternative for the polypropylene type are C0G capacitors by TDK
Corporation.
Figure 1. Input Buffer Circuit
ADS8402/ADS8406/ADS8412 EVM User's GuideSLAU126A – December 2003 – Revised September 2004 3
www.ti.com
2.2 Reference
3 Digital Interface
Digital Interface
The EVM allows users to select from three reference sources. The ADS8402/ADS8406/ADS8412EVM
provides an onboard 4.096-V reference, U3. The EVM also has the provision for users to supply a
reference voltage via connector P1 pin 20. The user reference voltage and onboard reference voltages
can be filtered by installing amplifier U1. The ADS8402, ADS8406, and ADS8412 analog-to-digital
converters have a integrated onboard reference buffer; therefore, it is not necessary to buffer the voltage
externally. The reference buffer circuit on the EVM is not populated with an amplifier for this reason. The
EVM comes installed with on-chip internal reference tied directly to the reference pin of the converter. See
Section 8 for a full schematic.
Table 2. Solder Short Jumper Setting
(1)
Jumper Settings
Reference
Description
Designator
1-2 2-3
On-chip internal reference applied to A/D reference pin Installed
(2)
SJP2
Apply reference voltage from external source Installed
SJP3 Apply voltage to amplifier, U2, common-mode voltage pin Installed
(2)
N/A
Buffer onboard reference, REF3040 Installed Not installed
SJP4
Buffer user reference voltage applied at P1 pin 20 Not installed installed
Select REF3040 for reference voltage Installed Not installed
SJP5
Select buffered reference voltage Not Installed Installed
(1) Designator SJP1 is not used on the EVM.
(2) Factory installed
The ADS8402/ADS8406/ADS8412 EVM is designed for easy interfacing to multiple platforms. Samtec part
numbers SSW-110-22-F-D-VS-K and TSM-110-01-T-DV-P provide a convenient dual-row header/socket
combination at P2 and P3. Consult Samtec at www.samtec.com or 1-800-SAMTEC-9 for a variety of
mating connector options.
Table 3. Pinout for Parallel Control Connector P2
(1)
Connector.Pin Signal Description
P2.1 DC_CS Daughtercard board-select pin
P2.3
P2.5
P2.7 A0 Address line from processor
P2.9 A1 Address line from processor
P2.11 A2 Address line from processor
P2.13
P2.15
P2.17
P2.19 INTc Set jumper to select BUSY or inverted signal to be applied to this pin.
(1) All even numbered pins of P2 are tied to DGND.
4 ADS8402/ADS8406/ADS8412 EVM User's Guide SLAU126A – December 2003 – Revised September 2004
www.ti.com
Digital Interface
Read ( RD), conversion start ( CONVST) and reset ( RESET) signals to the converter can be assigned to
two different addresses in memory via jumper settings. This allows for the stacking of up to two
ADS8402EVM, ADS8406EVM, and/or ADS8412EVMs into processor memory. See Table 4 for jumper
settings. Note that the evaluation module does not allow the chip select ( CS) line of the converter to be
assigned to different memory locations. It is therefore suggested that the CS line be grounded or wired to
an appropriate signal of the processor.
Table 4. Jumper Settings for Decoder Outputs
Reference Description Jumper Settings
Designator
1-2 2-3
Set A[2..0]= 0x1 to generate RD pulse Installed
(1)
W2
Set A[2..0]=0x2 to generate RD pulse Installed
Set A[2..0]=0x3 to generate convst pulse Installed
(1)
W5
Set A[2..0]=0x4 to generate convst pulse Installed
Set A[2..0]=0x5 to generate RESET pulse Installed
(1)
W4
Set A[2..0]=0x6 to generate RESET pulse Installed
The data bus is available at connector P3; see Table 5 for pinout information.
(1) Factory Installed
Table 5. Data Bus Connector P3
(1)
Connector.Pin Signal Description
P3.1 D0 Buffered Data Bit 0 (LSB)
P3.3 D1 Buffered Data Bit 1
P3.5 D2 Buffered Data Bit 2
P3.7 D3 Buffered Data Bit 3
P3.9 D4 Buffered Data Bit 4
P3.11 D5 Buffered Data Bit 5
P3.13 D6 Buffered Data Bit 6
P3.15 D7 Buffered Data Bit 7
P3.17 D8 Buffered Data Bit 8
P3.19 D9 Buffered Data Bit 9
P3.21 D10 Buffered Data Bit 10
P3.23 D11 Buffered Data Bit 11
P3.25 D12 Buffered Data Bit 12
P3.27 D13 Buffered Data Bit 13
P3.29 D14 Buffered Data Bit 14
P3.31 D15 Buffered Data Bit 15
This evaluation module provides direct access to all the analog-to-digital converter control signals via
connector J3; see Table 6 .
(1) All even-numbered pins of P3 are tied to DGND.
SLAU126A – December 2003 – Revised September 2004 ADS8402/ADS8406/ADS8412 EVM User's Guide 5
www.ti.com
4 Power Supplies
Power Supplies
Table 6. Pinout for Converter Control Connector J3
(1)
Connector.Pin Signal Description
J3.1 CS Chip Select pin. Active Low
J3.3 RD Read Pin. Active Low
J3.5 CONVST Convert start pin. Active Low
J3.7 BYTE BYTE mode pin. Used for 8-bit buses
J3.9 RESET Reset pin. Active Low
J3.11 BUSY
(2)
Converter Status Output. High when a conversion is in progress
(1) All even-numbered pins of J3 are tied to DGND.
(2) Error on silkscreen of Rev A evaluation module. J3 pin 11 reads BUS16/18. The signal connected is
BUSY, as shown in Section 8 .
The EVM accepts four power supplies.
• A dual ± Vs dc supply for the dual supply operational amplifiers. Maximum voltage recommended is ± 7
VDC
• A single 5-V dc supply for analog section of the board (A/D + Reference).
• A single 5-V or 3.3-V dc supply for digital section of the board (A/D + address decoder + buffers).
There are two ways to provide these voltages.
1. Wire in voltages at test points on the EVM. See Table 7
Table 7. Power Supply Test Points
Test Point Signal Description
TP14 +BVDD Apply 3.3 VDC or 5 VDC. See ADC data sheet for full range.
TP11 +AVCC Apply 5 VDC
TP12 +VA Apply 7 VDC. Positive supply for amplifier
TP13 –VA Apply -7 VDC. Negative supply for amplifier
2. Use the power connector J1, and derive the voltages elsewhere. The pinout for this connector is
shown in Table 8 . If using this connector, then set W1 jumper to connect 3.3 VD or 5 VD from the
connector to +BVDD. Short between pins 1-2 to select 5 VD, or short between pins 2-3 to select 3.3
VD as the source for the digital buffer voltage supply (+BVDD).
Table 8. Power Connector, J1, Pinout
Signal Power Connector - J1 Signal
+VA (7 V) 1 2 –VA (–7V)
5 VA 3 4 N/C
DGND 5 6 AGND
N/C 7 8 N/C
3.3 VD 9 10 5 VD
6 SLAU126A – December 2003 – Revised September 2004ADS8402/ADS8406/ADS8412 EVM User's Guide
www.ti.com
5 Using the EVM
5.1 As a Reference Board
5.2 As a Prototype Board
5.3 As a Software Test Platform
Using the EVM
The ADS8402/ADS8406/ADS8412 EVM serves three functions
1. As a reference design
2. As a prototype board and
3. As software test platform
As a reference design, the ADS8402/ ADS8406/ADS8412EVM contains the essential circuitry to
showcase the analog-to-digital converter. This essential circuitry includes the input amplifier, reference
circuit, and buffers. The EVM analog input circuit is optimized for 100-kHz sine wave; therefore, users may
need to adjust the resistor and capacitor values of the A/D input circuit. In ac-type applications where
signal distortion is concern, polypropylene capacitors should be used in the signal path.
As a prototype board, the buffer circuit consists of resistor pads for configuring the input as either
single-ended or differential input. The input circuit can be modified to accommodate user prototype needs,
whether it be evaluating another differential amplifier or limiting noise for best performance. The analog,
power, and digital connectors can be made to plug into a standard 0.1-inch breadboard or cables made up
to interface direct to a FPGA or processor.
As a software test platform, connectors P1, P2, and P3 plug into the parallel interface connectors of the
5-6K interface card. The 5-6K interface card sits on the TMS320C5000 ™ and TMS320C6000 ™ DSP
Platform starter kit (DSK). The ADS8402/ADS8406/ADS8412EVM is then mapped into the processor's
memory space. This card also provides an area for signal conditioning. This area can be used to install
application circuit(s) for digitization by the ADS8402/ADS8406/ADS8412 analog-to-digital converter. See
the 5-6K interface card user’s guide ( SLAU104 ) for more information.
The ADS8402/ADS8406/ADS8412EVM provides a simple platform for interfacing to the converter. The
EVM provides standard 0.1-inch headers and sockets to wire into prototype boards. The user need only
provide 3 address lines (A2, A1, A0) and address valid line (DC_ CS) to connector P2. To choose which
address combinations generates RD, CONVST, and RESET, set jumpers as shown in Table 5 . Recall that
the chip select ( CS) signal is not memory mapped or tied to P2; therefore, it must be controlled via a
general-purpose pin or shorted to ground at J3 pin 1. If address decoding is not required, the EVM
provides direct access to converter data bus via P3 and control via J3.
SLAU126A – December 2003 – Revised September 2004 7ADS8402/ADS8406/ADS8412 EVM User's Guide
www.ti.com
6 ADS8402/ADS8406/ADS8412EVM BOM
ADS8402/ADS8406/ADS8412EVM BOM
Table 9 contains a complete bill of materials for the ADS8402/ ADS8406/ADS8412 EVM. The schematic
diagram is also provided for reference. Contact the Product Information Center or e-mail
[email protected] for questions regarding this EVM.
Table 9. Bill of Materials
Used Part Type Designator Footprint MFG MFG's Part Number Description
Panasonic - ECG
2 0 R15 R21 805 ERJ-6GEY0R00V Resistor 0.0 Ω 1/8W 5% 0805 SMD
or Alternate
Panasonic - ECG
2 24.9 R12 R13 805 ERJ-6ENF24R9V Resistor 24.9 Ω 1/10W 1% 0805 SMD
or Alternate
Panasonic - ECG
3 100 R5 R14 R25 805 ERJ-6ENF1000V Resistor 100 Ω 1/10W 1% 0805 SMD
or Alternate
Panasonic - ECG
1 910 R4 805 ERJ-6GEYJ911V Resistor 910 Ω 1/8W 5% 0805 SMD
or Alternate
Panasonic - ECG Resistor 1.00 k Ω 1/10W 1% 0805
3 1k R1 R7 R10 805 ERJ-6ENF1001V
or Alternate SMD
R16 R17 R18 Panasonic - ECG Resistor 10.0 k Ω 1/16W 1% 0603
5 10k 603 ERJ-3EKF1002V
R19 R20 or Alternate SMD
Panasonic - ECG Resistor 10.0 k Ω 1/10W 1% 0805
1 10k R24 805 ERJ-6ENF1002V
or Alternate SMD
R6 R8 R11 R2
6 NI 805 Not Installed Not Installed
R3 R22
Panasonic - ECG
1 49.9 R23 805 ERJ-6ENF49R9V Resistor 49.9 Ω 1/10W 1% 0805 SMD
or Alternate
C3 C5 C11 TDK Corporation Capacitor 1000 pF 50V ceramic NPO
4 1 nF 1206 C3216C0G1H102JT
C23 or Alternate 1206
2 68 pF C34 C35 TH WIMA FKP2 68/100/1 68 pF Polypropylene capacitor
1 6800 pF C17 TH WIMA FKP2 6800/100/1 6800 pF Polypropylene capacitor
C13 C21 C41
C44 C46 C48 TDK Corporation Capacitor 10000 pF 50V ceramic X7R
10 0.01 µF 603 C1608X7R1H103JT
C53 C56 C65 or Alternate 0603
C50
C10 C18 C20 TDK Corporation Capacitor 10000 pF 50V ceramic X7R
4 0.01 µF 805 C2012X7R1H103KT
C66 or Alternate 0805
TDK Corporation Capacitor 10000 pF 50V ceramic X7R
2 0.01 µF C4 C26 1206 C3216X7R1H103JT
or Alternate 1206
C8 C25 C40
C42 C43 C47
TDK Corporation Capacitor 0.1 µF 25V ceramic X7R
15 0.1 µF C51 C52 C54 603 C1608X7R1E104KT
or Alternate 0603
C55 C57 C58
C62 C63 C64
C7 C9 C15
TDK Corporation Capacitor 0.10 µF 50V ceramic X7R
7 0.1 µF C22 C32 C36 805 C2012X7R1H104JT
or Alternate 0805
C45
C16 C31 C33 TDK Corporation
6 1 µF 805 C2012X7R1C105KT Capacitor 1 µF 16V ceramic X7R 0805
C37 C59 C60 or Alternate
TDK Corporation Capacitor 1.0 µF 25V ceramic X7R
2 1 µF C2 C28 1206 C3216X7R1E105KT
or Alternate 1206
C1 C6 C12 TDK Corporation Capacitor 10 µF 16V ceramic X5R
4 10 µF 1206 C3216X5R1C106MT
C19 or Alternate 1206
Capacitor tantalum 10 µF 16V 10%
1 10 µF C49 3528 Kemet or Alternate T491B106K016AS
SMT
C14 C24 C27 Panasonic - ECG Capacitor 10 µF 25V tantalum TE
4 10 µF 6032 ECS-T1EC106R
C29 or Alternate SMD
TDK Corporation
1 22 µF C30 805 C2012X5R0J226MT Capacitor CER 22 µF 6.3V X5R 20%
or Alternate
3 NI C38 C39 C61 805
Resistor array 1 k Ω 16TERM 8RES
2 1K RP1 RP3 CTS_742 CTS Corporation 742C163102JTR
SMD
ADS8402/ADS8406/ADS8412 EVM User's Guide8 SLAU126A – December 2003 – Revised September 2004
www.ti.com
ADS8402/ADS8406/ADS8412EVM BOM
Table 9. Bill of Materials (continued)
Used Part Type Designator Footprint MFG MFG's Part Number Description
Resistor array 100 Ω 16TRM 8RES
1 100 RP2 CTS_742 CTS Corporation 742C163101JTR
SMD
BOURNS_
1 10k R9 Bourns 3214W-1-103E Trimpot 10 k Ω 4 mm Top ADJ SMD
32X4W
4 BLM21AJ601SN1L L1 L2 L3 L4 1206 TDK Corporation MPZ2012S601AT Chip ferrite beads - 600 Ω at 100 MHz
REF3040 50 ppm/ ° C, 50 µA in
2 REF3040 U1 U3 3-SOT-23 Texas Instruments REF3040AIDBZT
SOT23-3 CMOS voltage reference
1 THS4503 U2 8-SOP(D) Texas Instruments THS4503ID High-speed fully-differential amplifiers
SOCKET_
1 ADS8402 U4 Texas Instruments ADS8402IPFBT
(1)
ADS8402 16-bit 1.25 MSPS
48QFP
1 OPA627AU U8 8-SOP(D) NOT INSTALLED NOT INSTALLED Amplifier
Footprint for 8 pin SOIC reference that
1 NI U9 8-SOP(D)
operates from 5 V
1 SN74AHC1G04DBV U10 5-SOT(DBV) Texas Instruments SN74AHC1G04DBVR Single inverter gate
1 SN74AHC138PWR U11 16-TSSOP(PW) Texas Instruments SN74AHC138PWR 3-line to 8-line decoder / demultiplexer
3 SN74AHC245PWR U5 U6 U7 20-TSSOP(PW) Texas Instruments SN74AHC245PWR Octal bus transceiver, 3-state
5X2X.1_SMT_
1 5X2X.1 J1 Samtec TSM-105-01-T-D-V-P 0.025" SMT plug - top side of PWB
SOCKET
6X2X.1_SMT_
0.025" SMT socket - bottom side of
1 6X2X.1 J3 PLUG_&_ Samtec SSW-106-22-S-D-VS
PWB
SOCKET
Samtec TSM-106-01-T-D-V-P 0.025" SMT plug - top side of PWB
MaCom #5002-5003-10 /
2 SMA_PCB_MT J2 J4 SMA_JACK AMPHENOL 901-144-4
Amphenol #901-144
10X2X.1_SMT_
0.025" SMT socket - bottom side of
2 10X2X.1 P1 P2 PLUG_&_ Samtec SSW-110-22-S-D-VS
PWB
SOCKET
Samtec TSM-110-01-T-D-V-P 0.025" SMT plug - top side of PWB
16X2X.1_SMT_
16X2X.1_SMT_PLU 0.025" SMT socket - bottom side of
1 P3 PLUG_&_ Samtec SSW-116-22-S-D-VS
G_&_SOCKET PWB
SOCKET
Samtec TSM-116-01-T-D-V-P 0.025" SMT plug - top side of PWB
1 SJP2 SJP3 SJP2 NOT INSTALLED NOT INSTALLED Pad 2 position Jumper
SJP2 SJP4
3 SJP3 SJP3 NOT INSTALLED NOT INSTALLED Pad 3 Postion Jumper
SJP5
1 SW-PB S1 EVQ-PJ Panasonic EVQ-PJU04K Switch
W1 W2 W3
5 3POS_JUMPER 3pos_jump Samtec TSW-103-07-L-S 3 Position Jumper _0.1" spacing
W4 W5
TP1 TP2 TP3
TP4 TP5 TP6
TP7 TP8 TP9 Keystone Elec-
14 TP_0.025 test_point2 5000K–ND Test Point - Single 0.025" Pin
TP10 TP11 tronics
TP12 TP13
TP14
(1) On ADS8412EVM, the ADS8412IPFBT is installed instead of ADS8402IPFBT. On ADS8406EVM, the
ADS8406IPFBT is installed instead of ADS8402IPFBT.
ADS8402/ADS8406/ADS8412 EVM User's GuideSLAU126A – December 2003 – Revised September 2004 9
www.ti.com
7 ADS8402/ADS8406/ADS8412EVM Layouts
ADS8402/ADS8406/ADS8412EVM Layouts
This section contains the EVM layouts.
Figure 2. Top - Layer 1
ADS8402/ADS8406/ADS8412 EVM User's Guide10 SLAU126A – December 2003 – Revised September 2004
www.ti.com
ADS8402/ADS8406/ADS8412EVM Layouts
Figure 3. Ground Plane - Layer 2
ADS8402/ADS8406/ADS8412 EVM User's GuideSLAU126A – December 2003 – Revised September 2004 11
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ADS8402/ADS8406/ADS8412EVM Layouts
Figure 4. Power Plane - Layer 3
ADS8402/ADS8406/ADS8412 EVM User's Guide12 SLAU126A – December 2003 – Revised September 2004
www.ti.com
8 ADS8402/ADS8406/ADS8412EVM Schematic
ADS8402/ADS8406/ADS8412EVM Schematic
Figure 5. Bottom - Layer 4
The schematic is located on the following pages.
SLAU126A – December 2003 – Revised September 2004 13ADS8402/ADS8406/ADS8412 EVM User's Guide
1 2 3 4 56
A
B
C
D
6
54321
D
C
B
A
ti
12500 TI Boulevard. Dallas, Texas 75243
TITLE:
SHEET: OF:
FILE: SIZE:
REV:
Drawn By:
Engineer:
Revision History
REV ECN Number Approved
DOCUMENT CONTROL #:
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BlockDiagram.sch
C
DATE: 29-Jul-2004
ADS8402/ADS8406/ADS8412EVM Block Diagram
6446998
-IN
+IN
EXT_REF
B_CS
B_RD
B_CONVST
B_BYTE
B_RESET
BUSY
DB[15...0]
Analog-to-Digital Converter
ADC Data Bus
Analog Input
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
P1
B_DB[15...0]
DB[15...0]
CS
RD
CONVST
BYTE
RESET
B_BUSY
BUSY
B_CS
B_RD
B_CONVST
B_BYTE
B_RESET
+AVCC
+VA
-VA
+BVDD
DC_CS
A0
A1
A2
INTc
Power & Digital Buffer
J2
B_DB[15...0]
DB[15..0]
B_DB0
B_DB1
B_DB2
B_DB3
B_DB4
B_DB5
B_DB6
B_DB7
B_DB8
B_DB9
B_DB10
B_DB11
B_DB12
B_DB13
B_DB14
B_DB15
J4
+BVDD
TP11
TP14
TP13
TP12
CS
RD
CONVST
BYTE
RESET
B_BUSY
ADC Control
12
34
56
78
9
11
10
12
J3
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
P3
TP9
TP10
1 2
3 4
5 6
7 8
9 10
J1
+VA -VA
+5VD
AGND
+5VA
DGND
+3.3VD
W1
DC_CS
A0
A1
A2
INTc
Lijoy Philipose
Lijoy Philipose
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
P2
Parallel Control
1 2 3 4 5 6
A
B
C
D
6
54321
D
C
B
A
ti
12500 TI Boulevard. Dallas, Texas 75243
TITLE:
SHEET: OF:
FILE: SIZE:
REV:
Drawn By:
Engineer:
Revision History
REV ECN Number Approved
DOCUMENT CONTROL #:
23
Analog-to-Digital Converter
C
DATE: 29-Jul-2004
Analog-to-Digital Converter
6446998
C21
0.01uF
C43
0.1uF
C42
0.1uF
C48
0.01uF
C41
0.01uF
C47
0.1uF
C52
0.1uF
C44
0.01uF
C55
0.1uF
C56
0.01uF
+5VCC
+5VCC
+5VCC
+5VCC
C54
0.1uF
C50
.01uF
+5VCC
C51
0.1uF
C53
0.01uF
+VBD
B_CS
B_RD
B_CONVST
B_BYTE
BUSY
B_RESET
+VBD
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DB8
DB9
DB10
DB11
DB12
DB13
DB14
DB15
C46
0.01uF
C40
0.1uF
+5VCC
BUSY
DB[15...0]
B_CS
B_RD
B_BYTE
B_CONVST
B_RESET
-IN
-VCC
+VCC
C34
68pF
R7
1k
C7
0.1uF
C31
1uF
C37
1uF
C15
0.1uF
R12
25
C38
NI
R10
1k
R13
25
C39
NI
+IN
C33
1uF
R5
100
EXT_REF
R4
910
DB[15...0]
R11
NI
R1
1k
TP4
31
2
SJP2
+
C49
10uF
C8
0.1uF
C13
0.01uF
+VBD
5
4
8
1
2
+
-
VOCM
VOUT-
VOUT+
36
+VCC
-VCC
7
NC
U2
THS4503
12
SJP3
IN
1
OUT
2
GND
3
U1
REF3040
+5VCC
C16
1uF
C17
6800pF
NC
1
+VIN
2
EN
3
GND
4
NC
5
VREF
6
NC
7
NC
8
U9
NI
+5VCC
C18
0.01uF
C45
0.1uF
C30
22uF
R21
0
R14
100
C61
NI
-VCC
C59
1uF
C36
0.1uF
+VCC
C32
0.1uF
C60
1uF
IN
1
OUT
2
GND
3
U3
REF3040
+5VCC
R3
NI
3 1
2
SJP5
3 1
2
SJP4
R2
NI
3
2
6
7 4
5
1
8
U8NI
R9
10k
R15
0
R6
NI
R8
NI
R22
NI
REFIN
1
REFOUT
2
NC
3
+VA
4
AGND
5
+IN
6
-IN
7
AGND
8
+VA
9
+VA
10
AGND
11
AGND
12
AGND
14
AGND
15
DB15
16
DB14
17
DB13
18
DB12
19
DB11
20
DB10
21
DB9
22
DB8
23
+VBD
24
BDGND
25
DB7
26
DB6
27
DB5
28
DB4
29
DB3
30
DB2
31
DB1
32
DB0
33
+VBD
34
BDGND
35
BUSY
36
+VBD
37
RESET
38
BYTE
39
CONVST
40
RD
41
CS
42
+VA
43
AGND
44
AGND
45
+VA
46
REFM
47
REFM
48
+VA
13
U4
ADS8402/ADS8412
C35
68pF
C62
0.1uF
C65
0.01uF
R23
50
Lijoy Philipose
Lijoy Philipose
1 2 3 4 56
A
B
C
D
6
54321
D
C
B
A
ti
12500 TI Boulevard. Dallas, Texas 75243
TITLE:
SHEET: OF:
FILE: SIZE:
REV:
Drawn By:
Engineer:
Revision History
REV ECN Number Approved
DOCUMENT CONTROL #:
33
Power & Digital Buffer
C
DATE: 29-Jul-2004
Power Supply & Digital Buffer Circuit
6446998
L4
BLM21AJ601SN1L
L2
BLM21AJ601SN1L
L1
BLM21AJ601SN1L
C28
1uF
C2
1uF
C4
0.01uF
C26
0.01uF
L3
BLM21AJ601SN1L
TP6
+5VCC
C10
0.01uF
C9
0.1uF
TP5
TP8
+VBD
C20
0.01uF
C22
0.1uF
TP7
TP3
TP1
TP2
+VCC
-VCC
C12
10uF
C19
10uF
C6
10uF
C1
10uF
C5
1nF
C3
1nF
C23
1nF
C11
1nF
B_DB[17...0]
1 16
2 15
3 14
4 13
5
9
12
6
8
10
11
7
RP1
1K
+VBD
/OE
DIR
A1
A2
A3
A4
A5
A6
A7
A8
B1
B2
B3
B4
B5
B6
B7
B8
VCC
GND
U6
SN74AHC245PWR
+VBD
C57
0.1uF
1 16
2 15
3 14
4 13
5
9
12
6
8
10
11
7
RP3
1K
+VBD
/OE
DIR
A1
A2
A3
A4
A5
A6
A7
A8
B1
B2
B3
B4
B5
B6
B7
B8
VCC
GND
U7
SN74AHC245PWR
+VBD
C58
0.1uF
DB[17...0]
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
B_DB15
B_DB14
B_DB13
B_DB12
B_DB11
B_DB0
B_DB10
B_DB1
B_DB9
B_DB2
B_DB8
B_DB3
B_DB7
B_DB4
B_DB6
B_DB5
CS
RD
CONVST
BYTE
RESET
B_BUSY
1 16
2 15
3 14
4 13
5
9
12
6
8
10
11
7
RP2
100
/OE
DIR
A1
A2
A3
A4
A5
A6
A7
A8
B1
B2
B3
B4
B5
B6
B7
B8
VCC
GND
U5
SN74AHC245PWR
+VBD
C25
0.1uF
CS
RD
CONVST
BYTE
RESET
R20
10k
R19
10k
R18
10k
+VBD
R17
10k
R16
10k
BUSY
B_CS
B_RD
B_CONVST
B_BYTE
B_RESET
+AVCC
+VA
-VA
DB[17...0]
B_DB[17...0]
+BVDD
B_CS
B_BYTE
B_CONVST
B_RD
B_RESET
+
C14
10uF
+
C24
10uF
+
C27
10uF
+
C29
10uF
A
1
B
2
C
3
G1
6
G2A
4
G2B
5
Y0
15
Y1
14
Y2
13
Y3
12
Y4
11
Y5
10
Y6
9
Y7
7
VCC
16
GND
8
U11
SN74AHC138PWR
A0
A1
A2
A0
A2
A1
+VBD
C63
0.1uF
+VBD
1
3
2
W2
1
3
2
W5
W4
2 4
53
U10
SN74AHC1G04DBV
+VBD
C64
0.1uF
W3
DC_CS
R24
10k
+VBD
RESET#
S1
R25
100
C66
0.01uF
INTc
DC_CS
Lijoy Philipose
Lijoy Philipose
www.ti.com
ADS8402/ADS8406/ADS8412EVM Schematic
Related Documentation from Texas Instruments
To obtain a copy of any of the following TI documents, call the Texas Instruments Literature Response
Center at (800) 477-8924 or the Product Information Center (PIC) at (972) 644-5580. When ordering,
identify this document by its title and literature number. Updated documents can also be obtained
through the TI Web site at www.ti.com
Data Sheets: Literature Number:
ADS8402 SLAS154
ADS8406 SLAS426
ADS8412 SLAS384
REF3040 SBVS032
SN74AHC138 SCLS258
SN74AHC245 SCLS230
SN74AHC1G04 SCLS318
THS4503 SLOS352
ADS8402/ADS8406/ADS8412 EVM User's Guide SLAU126A – December 2003 – Revised September 200414
www.ti.com
ADS8402/ADS8406/ADS8412EVM Schematic
FCC Warnings
This equipment is intended for use in a laboratory test environment only. It generates, uses, and can radiate radio frequency
energy and has not been tested for compliance with the limits of computing devices pursuant to subpart J of part 15 of FCC rules,
which are designed to provide reasonable protection against radio frequency interference. Operation of this equipment in other
environments may cause interference with radio communications, in which case the user at his own expense will be required to
take whatever measures may be required to correct this interference.
EVM IMPORTANT NOTICE
Texas Instruments (TI) provides the enclosed product(s) under the following conditions:
This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY
and is not considered by TI to be fit for commercial use. As such, the goods being provided may not be complete in terms of
required design-, marketing-, and/or manufacturing-related protective considerations, including product safety measures typically
found in the end product incorporating the goods. As a prototype, this product does not fall within the scope of the European Union
directive on electromagnetic compatibility and therefore may not meet the technical requirements of the directive.
Should this evaluation kit not meet the specifications indicated in the EVM User's Guide, the kit may be returned within 30 days
from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER
TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY
WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE.
The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all
claims arising from the handling or use of the goods. Please be aware that the products received may not be regulatory compliant
or agency certified (FCC, UL, CE, etc.). Due to the open construction of the product, it is the user's responsibility to take any and all
appropriate precautions with regard to electrostatic discharge.
EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE Liable to the other FOR
ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.
TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not exclusive.
TI assumes no liability for applications assistance, customer product design, software performance, or infringement of
patents or services described herein.
Please read the EVM User's Guide and, specifically, the EVM Warnings and Restrictions notice in the EVM User's Guide prior to
handling the product. This notice contains important safety information about temperatures and voltages. For further safety
concerns, please contact the TI application engineer.
Persons handling the product must have electronics training and observe good laboratory practice standards.
No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine, process, or
combination in which such TI products or services might be or are used.
EVM WARNINGS AND RESTRICTIONS
It is important to operate this EVM within the input voltage range of ±6 V and the output voltage range of 0 V and 5.5 V.
Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are
questions concerning the input range, please contact a TI field representative prior to connecting the input power.
Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to the
EVM. Please consult the EVM User's Guide prior to connecting any load to the EVM output. If there is uncertainty as to the load
specification, please contact a TI field representative.
During normal operation, some circuit components may have case temperatures greater than 60 ° C. The EVM is designed to
operate properly with certain components above 60 ° C as long as the input and output ranges are maintained. These components
include but are not limited to linear regulators, switching transistors, pass transistors, and current sense resistors. These types of
devices can be identified using the EVM schematic located in the EVM User's Guide. When placing measurement probes near
these devices during operation, please be aware that these devices may be very warm to the touch.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2004, Texas Instruments Incorporated
Important NoticesSLAU126A – December 2003 – Revised September 2004 15
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements,
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Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products Applications
Amplifiers amplifier.ti.com Audio www.ti.com/audio
Data Converters dataconverter.ti.com Automotive www.ti.com/automotive
DSP dsp.ti.com Broadband www.ti.com/broadband
Interface interface.ti.com Digital Control www.ti.com/digitalcontrol
Logic logic.ti.com Military www.ti.com/military
Power Mgmt power.ti.com Optical Networking www.ti.com/opticalnetwork
Microcontrollers microcontroller.ti.com Security www.ti.com/security
RFID www.ti-rfid.com Telephony www.ti.com/telephony
Low Power www.ti.com/lpw Video & Imaging www.ti.com/video
Wireless
Wireless www.ti.com/wireless
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Copyright © 2007, Texas Instruments Incorporated
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Texas Instruments ADS8402/ADS8406/ADS8412 EVM (Rev. A) User guide

Texas Instruments
Brand
Texas Instruments
Model
ADS8402/ADS8406/ADS8412 EVM (Rev. A)
Type
User guide
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