CP-850/F Service Manual
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4.1.4 PINNING
PSDIP 52-pin Pin Name Type Short Description
1 SCL IN/OUT Software driven I2C bus Clock line
2 SDA IN/OUT Software driven I2C bus Data line
3 S/SW2 IN Slow switching control for SCART 2.
4 S/SW2 IN (See Microcontroller I/O pin configuration)
5 OCP IN Switch Off the set when the voltage goes below a trigger level
6 n.c.
7 n.c.
8 Reset Out OUT Driven by controlling software to reset video IC
’
s.
9 VDD2.5 IN Supply voltage 2.5V
10 VSS IN Ground (0V)
11 VDD3.3 IN Input/Output 3.3V
12 CVBS IN CVBS input for the acquisition circuit
13 VDDA2.5 IN Supply voltage for analog components
14 VSSA IN Ground for analog components
15 S/SW1 IN Slow switching control for SCART 1.
16 AGC IN ADC input, for AGC alignment only
17 KEY IN ADC input, local key sensing
18 AFT IN ADC input, AFT input
19 HS IN Horizontal sync for OSD/Txt synchronisation
20 VS IN Vertical sync for OSD/Txt synchronisation
21 MODESW OUT High : Negative video modulation (B, G, D, K,I)
Low : Positive video modulation (L / L
’
)
22 L/L
’
OUT High : L
’
, Low : L
23 IR IN Remote control signal input
24 INT IN Interrupt input from audio processor
4.1.3 IC MARKING AND VERSION
Chassis IC marking OSD languages ATSS countries Text
CP-850/F
AUSTRALIA, BULGARIAN, Australia, Austria, Belgium,
CZECH, GERMAN, Switzerland, Czech
DANISH, SPANISH, Republic, Germany,
FRENCH, FINNISH, Denmark, Spain, PAN-EUROPEAN
GREEK, France, Finland, GB, LATIN, CYRILLIC,
HUNGARIAN, Greece, Hungary, Italy, GREEK.
ITALIAN, Ireland, Norway,
NORWEGIAN, Netherlands, Portugal,
DUTCH, POLISH, Poland, Sweden,
ROMANIAN, Others
RUSSIAN,
SWEDISH,