Themis USPIIi-1v User manual

Brand: Themis

Model: USPIIi-1v

Type: User manual

USPIIi-1v

Hardware Manual

Revision B4

Themis Computer—Rest of World

20 rue du Tour de l’Eau

38400 Saint Martin d’Hères, France

Phone +33 476 59 60 46

Fax +33 476 59 60 49

Themis Computer—Americas and Pacific Rim

3185 Laurelview Court

Fremont, CA 94538

Phone (510) 252-0870

Fax (510) 490-5529

World Wide Web http://www.themis.com

USPIIi-1v Hardware Manual

Version B4 — December 2001

photocopy, microfilm, retrieval system, or by any other means now known or hereafter invented without

the prior written permission of Themis Computer.

The information in this publication has been carefully checked and is believed to be accurate. However,

Themis Computer assumes no responsibility for inaccuracies. Themis Computer retains the right to

make changes to this publication at any time without prior notice. Themis Computer does not assume

any liability arising from the application or use of this publication or the product(s) described herein.

RESTRICTED RIGHTS LEGEND: Use, duplication, or disclosure by the United States Government

is subject to the restrictions set forth in DFARS 252.227-7013 (c)(1)(ii) and FAR 52.227-19.

TRADEMARKS

SOLARIS™ is a registered trademark of Sun Microsystems

SPARC™ is a registered trademark of SPARC International

All other trademarks used in this publication are the property of their respective owners.

USPIIi-1v Hardware Manual

December 2001

Part Number: 105614

Themis Customer Support

Telephone: +1 510-252-0870

Fax: +1 510-490-5529

E-mail: support@themis.com

Web Site: http://www.themis.com

Version Revision History

Version B4 December 2001

Replaced Universe II with Universe IIB throughout manual.

Corrected misspellings throughout manual.

Reenforced definition of backplane reset on pages 2-2 and B-2.

Defined non-standard signal for P2 pin B3 in Table A-2, page A-3.

Reversed Serial Port C and D callouts, pages C-3, C-4, and D-5.

Version B3 October 5, 2000

Corrected I/O Board Jumper Setting references on page B-5.

Version B2 July 20, 2000

Changed definition of OBP in System and User 1 flash.

Fixed minor inconsistencies in B.2.1 and 3.2.3.

Version B1 May 25, 2000

Reworked for 360/440 MHz CPU.

Fixed Jumper references.

Version B January 17, 2000

Version A1 September 29, 1998

Version A July 29, 1998

Initial Customer Release.

USPIIi-1v User’s Manual

Themis Computer

Themis Computer v

Table of Contents

1 Introduction ........................................................................................................... 1-1

1.1 How to Use This Manual ....................................................................................... 1-1

1.2 Intended Audience ................................................................................................. 1-1

1.3 Product Warranty and Registration........................................................................ 1-2

1.4 Unpacking.............................................................................................................. 1-2

1.5 How to Start Quickly ............................................................................................. 1-3

1.6 Chapter Overview .................................................................................................. 1-4

1.7 Related References ................................................................................................ 1-4

2 Installation ............................................................................................................. 2-1

2.1 Determine Board Type and Configuration ............................................................ 2-1

2.2 Configuration ......................................................................................................... 2-2

2.3 Backplane Jumper Settings.................................................................................... 2-2

2.4 Installing The USPIIi-1v Paddle Board ................................................................. 2-3

2.5 Attaching Cables to Peripheral Devices ................................................................ 2-4

2.5.1 Console Port (TTYA) ............................................................................ 2-4

2.5.2 Keyboard and Mouse ............................................................................. 2-5

2.5.3 Ethernet Network................................................................................... 2-5

2.5.4 SCSI A and B......................................................................................... 2-5

2.5.5 Creator Graphics Card ........................................................................... 2-6

2.6 Configuring The VME Interface............................................................................ 2-6

3 Specification.......................................................................................................... 3-1

3.1 Overview................................................................................................................ 3-1

3.1.1 Baseboard............................................................................................... 3-1

3.1.2 I/O Board and Creator Graphics ............................................................ 3-2

3.1.3 PMC Carrier Board................................................................................ 3-2

3.1.4 Paddle Board.......................................................................................... 3-2

3.1.5 Block Diagram....................................................................................... 3-3

3.2 System Specification.............................................................................................. 3-4

3.2.1 Processor & Memory Subsystems ......................................................... 3-4

USPIIi-1v Hardware Manual

vi Themis Computer

3.2.2 I/O Subsystem........................................................................................ 3-5

3.2.3 Auxiliary Functions ............................................................................... 3-6

3.3 Environmental Specification.................................................................................. 3-7

3.4 Estimated Power Requirements ............................................................................. 3-8

4 Hardware Overview................................................................................................ 4-1

4.1 Major Components ................................................................................................ 4-1

4.1.1 SME UltraSPARC-IIi Processor and Cache.......................................... 4-1

4.1.2 E-Cache.................................................................................................. 4-1

4.1.3 SME Advanced PCI Bridge (APB) ....................................................... 4-2

4.1.4 SME Reset, Interrupt, and Clock (RIC)................................................. 4-2

4.1.5 Tundra Universe IIB .............................................................................. 4-2

4.1.6 SME PCI I/O Controller ........................................................................ 4-3

4.1.7 Symbios SCSI Controller....................................................................... 4-3

4.1.8 FPGA ..................................................................................................... 4-3

4.1.9 National Super I/O ................................................................................. 4-3

4.1.10 Seimens SAB 82532 .............................................................................. 4-3

4.1.11 FLASH.................................................................................................. 4-3

4.1.12 TOD and NVRAM................................................................................. 4-4

4.2 Memory Subsystem ............................................................................................... 4-4

4.3 PMC Carrier Subsystem ........................................................................................ 4-5

4.4 OpenBoot PROM................................................................................................... 4-5

5 Universe-IIB Description ....................................................................................... 5-1

5.1 Features.................................................................................................................. 5-1

5.2 USPIIi-1v and the Universe IIB PCI Interface ...................................................... 5-2

5.3 VMEbus Interface.................................................................................................. 5-2

5.3.1 VMEbus Configuration.......................................................................... 5-2

5.3.2 Universe IIB as the VMEbus Slave ....................................................... 5-2

5.3.3 Universe IIB as the VMEbus Master..................................................... 5-3

5.3.4 VMEbus First Slot Detector .................................................................. 5-4

5.3.4.1 Automatic Slot Identification............................................. 5-5

5.3.4.2 Registered Access at the power up .................................... 5-6

5.3.5 Universe IIB’s hardware Power -Up Options........................................ 5-6

5.4 Slave Image Programming..................................................................................... 5-7

5.4.1 VME Slave Images ................................................................................ 5-8

5.4.1.1 VMEbus Fields .................................................................. 5-8

5.4.1.2 PCI Bus Fields ................................................................... 5-8

5.4.1.3 Control Fields .................................................................... 5-9

5.4.2 PCI Bus Target Images .......................................................................... 5-9

5.4.2.1 PCI Bus Fields ................................................................... 5-10

5.4.2.2 VMEbus Fields .................................................................. 5-10

5.4.2.3 Control Fields .................................................................... 5-11

5.4.2.4 Special PCI Target Image .................................................. 5-11

Themis Computer vii

Table of Contents

5.5 Universe IIB’s Interrupt and Interrupt Handler ..................................................... 5-14

5.5.1 VME and PCI Interrupters:.................................................................... 5-14

5.5.2 VMEbus Interrupt Handling: ................................................................. 5-15

5.5.3 Universe IIB’s Mailbox Registers: ........................................................ 5-15

5.5.4 Universe IIB’s Semaphores ................................................................... 5-15

5.5.5 Programmable slave images on the VMEbus and PCI bus: .................. 5-15

5.5.6 DMA Controller..................................................................................... 5-16

6 FPGA, Watchdog, Voltage and Temperature Sensors ...................................... 6-1

6.1 FPGA ..................................................................................................................... 6-1

6.1.1 Introduction............................................................................................ 6-1

6.1.2 Boot Address Decoder ........................................................................... 6-1

6.1.3 3-Level Watchdog.................................................................................. 6-2

6.1.4 Power Management System................................................................... 6-3

6.2 Temperature Sensor ............................................................................................... 6-4

7 Resets .................................................................................................................... 7-1

7.1 Overview................................................................................................................ 7-1

7.2 UltraSPARC-IIi Reset Request Signals................................................................. 7-2

7.2.1 Power-On Reset (POR).......................................................................... 7-2

7.2.2 Externally Initiated Reset (XIR) ............................................................ 7-2

7.2.3 Watchdog Reset (WDR) ........................................................................ 7-2

7.2.4 Software Initiated Reset (SIR) ............................................................... 7-3

7.3 Reset Sources......................................................................................................... 7-3

7.3.1 Push Button Reset.................................................................................. 7-3

7.3.2 Power Management Resets.................................................................... 7-3

7.3.3 VMEbus Resets...................................................................................... 7-4

7.3.4 3-Level Watchdog Resets ...................................................................... 7-4

7.3.5 Software POR ........................................................................................ 7-4

7.3.6 Software XIR ......................................................................................... 7-4

7.4 UltraSPARC-IIi Reset Control Register ................................................................ 7-5

7.5 USPIIi-1v Reset Tree Diagram.............................................................................. 7-6

A Connector Pinouts, LEDs, Switches ................................................................... A-1

A.1 Introduction............................................................................................................ A-1

A.2 Baseboard Front Panel ........................................................................................... A-1

A.2.1 Baseboard VME P1 ............................................................................... A-1

A.2.2 Baseboard VME P2 ............................................................................... A-3

A.2.3 SCSI A and B......................................................................................... A-6

A.2.4 RJ45 Ethernet A Connector ................................................................... A-8

A.2.5 Keyboard/Mouse Connector and Serial Port A (PS/2 Mode only)........ A-9

A.2.6 PS/2 Keyboard/Mouse Split Cable ........................................................ A-10

A.2.7 Serial Port A (Console) Adapter Cable (PS/2 Mode only).................... A-11

A.2.8 Keyboard/Mouse Connector and Serial Port A (Sun Mode only) ......... A-12

A.2.9 LEDs ...................................................................................................... A-13

USPIIi-1v Hardware Manual

viii Themis Computer

A.2.10 Push-Button RESET .............................................................................. A-13

A.3 I/O Board ............................................................................................................... A-14

A.3.1 I/O Board VME P2 ................................................................................ A-14

A.3.2 Serial Port C (TTYC or Console) and Serial Port D (TTYD or Aux Port) A-

A.3.3 Parallel Port............................................................................................ A-18

A.3.4 RJ45 Ethernet B Connector ................................................................... A-19

A.3.5 Audio ..................................................................................................... A-19

A.3.6 Creator Graphics Slot............................................................................. A-19

A.4 PMC Carrier Board................................................................................................ A-20

A.4.1 PMC Carrier Board P1 Connector ......................................................... A-20

A.4.2 PMC Carrier Board VME P2 Connector ............................................... A-22

A.4.3 PMC Carrier Slot User I/O .................................................................... A-24

A.4.3.1 PMC Carrier Slot #1: 64 Bit User I/O Configuration........ A-24

A.4.3.2 PMC Carrier Slot #1: 32 Bit User I/O Configuration........ A-26

A.4.3.3 PMC Carrier Slot #2: 32 Bit User I/O Configuration........ A-27

A.5 Paddle Board.......................................................................................................... A-28

A.5.1 SCSI Connector ..................................................................................... A-28

A.5.2 MII Connector........................................................................................ A-30

A.5.3 DB9 Connector ...................................................................................... A-31

B Jumper and Solder Bead Configurations ............................................................ B-1

B.1 Overview................................................................................................................ B-1

B.2 Field Configurables................................................................................................ B-1

B.2.1 Baseboard Jumpers ................................................................................................ B-1

B.2.2 I/O Board Jumpers ................................................................................................. B-4

B.2.3 PMC Carrier Board Jumpers.................................................................. B-6

B.3 Factory Configurables............................................................................................ B-6

B.3.1 Baseboard Solder Beads ........................................................................ B-6

B.3.2 I/O Board Solder Beads ......................................................................... B-10

B.3.3 PMC Carrier Board Solder Beads.......................................................... B-10

C Front Panel Diagrams............................................................................................ C-1

C.1 Introduction............................................................................................................ C-1

C.2 Baseboard Front Panel ........................................................................................... C-2

C.3 Baseboard, I/O Board, and Creator Graphics Front Panels ................................... C-3

C.4 Baseboard, I/O Board, and PMC Carrier Board Front Panel................................. C-4

D Board Diagrams ..................................................................................................... D-1

D.1 Baseboard Board Diagrams ................................................................................... D-1

D.2 I/O Board Diagrams............................................................................................... D-5

D.3 PMC Board ............................................................................................................ D-6

D.4 Paddle Board.......................................................................................................... D-8

E Glossary.................................................................................................................. F-1

E.1 Terminology........................................................................................................... F-1

Themis Computer ix

List of Tables

Table 2-1. Summary of different connectors configuration.................................................................... 2-4

Table 3-1. Processor Specifications........................................................................................................ 3-4

Table 3-2. Memory Specification ........................................................................................................... 3-4

Table 3-3. I/O Sub-system Specification................................................................................................ 3-5

Table 3-4. Auxiliary Functions Specifications ....................................................................................... 3-6

Table 3-5. USPIIi-1v Operating Environmental Specifications ............................................................. 3-7

Table 3-6. USPIIi-1v Non-operating Environmental Specifications...................................................... 3-7

Table 3-7. Estimated Power Requirements............................................................................................. 3-8

Table 4-1. Flash EPROM Jumpers ......................................................................................................... 4-4

Table 5-1. Universe IIB PCI Interface Pins............................................................................................ 5-2

Table 5-2. Universe IIB Miscellaneous Control Register (MISC_CTL)................................................ 5-4

Table 5-3. Universe IIB Power Up Options ........................................................................................... 5-6

Table 5-4. PCI Configuration Base Address 0 Register (PCI_BS0) ...................................................... 5-7

Table 5-5. PCI Configuration Base Address 1 Register (PCI_BS1) ...................................................... 5-7

Table 5-6. VMEbus Fields for VMEbus Slave Image............................................................................ 5-8

Table 5-7. PCI Bus Fields for VMEbus Slave Image............................................................................. 5-8

Table 5-8. Control Fields for VMEbus Slave Image .............................................................................. 5-9

Table 5-9. PCI Bus Fields for PCI Bus Target Image .......................................................................... 5-10

Table 5-10. PCI Bus Fields for PCI Bus Target Image ........................................................................ 5-11

Table 5-11. Control Fields for PCI Bus Target Image ......................................................................... 5-11

Table 5-12. PCI Bus Fields for Special PCI Bus Target Image ........................................................... 5-12

Table 5-13. PCI Bus Fields for Special PCI Bus Target Image ........................................................... 5-12

Table 5-14. Control Fields for Special PCI Bus Target Image............................................................. 5-12

Table 5-15. Special PCI Target Image Register (Offset 188)............................................................... 5-12

Table 6-1. Mapping of Flash Devices: J3304 on 2-3 or removed (Boot from System Flash)................ 6-1

Table 6-2. Mapping of Flash Devices: J3304 on 1-2 (Boot from User Flash) ....................................... 6-2

Table 6-3. Jumper J3303 setting ............................................................................................................. 6-2

USPIIi-1v Hardware Manual

xThemis Computer

Table 6-4. Watchdog POR Enable/Disable ............................................................................................ 6-2

Table 6-5. Watchdog Enable/Disable ..................................................................................................... 6-3

Table 7-1. UltraSPARC-IIi Reset_Control Register............................................................................... 7-5

Table A-1. Baseboard VME P1 Pinout.................................................................................................. A-2

Table A-2. Baseboard VME P2 Connector in PS/2 Mode..................................................................... A-3

Table A-3. Baseboard VME P2 Connector in Sun Mode...................................................................... A-4

Table A-4. Baseboard SCSI A and B Pinout ......................................................................................... A-6

Table A-5. RJ45 Ethernet A Pinout ....................................................................................................... A-8

Table A-6. Baseboard Console and Keyboard/Mouse Pinout (PS/2 Mode).......................................... A-9

Table A-7. PS/2 Keyboard/Mouse Split Cable Pinout ........................................................................ A-10

Table A-8. Serial Port A (Console) Adapter Cable ............................................................................. A-11

Table A-9. Baseboard Console and Keyboard/Mouse Pinout (Sun Mode)......................................... A-12

Table A-10. Possible colors of the ALARM LED............................................................................... A-13

Table A-11. I/O Board VME P2 Connector ........................................................................................ A-14

Table A-12. I/O Board TTY C AND TTY D Pinout........................................................................... A-16

Table A-13. I/O Board Parallel Port Pinout......................................................................................... A-18

Table A-14. RJ45 Ethernet B Pinout ................................................................................................... A-19

Table A-15. PMC Carrier Board VME P1 Pinout ............................................................................... A-20

Table A-16. PMC Carrier Board VME P2 Pinout ............................................................................... A-22

Table A-17. PMC Carrier Slot #1 with 64 Bits of User I/O ................................................................ A-24

Table A-18. PMC Carrier Slot #1 with 32 Bits of User I/O ................................................................ A-26

Table A-19. PMC Carrier Slot #2 with 32 Bits of User I/O ................................................................ A-27

Table A-20. Paddle Board SCSI Connector Pinout............................................................................. A-28

Table A-21. Paddle Board MII Connector Pinout ............................................................................... A-30

Table A-22. Paddle Board DB9 Connector Pinout.............................................................................. A-31

Table B-1. Baseboard Jumper Setting ....................................................................................................B-1

Table B-2. I/O Board Jumper Setting .....................................................................................................B-4

Table B-3. Baseboard Component Side Solder Beads............................................................................B-6

Table B-4. Baseboard Solder Side Solder Beads....................................................................................B-6

Table B-5. I/O Board Solder Side Solder Beads...................................................................................B-10

Themis Computer xi

List of Figures

Figure 3-1. USPIIi-1v Baseboard Block Diagram..................................................................................3-3

Figure 4-1. Memory Sub-System Topology ........................................................................................... 4-5

Figure 5-1. Universe IIB Architectural Diagram.................................................................................... 5-4

Figure 5-2. Address Translation for VMEbus to PCI Bus Transfers...................................................... 5-9

Figure 5-3. Address Translation for PCI Bus to VMEbus Transfers.................................................... 5-10

Figure 5-4. Memory Mapping in the Special PCI Target Image .......................................................... 5-14

Figure 7-1. USPIIi-1v Reset Diagram .................................................................................................... 7-6

Figure A-1. VME P1 Baseboard Connector Orientation....................................................................... A-1

Figure A-2. Baseboard VME P2 Connector Orientation....................................................................... A-3

Figure A-3. Baseboard SCSI A and B Connector Orientation .............................................................. A-6

Figure A-4. Ethernet A Connector Orientation ..................................................................................... A-8

Figure A-5. Baseboard Console and Keyboard/Mouse Connector Orientation (PS/2 Mode)............... A-9

Figure A-6. PS/2 Keyboard/Mouse Split Cable................................................................................... A-10

Figure A-7. Serial Port Adapter Cable................................................................................................. A-11

Figure A-8. Baseboard Console and Keyboard/Mouse Connector Orientation (Sun Mode) .............. A-12

Figure A-9. I/O Board VME P2 Connector Orientation...................................................................... A-14

Figure A-10. I/O Board TTYC and TTYD Connector Orientation..................................................... A-16

Figure A-11. I/O Board Parallel Port Connector Orientation.............................................................. A-18

Figure A-12. Ethernet B Connector Orientation..................................................................................A-19

Figure A-13. PMC Carrier Board VME P1 Connector Orientation .................................................... A-20

Figure A-14. PMC Board VME P2 Connector Orientation................................................................. A-22

Figure A-15. PMC Carrier Board User I/O Connector........................................................................ A-24

Figure A-16. Paddle Board SCSI Connector .......................................................................................A-28

Figure A-17. Paddle Board MII Connector ......................................................................................... A-30

Figure A-18. Paddle Board DB9 Connector........................................................................................A-31

Figure B-1. Baseboard Jumper Locations...............................................................................................B-3

USPIIi-1v Hardware Manual

xii Themis Computer

Figure B-2. I/O Board Jumper Locations ...............................................................................................B-5

Figure B-3. Baseboard Component Side Solder Bead Locations...........................................................B-8

Figure B-4. Baseboard Solder Side Solder Bead Locations ...................................................................B-8

Figure B-5. I/O Board Solder Side Solder Beads .................................................................................B-10

Figure C-1. Single Slot Front Panel........................................................................................................C-2

Figure C-2. Double Slot Front Panels.....................................................................................................C-3

Figure C-3. Triple Slot Front Panel ........................................................................................................C-4

Figure D-1. Baseboard Front Panel Diagram ........................................................................................ D-2

Figure D-2. Baseboard Component Diagram ........................................................................................D-3

Figure D-3. Baseboard Connector Diagram .......................................................................................... D-4

Figure D-4. I/O Board Component Side................................................................................................ D-5

Figure D-5. PMC Carrier Board Component Side ................................................................................ D-6

Figure D-6. PMC Board Connector Diagram........................................................................................D-7

Figure D-7. Paddle Board Component Side .......................................................................................... D-8

Themis Computer 1-1

1Introduction

1.1 How to Use This Manual

Thank you for purchasing the Themis USPIIi-1v single board computer. This manual describes the USPIIi-1v,

a SPARC version 9.0 compliant computer with a VMEbus interface and an UltraSPARC-IIi processor.

We value our customer’s comments and concerns. Themis Computer is eager to know what is thought of our

products. A “Reader Comment Card” is located at the end of this manual for your use. Please take the time fill

it out and return it to Themis Computer.

Before you begin, carefully read each of the procedures in this manual and the associated CPU manual.

Improper handling of the equipment can cause serious damage to the equipment.

1.2 Intended Audience

This manual is written for system integrators and programmers. It contains all necessary information for

installation and configuration of the USPIIi-1v and assumes the Open Boot Program (OBP) code is installed

in the system flash. If you intend to operate the USPIIi-1v with an operating system other than Solaris, such

as VxWorks or other real-time kernel, please consult the appropriate documentation supplements

accompanying your OS or kernel software.

Although all specific hardware and software features are described in this manual, programmers wishing to

write code for the USPIIi-1v without the benefit of an operating system or real-time kernel will require

additional data sheets. Please refer to the Section 1.7, "Related References," on page 1-4 for information

concerning this documentation.

The reader should have a working knowledge of the VMEbus specifications, SPARC processor architecture,

Ethernet, and SCSI (ANSI X3.131-1986) specifications.

USPIIi-1v Hardware Manual

1-2 Themis Computer

1.3 Product Warranty and Registration

Please review the Themis Computer warranty and complete the product registration card delivered with your

USPIIi-1v board(s). Return of the registration card is not required to activate your product warranty but, by

registering your USPIIi-1v, Themis Computer will be better able to provide you with timely updated

information and product enhancement notifications.

Our Customer Support department is committed to providing the best product support in the industry.

Customer support is available 8am - 5pm (PST), Monday through Friday via telephone, fax, e-mail or our

World Wide Web site.

Themis Customer Support

Telephone: +1 510-252-0870

Fax: +1 510-490-5529

E-mail: support@themis.com

Web Site: http://www.themis.com

1.4 Unpacking

The following section describes the shipping contents of the USPIIi-1v.

Caution — The USPIIi-1v contains statically sensitive components. Industry standard anti-static measures

must be observed when removing the USPIIi-1v from its shipping container and during any subsequent

handling. A wrist strap (or grounding strap) provides grounding for static electricity between your body and

the chassis of the system unit. Electric current and voltage do not pass through the wrist strap.

Remove the USPIIi-1v and accessories from the shipping container and check the contents against the

packing list. Be certain to observe industry standard ESD protection procedures when handling static sensitive

components. The package should include:

• USPIIi-1v board assembled in the configuration ordered

– Baseboard

– Memory Cards

– I/O Expansion Board

– Creator Graphics Card

– PMC Carrier Board with PMC User I/O Adapter Card

• USPIIi-1v Hardware and Software Manuals, if ordered.

• INT-KIT-USPIIi-1V/1-VME: USPIIi-1v/1 or 1v/2p integration kit, if ordered (Themis P/N 108890)

• INT-KIT-USPIIi-1V/2-VME: USPIIi-1v/2c or 1v/3 integration kit, if ordered (Themis P/N 108891)

The INT-KIT-USPIIi-1V/1-VME integration kit includes:

• A Micro DB9 connector to PS/2 Keyboard and Mouse split adapter cable for the baseboard PS/2

keyboard and mouse; Themis Part Number: 108114.

Themis Computer 1-3

1. Introduction

• A Micro DB9 connector to Male, DB25 Console adapter cable for the Baseboard Console (TTY A)

port; Themis Part Number 108113.

• A 68 pin, Sub-Miniature connector to 0.005”, male standard SCSI-3 connector adapter cable for the

Baseboard SCSI A; Themis Part Number 108712.

• A Paddle Board, Themis Part Number 105581. This paddle board must be connected behind the first

slot occupied by the USPIIi-1v board

• A 68 pin, SCSI-3 ribbon cable for the paddle board SCSI (SCSI A); Themis Part Number 108432.

The INT-KIT-USPIIi-1V/2-VME integration kit includes:

• The INT-KIT-USPIIi-1V/1-VME integration kit

• A second Paddle Board, Themis Part Number 105581. This paddle board must be connected behind the

second slot occupied by the USPIIi-1v board

• A second 68 pin, SCSI-3 ribbon cable for the second paddle board SCSI (SCSI B); Themis Part Number

108432.

• A Micro DB9 connector to Sun type 5 Keyboard and Mouse connector (Din-8) adapter cable; Themis

Part Number: 108783.

• A 26 pin, Male, Amplimite connector to a DB25 connector Adapter Cables for Serial Ports C or D;

Themis Part Number 108376.

• A 26 pin Male, Amplimite connector to DB25 printer cable for the Parallel Port; Themis Part Number

104077.

Please report any discrepancies to Themis Computer customer support immediately.

Remove the USPIIi-1v board from its antistatic wrapping and verify that it is in the ordered configuration. For

information on the available configurations and their appearances refer to Chapter 3, "Specification."

1.5 How to Start Quickly

To start quickly with the USPIIi-1v Themis Computer recommends that you read the following sections:

• Chapter 2, "Installation," This appendix contains vital information on configuring the USPIIi-1v and the

design and setup of VMEbus based systems.

• Consult Appendix B, "Jumper and Solder Bead Configurations." This appendix contains a complete

listing of all user configurable jumpers and the default settings. Verify that the jumpers on your board

are set to meet your application requirements.

In addition to the USPIIi-1v hardware manual, the USPIIi-1v software manual (Themis P/N 108966) contains

information on software registers, address maps, additional Openboot commands as well as a description of

the Themis Computer VME software package for Solaris.

USPIIi-1v Hardware Manual

1-4 Themis Computer

1.6 Chapter Overview

This document is organized in chapters and appendices of increasing information content and detail. A brief

outline of the contents of each chapter is provided:

• Chapter 1, "Introduction," contains a brief overview of this document, warranty information and related

references.

• Chapter 2, "Installation," provides instructions on the installation and configuration of the USPIIi-1v for

your particular environment and application. The information contained in this chapter is mandatory

for the correct operation of the USPIIi-1v. This chapter should be read in its entirety before use

of the board.

• Chapter 3, "Specification," provides a tabular description subsystems on the USPIIi-1v as well as the

System, Environmental, Electrical, and Performance specifications.

• Chapter 4, "Hardware Overview," provides a brief description of the major components on the USPIIi-

1v, the memory subsystem and the Open Boot Program code (OBP).

• Chapter 5, "Universe-II Description," provides detailed information concerning the VMEbus interface

for the USPIIi-1v, the Tundra Universe IIB. For a more detailed description of the Universe IIB, refer

the “Universe II User’s Manual”, available on the Tundra web-site at http://www.tundra.com.

• Chapter 6, "FPGA, Watchdog, Voltage and Temperature Sensors," provides a description of the FPGA

and EPLD on the USPIIi-1v. Included in this chapter are description of the temperature warning system,

boot address decoder, power management system, and the 3-level watchdog.

• Chapter 7, "Resets," describes the Reset Tree of the USPIIi-1v.

• Appendix A, "Connector Pinouts, LEDs, Switches," provides connector part numbers and pinouts for

the User I/O on the USPIIi-1v.

• Appendix B, "Jumper and Solder Bead Configurations," provides a detailed description of each of the

user configurable jumpers on the USPIIi-1v, as well as diagrams illustrating the location of all solder

beads and jumpers.

• Appendix C, "Front Panel Diagrams," illustrates front panels for single, double, and triple slot

configurations of the USPIIi-1v.

• Appendix D, "Board Diagrams," provides board diagrams of the USPIIi-1v.

• Appendix E, "Glossary," provides the general definition of terms and abbreviations used in this manual.

1.7 Related References

The following is a list of related references.

• USPIIi-1v Software Manual (P/N 108966)

• PCI Local Bus Specification, Revision 2.1, PCI Special Interest Group, Portland

• American National Standard for VME64, ANSI/VITA, 1994

• PCI System Architecture, by Shanley and Anderson, MindShare Press

• IEEE Standard 1275-1994, Standard For Boot (Initialization, Configuration) Firmware, Core Practices and

Requirements

• IEEE Standard 1275.1-1994, Standard For Boot (Initialization, Configuration) Firmware, ISA Supplement for

IEEE P1754 (SPARC)

Themis Computer 1-5

1. Introduction

• IEEE Standard P1275.6/D4, Standard For Boot (Initialization, Configuration) Firmware, 64 Bit Extensions

• OpenBoot 3.x Command Reference, Sun Microsystems (802-5837-10, Rev A)

• PCI Bus Binding to IEEE 1275-1994, Standard for Boot (Initialization, Configuration) Firmware, Revision 1.0,

14 April 1994, Prepared by the Open Firmware Task Force of the PCI Alliance

• OpenBoot 3.x Command Supplement for PCI, Sun Microsystems (805-1627-10)

• The SPARC Architecture Manual, Version 9, David L. Weaver and Tom Germond, editors, PTR Prentice Hall

• SunVTS™ 2.1 SunVTS User’s Guide Part No. 802-7299 August 1997, Rev. A

• SunVTS™ Quick Reference Card, Part No. 802-7301 August 1997, Rev. A

• SunVTS™ 2.1.3 Test Reference Manual Part No. 805-4163-10, May 1998, Rev. A

Integrated Circuit Specifications:

• UltraSPARC-IIi User’s Manual (SUN Part Number: 805-0087-01)

• SME1040 Highly Integrated 64-bit RISC Processor, PCI Interface Data Sheet

(SUN Part Number: 805-0086-02)

• STP2210QFP Reset/Interrupt/Clock Controller (RIC) User’s Manual

(SUN Part Number: 805-0167-01)

• SME2411BGA-66 Advanced PCI Bridge (APB) User’s Manual

(SUN Part Number: 805-1251-01)

• SME STP2003QFP: PCI Input to Output Controller User’s Manual

(SUN Part Number: 802-7837-01)

• Universe II User Manual, Tundra, Spring, 1998

• National Semiconductor DP83843 Phyter Data Sheet, Version E, August, 1997, National

Semiconductor Corporation,

• Symbios SYM53C876 SCSI I/O Processor Data Manual, Version 3.0, 1996

Sun documents are available for download on www.sun.com or docs.sun.com. Hardcopies can be ordered on the the

catalog section of the SunExpress™ Internet site at www.sun.com/sunexpress. Non-Sun documents are available from their

respective vendor’s Web site.

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