SOYO Computer Hardware mother board fc-pga socket 370 pocessor supported User manual

SY-7ISA+

Motherboard

****************************************************

FC-PGA Socket 370 Processor supported

815E AGP/PCI/CNR

66/100/133 MHz Front Side Bus supported

ATX Form Factor

****************************************************

User's Manual

SOYO

™

SY-7ISA+

ii

Trademarks:

Soyo is the registered trademark of Soyo Computer Inc. All trademarks are the

properties of their owners.

Product Rights:

All names of the product and corporate mentioned in this publication are used for

identification purposes only. The registered trademarks and copyrights belong to

their respective companies.

Copyright Notice:

part of this manual may be reproduced, transmitted, transcribed, translated into any

other language, or stored in a retrieval system, in any form or by any means, such

as by electronic, mechanical, magnetic, optical, chemical, manual or otherwise,

without permission in writing from Soyo Computer Inc.

Disclaimer:

Soyo Computer Inc. makes no representations or warranties regarding the contents

of this manual. We reserve the right to amend the manual or revise the

specifications of the product described in it from time to time without obligation to

notify any person of such revision or amend. The information contained in this

manual is provided to our customers for general use. Customers should be aware

that the personal computer field is subject to many patents. All of our customers

should ensure that their use of our products does not infringe upon any patents. It is

the policy of Soyo Computer Inc. to respect the valid patent rights of third parties

and not to infringe upon or to cause others to infringe upon such rights.

Restricted Rights Legend:

Use, duplication, or disclosure by the Government is subject to restrictions set

forth in subparagraph (c)(1)(ii) of the Rights in Technical Data and Computer

Software clause at 252.277-7013.

About This Guide:

This Quick Start Guide can help system manufacturers and end users in setting up

and installing the Motherboard. Information in this guide has been carefully

checked for reliability; however, to the correctness of the contents there is no

guarantee given. The information in this document is subject to amend without

notice.

For further information, please visit our Web Site on the Internet. The address is

"http://www.soyo.com.tw".

Edition: May 2001

Version 1.3

7ISA+ SERIAL

FC

C

Test ed To Com ply

With FCC Standards

FOR HOME OR OFFICE USE

POST CONSUMER

RECYCLED PAPER

100%

Table of Contents

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iii

Table of Contents

CHAPTER 1 MOTHERBOARD DESCRIPTION.....................................1

1-1 INTRODUCTION...............................................................1

1-2 HANDLING THE MOTHERBOARD ...............................3

1-3 ELECTROSTATIC DISCHARGE PRECAUTIONS..........3

1-4 SY-7ISA+ MOTHERBOARD LAYOUT ...........................4

1-5 SY-7ISA+ MOTHERBOARD COMPONENTS.................5

1-6 CHIPSET ............................................................................7

1-7 I/O INTERFACE CONTROLLER....................................14

1-8 HARDWARE MONITOR.................................................16

1-9 WAKE ON LAN TECHNOLOGY ...................................16

CHAPTER 2 HARDWARE INSTALLATION.........................................17

2-1 PREPARATIONS..............................................................17

2-2 UNPACKING THE MOTHERBOARD ...........................18

2-3 INSTALLATION GUIDE .................................................19

2-3.1 CPU Installation................................................................ 20

2-3.2 SDRAM Memory Module Installation ............................... 23

2-3.3 Motherboard Connector .................................................... 25

2-3.4 Jumper Setting................................................................... 41

2-3.5 Voice Doctor ...................................................................... 44

2-3.6 CMOS Clear (JP5) ............................................................ 44

2-3.7 Power On........................................................................... 45

2-3.8 Quick BIOS Setup .............................................................. 46

2-3.9 Troubleshooting at First Start............................................ 48

2-3.10 Power Off........................................................................... 52

CHAPTER 3 BIOS SETUP UTILITY......................................................53

3-1 SOYO COMBO SETUP ...................................................56

3-2 STANDARD CMOS SETUP............................................60

3-3 ADVANCED BIOS FEATURES ......................................63

3-4 ADVANCED CHIPSET FEATURES ...............................67

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3-5 INTEGRATED PERIPHERALS.......................................69

3-6 POWER MANAGEMENT SETUP..................................74

3-7 PNP/PCI CONFIGURATION SETUP..............................78

3-8 PC HEALTH STATUS ......................................................81

3-9 LOAD FAIL-SAFE DEFAULTS ......................................83

3-10 LOAD OPTIMIZED DEFAULTS.....................................84

3-11 SUPERVISOR PASSWORD ............................................85

3-12 USER PASSWORD ..........................................................86

3-13 IDE HDD AUTO DETECTION .......................................87

CHAPTER 4 DRIVERS INSTALLATION ..............................................89

Motherboard Description

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Chapter 1

MOTHEBOARD DESCRIPTION

1-1 INTRODUCTION

 The SY-7ISA+ AGP/PCI/CNR Motherboard is a high-performance,

Socket 370 processor, support ATX form-factor system board.

SY-7ISA+ uses the 815E Chipset technology. This Motherboard is

fully compatible with industry standards Supports Intel® FC-PGA

processors

- FSB 66MHz: Celeron(400-700MHz)

- FSB 100MHz: Pentium® III (500-850MHz)

- FSB 133MHz: Pentium® III (533-1000MHz)

 Supports 66/100/133 MHz Front Side Bus Frequency

 Auto-detect CPU voltage

 PC99, ACPI

 Ultra DMA33/66/100 (ATA 33/66/100)

 Supports Wake-On-LAN (WOL)

 Support PC-100 and PC-133 SDRAM

 Supports ACPI Suspend Indicator

 Power-on by modem, alarm and PS/2 Keyboard

 Power failure resume

 Supports Suspend to RAM

 Supports onboard hardware monitoring and includes Hardware

Doctor™ utility

 Fan speed information

 Easy CPU settings in BIOS with the “SOYO COMBO Setup”

 Support display cache interface (AIMM card) multiplexed on the

AGP interface

-133MHz SDRAM interface only

-4MB max addressable

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 Supports multiple-boot function

 AGP 2.0 Compliant;

AGP Universal Connector supports:

- 1.5V and 3.3V AGP cards

- 1X/2X/4X data transfer

 Supports Communication Networking Riser Slot (CNR 1.0

compliant) *

 Smart Card Reader

- Compliant with Personal Computer Smart Card (PC/SC) Working

Group standard

- Compliant with smart card (ISO 7816) protocols

- Supports card present detect

- Supports Smart Card insertion power-on feature

 3 x DIMM slots for SDRAM memory

 1 x 32-bit AGP slot

 6 x 32-bit bus master PCI slots

 4 x USB ports onboard

 1 x IrDA port

 ATX power connector

* If the user wants to use a Modem Riser card (MR) make sure to use a

Secondary

mode

MR,

PRIMARY

mode MRs are

NOT

Supported.

Motherboard Description

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3

1-2 HANDLING THE MOTHERBOARD

To avoid damage to your Motherboard, follow these simple rules while

unpacking:

 Before handling the Motherboard, ground yourself by grasping an

unpainted portion of the system's metal chassis.

 Remove the Motherboard from its anti-static packaging. Hold the

Motherboard by the edges and avoid touching its components.

 Check the Motherboard for damage. If any chip appears loose, press

carefully to seat it firmly in its socket.

Warning:

Do not apply power if the Motherboard appears

damaged. If there is damage to the board, contact your dealer

immediately.

1-3 ELECTROSTATIC DISCHARGE PRECAUTIONS

Make sure to ground yourself before handling the Motherboard or other

system components. Electrostatic discharge can easily damage the

components. Note that you must take special precautions when handling

the Motherboard in dry or air-conditioned environment.

To protect your equipment from electrostatic discharge, take the following

precautions:

 Do not remove the anti-static packaging until you are ready to install.

 Ground yourself before removing any system component from its

protective anti-static packaging. (To ground yourself, grasp the expansion

slot covers or other unpainted portions of the computer chassis.)

 Frequently ground yourself while working or use a grounding strap.

 Handle the Motherboard by its edges and avoid touching its

components.

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1-4 SY-7ISA+ MOTHERBOARD LAYOUT

Back Panel SY-7ISA+ Platform

USB 1

USB 2

PS/2 KB

Connector

PS/2 MousePS/2 Mouse

Connector

3V

Lithium

Battery

IDE 1IDE 2

ATX Power

LINE-OUT

LINE-IN

MIC JACK

JOYSTICK

VGA

PCI#6

PCI#5

PCI#4

PCI#3

PCI#1

PCI#2

Intel

1

3

CPUFAN

2

13

14

PRT

COM A

AGP Slot

JP8

1

3

JP1

JP34

1

2

JP6

1

2

JP7

1

3

CJ2

1

3

CJ1

CDIN1

CNR1

SMCARDCN

SYSFAN

SIRCON

ITE

IT8712F-A

DIMM1

DIMM2

DIMM3

USB3_4

Power

LED

Keylock

Speaker

STR

LED

HDD

LED

PWRBT

Reset

WOL

Header

CMOS Clear

Jumper

1

4

1

2

5

10

9

FDC1

JP10

JP5

JP22

JP9

JP33

Sigmatel

STAC9721

COM1

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1-5 SY-7ISA+ MOTHERBOARD COMPONENTS

ABC D EF G H I

J

K

L

M

N

O

P

Q

RSTUVXACAD AAAB

AE

AF

AG

AH

Z

Y

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A Enable/Disable USB Keyboard Wake Up Jumper

B Enable/Disable Power-On by Keyboard Jumper

C CPU Frequency Settings Jumper

D Socket 370 Connector

E 32-bit AGP slot

F Intel FW82815 Chip

G ATX Power Supply Connector

H DIMM Bank

I CPU Frequency Settings Jumper

J Bus Mastering E-IDE/ATAPI Ports

K Floppy Disk Drive (FDD)

L Intel FW82801 Chip

M CMOS Clear Jumper

N Wake-On-LAN( WOL) Header

O Chassis Cooling Fan Connector

P Front panel connectors

Q SPEAKER OPTION Setting Jumper

R Intel 82802AB 4MB FWH

S USB Connector

T FWH Boot Block Write-Protect Setting Jumper

U Serial Infrared (IrDA) Device Header

V 3V Lithium Battery

W System Fan Connector

X Voice Doctor’s language Jumper

Y 32-bit PCI Mastering Slots

Z Smart Card Reader Connector

AA

AB

AC

AD

AE

AF

AG

AH

CNR MR Card-CODEC OPTION Setting Jumper

Communication Networking Riser Slot

COM2 Connector

ITE IT8712F-A Chip

AC97 Codec Chip

CD-IN Connector

CPU Cooling Fan Connector

Back panel Connectors

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1-6 CHIPSET

The Intel ® 815E Chipset is a high-flexibility chipset designed to

extend from the basic graphics/multimedia PC platform up to the

mainstream performance desktop platform. The chipset consists of a

Graphics and Memory Controller Hub (Intel® 815E GMCH), an I/O

Controller Hub2 (ICH2) for the I/O subsystem, and a Firmware

Hub(FWH). The Intel® 815E GMCH integrates a system memory

SDRAM controller that supports a 64-bit 100/133 MHz SDRAM

array.

The Intel® 815E GMCH integrates a Display Cache SDRAM

controller that supports a 32-bit 133MHz SDRAM array for

enhanced integrated 2D and 3D graphics performance Multiplexed

with the display cache interface is an AGP controller interface to

enable graphics configuration and upgrade flexibility with the Intel®

815E chipset. The AGP interface and the internal graphics device are

mutually exclusive. When the AGP port is populated with an AGP

graphics card the integrated graphics is disabled and thus the display

cache interface is not needed.

1-6.1 The Intel® 815E Chipset System

The Intel® 815E Chipset uses a hub architecture with the Intel®

815E GMCH as the host bridge hub and the 82801BA I/O Controller

Hub2(ICH2) as the I/O hub. The ICH2 is a highly integrated

multifunctional I/O Controller Hub that provides the interface to the

PCI Bus and integrates many of the functions needed in today’s PC

platforms. The Intel® 815E GMCH and ICH2 communicate over a

dedicated hub interface.

82801BA(ICH2) functions and capabilities include:

 PCI Rev2.2 compliant with support for 33MHz PCI

operations

 ICH2 supports up to 6 PCI/Req/Gnt pairs

 Integrated System Management Controller

Motherboard Description

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 Enhanced DMA Controller, Interrupt Controller & Timer

Functions

 Bus Master IDE controller – Supports Ultra ATA/100

 USB host interface with support for 4 USB ports

 AC’97 2.1 interface

 Low Pin Count (LPC) interface

 Firmware Hub(FWH)interface support

 Alert On LAN

 SIM Bus controller

 I/O APIC

 Upstream accelerated hub architecture interface for

access to the GMCH

1-6.2 Intel® 815E GMCH Overview

The Intel® 815E GMCH functions and capabilities include:

 Support Uni-processor system

 64-bit AGTL+ based System Bus Interface at

66/100/133 MHz

 32-bit Host Address Support

 64-bit System Memory Interface with optimized support

for SDRAM at 100/133 MHz

 Integrated 2D & 3D Graphics Engines

 Integrated H/W Motion Compensation Engine

 Integrated 230 MHz DAC

 Integrated Digital Video Out Port

 133MHz Display Cache

 AGP 1X/2X/4X Controller

1-6.3 Host Interface

The host interface of the Intel® 815E GMCH is optimized to

support the Intel® Pentium III processor and Intel® Celeron™

Processor in the FC-PGA package. The Intel® 815E GMCH

implements the host address, control, and data bus interfaces within

a single device. The Intel® 815E GMCH supports a 4-deep in-order

queue(i.e., supports pipelining of up to 4 outstanding transaction

Motherboard Description

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requests on the host bus). Host bus addresses are decoded by the

Intel® 815E GMCH for accesses to system memory, PCI memory

and PCI I/O (via hub interface), PCI configuration space and

Graphics memory. The Intel® 815E GMCH takes advantage of the

pipelined addressing capability of the pipelined addressing

capability of the processor to improve the overall system

performance.

The Intel® 815E GMCH supports the 370-pin socket processor.

*370-pin socket (PGA370). The PGA370 is a zero insertion force

(ZIF) socket that a processor in the FC-PGA package will use to

interface with a system board.

1-6.4 System Memory Interface

The Intel® 815E GMCH integrates a system memory controller that

supports a 64-bit 100/133 MHz SDRAM array. The only DRAM

type supported is industry standard Synchronous DRAM (SDRAM).

The SDRAM controller interface is fully configurable through a set

of control registers.

The Intel® 815E GMCH supports industry standard 64-bit wide

DIMMs with SDRAM devices. The thirteen multiplexed address

lines. SMAA[12:0], along with the two bank select lines, SBS[1:0],

allow the Intel® 815E GMCH to support 2M, 4M, 8M, 16M, and

42M x64 DIMM. Only asymmetric addressing is supported. The

Intel® 815E GMCH has 6 SCS# lines (2 copies of each for electrical

loading), enabling the support of up to six 64-bit rows of SDRAM.

The Intel® 815E GMCH targets SDRAM with CL2 and CL3 and

supports both single and double-sided DIMMs. Additionally, the

Intel® 815E GMCH also provides a 1024 deep refresh queue. The

Intel® 815E GMCH can be configured to keep up to 4 page op[en

within the memory array. Pages can be kept open in any one bank of

memory.

SCKE[4:0] is used in configurations requiring powerdown mode for

the SDRAM.

Motherboard Description

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1-6.5 Multiplexed AGP and Display Cache Interface

The Intel® 815E GMCH multiplexes an AGP interface with a

display cache interface for internal 3D graphics performance

improvement. The Display Cache is used only in the internal

graphics. When an AGP card is installed in the system, the Intel®

815E GMCH internal graphics will be disabled and the AGP

controller will be enabled.

1-6.5.1 AGP Interface

A single AGP connector is supported by the Intel® 815E GMCH

AGP interface. The AGP buffers operate in one of two selectable

modes in order to support the AGP Universal Connector:

1) 3.3V drive, not 5 volt safe – This mode is compliant to the AGP

1.0 and 2.0 specs.

2) 1.5V drive, not 3.3 volt safe – This mode is compliant with the

AGP 2.0 spec.

The following table shows the AGP Data Rate and the Signaling

Levels supported by the GMCH:

Signaling Level

Data Rate 1.5V 3.3V

1x AGP Yes Yes

2x AGP Yes Yes

4x AGP Yes No

The AGP interface supports 4x AGP signaling. AGP semantic

(PIPE# or SBA[7:0]) cycles to SDRAM are not snooped on the host

bus. AGP FRAME# cycles to SDRAM are snooped on the host bus.

The GMCH supports PIPE# or SBA[7:0] AGP address mechanisms,

but not both simultaneously. Either the PIPE# or the SBA[7:0]

mechanism must be selected during system initialization. High

priority accesses are supported. Only memory writes from the hub

interface to AGP are allowed. No transactions from AGP to the hub

interface are allowed.

Motherboard Description

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1-6.5.2 AIMM Card Interface

Display Cache Interface multiplexed on the AGP interface:

 32-bit data interface

 133 MHz SDRAM interface only

 Flexible AGP In-Line Memory Module (AIMM)

Implementation

 Support for 2 1Mx16, or 1 2Mx32 on AIMM card

 4MB max addressable

1-6.5.3 Display Cache Interface

The Intel® 815E GMCH support a Display Cache SDRAM

controller with a 32-bit 133 MHz SDRAM array. The DRAM type

supported is industry standard Synchronous DRAM (SDRAM) like

that of the system memory. The local memory SDRAM controller

interface is fully configurable through a set of control registers.

1-6.6 Hub Interface

The hub interface is a private interconnect between the Intel® 815E

GMCH and the ICH2.

1-6.7 Intel® 815E GMCH Integrated Graphics Support

The Intel® 815E GMCH includes a highly integrated graphics

accelerator. Its architecture consists of dedicated multi-media

engines executing in parallel to deliver high performance 3D, 2D

and motion compensation video capabilities. The 3D and 2D engines

are managed by a 3D/2D pipeline preprocessor allowing a sustained

flow of graphics data to be rendered and displayed. The deeply

pipelined 3D accelerator engine provides 3D graphics quality and

performance via per-pixel 3D rendering and parallel data paths

which allow each pipeline stage to simultaneously operate on

different primitives or portions of the same primitive. The Intel®

815E GMCH graphics accelerator engine supports

perspective-correct texture mapping, trilinear and anisotropic

Mip-Map filtering, Gouraud shading, alpha-blending, fogging and

Z-buffering. A rich set of 3D instructions permit these features to be

Motherboard Description

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12

independently enabled or disabled.

For the Intel® 815E GMCH, a Display Cache (DC) can be used for

the Z-buffer is located in system memory.

The Intel® 815E GMCH integrated graphics accelerator’s 2D

capabilities include BLT and arithmetic STRBLT engines, a

hardware cursor and an extensive set of 2D registers and

instructions. The high performance 64-bit BitBLT engine provides

hardware acceleration for many common Windows operations.

In addition to its 2D/3D capabilities, the Intel® 815E GMCH

integrated graphics accelerator also supports full MPEG-2 motion

compensation for software-assisted DVD video playback.

Motherboard Description

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13

1-6.8 IDE Support

The motherboard has two independent bus-mastering PCI IDE interfaces.

These interfaces support PIO Mode3, PIO Mode 4, PIO Mode 5 ATAPI

devices (e.g., CD-ROM), and Ultra DMA 33/66/100 synchronous-DMA

mode transfers. The BIOS supports logical block addressing (LBA) and

extended cylinder head sector (ECHS) translation modes. The BIOS

automatically detects the IDE device transfer rate and translation mode.

Programmed I/O operations usually require a substantial amount of

processor bandwidth. However, in multitasking operating systems, the

bandwidth freed by bus mastering IDE can be devoted to other tasks while

disk transfers are occurring.

The motherboard also supports laser servo (LS-120) drives. LS-120

technology allows the user to perform read/write operations to LS-120

(120MB) and conventional 1.44MB and 720KB diskettes. An optical servo

system is used to precisely position a dual-gap head to access the diskett’s

2,490 tracks per inch (tpi) containing up to 120 MB of data storage. A

conventional diskette uses 135 tpi for 1.44 MB of data storage.

LS-120 drivers are ATAPI-compatible and connect to the motherboard’s

IDE interface. (LS-120 drives are also available with SCSI and parallel

port interfaces.) Some versions of Windows 95 and Windows NT

operating systems recognize the LS-120 drive as a bootable device in both

120 MB and 1.44 MB mode.

Connection of an LS-120 drive and a standard 3.5-inch diskette drive is

allowed. The LS-120 drive can be configured as a boot device if selected

as Drive A in the BIOS setup program.

¡

Note

If you connect a LS-120 drive to an IDE connector and configure it as

the :boot: drive and configure a standard 3.5-inch diskette drive as a “B”

drive, the standard diskette drive is not seen by the operating system.

When the LS-120 drive is configured as the “boot: device, the system will

recognize it as both the A and B drive

Motherboard Description

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1-6.9 Real-Time Clock

The real-time clock supports 256 bytes of battery-backed CMOS SRAM.

Hardware implementation to indicate century rollover.

1-7 I/O INTERFACE CONTROLLER

The motherboard uses the ITE IT8712F-A I/O controller which features:

 Single diskette drive interface

 Two serial ports

 FIFO supports on both serial and diskette interfaces

 One parallel port with Extended Capabilities Port (ECP) and

Enhanced Parallel Port (EPP) support

 PS/2 style mouse and keyboard interfaces

 PCI PME interface

 Intelligent auto power management, including:

 Shadowed write-only registers for ACPI compliance

 Programmable wake-up event interface

The Setup program provides configuration option for the I/O controller.

1-7.1 Serial Ports

The motherboard has one 9-pin D-Sub serial port connector located on the

back panel. The NS16C5450-compatible UARTs support data transfers at

speeds up to 115.2 Kbits/sec with BIOS support.

1-7.2 Parallel Port

The connector for the multimode bi-directional parallel port is a 25-pin

D-Sub connector located on the back panel of the motherboard. In the

Setup program, there are four options for parallel port operation:

 Compatible (standard mode)

 Bi-directional (PS/2 compatible)

 Bi-directional EPP. A driver from the peripheral manufacturer is

required for operation. See Section 6.2 for EPP compatibility.

 Bi-directional high-speed ECP

1-7.3 Diskette Drive Controller

The I/O controller is software compatible with the 82077 diskette drive

controller and supports both PC-AT and PS/2 modes. In the Setup

Motherboard Description

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program, the diskette drive interface can be configured for the following

diskette drive capacities and sizes.

 360 KB, 5.25-inch

 1.2 MB, 5.25-inch

 720 KB, 3.5-inch

 1.2 MB. 3.5-inch (driver required)

 1.25-1.44 MB, 3.5-inch

 2.88 MB, 3.5-inch

1-7.4 PS/2 Keyboard and Mouse Interface

PS/2 keyboard and mouse connectors are located on the back panel of the

motherboard. The +5 V lines to keyboard and mouse connectors are

protected with a fuse that prevents motherboard components from being

damaged when an over-current condition occurs.

¡

Note

The mouse and keyboard can be plugged into either PS/2 connector.

Power to the computer should be turned off before a keyboard or mouse is

connected or disconnected.

The keyboard controller contains code, which provides the traditional

keyboard and mouse control functions, and also supports Power On/Reset

password protection. Power On/Reset password can be specified in the

BIOS Setup program.

The keyboard controller also supports the hot-key sequence

<Ctrl><Alt><Del>, software reset. This key sequence resets the

computer’s software by jumping to the beginning of the BIOS code and

running the Power On Self Test (POST).

1-7.5 Infrared Support

The IR connection can be used to transfer files to or from portable devices

like laptops, PDAs, and printers.

Motherboard Description

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16

1-8 HARDWARE MONITOR

The optional hardware monitor subsystem provides low-cost

instrumentation capabilities. The features of the hardware monitor

subsystem include:

 An integrated ambient temperature sensor

 Fan speed sensors, which monitor the fan 1 and fan 2 connectors

 Power supply voltage monitoring to detect levels above or below

acceptable values

When suggested ratings for temperature, fan speed, or voltage are

exceeded, an interrupt is activated. The hardware monitor component

connects to the SMBus.

1-9 WAKE ON LAN TECHNOLOGY

Wake on LAN technology enables remote wakeup of the computer

through a network. Wake on LAN technology requires a PCI add-in

network interface card (NIC) with remote wakeup capabilities. The remote

wakeup connector on the NIC must be connected to the onboard Wake on

LAN technology connector. The NIC monitors network traffic at the MII

interface; upon detecting a Magic Packet, the NIC asserts a wakeup signal

that powers up the computer. To access this feature uses the Wake on LAN

technology connector.

☛CAUTION

For Wake on LAN, the 5-V standby line for the power supply must be

capable of delivering +5V ±5 % at 720 mA. Failure to provide adequate

standby current when implementing Wake on LAN can damage the power

supply.

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