SMSC EVB-USB3320 USER MANUAL Revision 1.0 (02-09-10)
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EVB-USB3320 USB Transceiver
Evaluation Board User Manual
EVB-USB3320 USB Transceiver Evaluation Board User Manual
Revision 1.0 (02-09-10) 2 SMSC EVB-USB3320
USER MANUAL
1 Introduction
This user manual is for the USB3320 USB Transceiver Evaluation Board (EVB) for use with USB3320
products with the integrated USB switch.
The USB3320 features a ULPI interface to support systems with USB Host, Device, or On-the-Go
(OTG) capability. The integrated switch can be used to multiplex a Full Speed USB signal or audio
signals over the HS USB DP/DM pins. SMSC supplies a complete family of transceiver products to
meet the needs of many applications.
2 Overview
The EVB-USB3320 is a Daughter Card designed to plug into a user's test system using a T&MT
connector. The card attaches to a USB link layer to create a USB Host, Device, or On-the-Go (OTG)
system. The board edge connector meets the UTMI+ Low Pin Interface (ULPI) Standard requirements
for the T&MT connector.
A link to the ULPI Working Group Page is available at www.smsc.com or may be obtained from your
local FAE. The EVB-USB3320 includes USB3320 packaged silicon and all external components
required for the USB transceiver function.
This manual describes PCB assembly PCB-7163AZ.
2.1 Supplying VBUS Voltage
In Host or OTG operation, the EVB-USB3320 must provide 5 Volts on V
BUS
at the USB connector. The
EVB-USB3320 includes a switch that can drive V
BUS
using the 5 Volt supply that comes from pin 28
of the T&MT connector.
The VBUS switch is controlled by the CPEN signal from the USB3320. The USB controller dictates
the state of CPEN by programming the ULPI register in the USB3320. The 5 Volt switch is backdrive
protected when in the off state. The switch does not provide protection from reverse currents when it
is on. See Section 2.9 and Section 2.10 for more information on configuring the EVB-USB3320 for
OTG and Host operation.
2.2 1.8 Volt Power Supply
The EVB-USB3320 EVB has a Low Drop-Out (LDO) Regulator that drives the USB3320 VDD18 pins.
This LDO requires a nominal 3.3 Volt supply capable of providing 80mA of current to be present at the
T&MT connector (pins 8, 16, 57, or 69).
2.3 ULPI I/O Voltage
The USB3320 supports variable ULPI I/O voltage signaling. The ULPI I/O voltage is supplied in one
of two ways. By default, the EVB is shipped with VDDIO supplied by the on-board LDO.
Resistor R18 is used to set VDDIO, the digital logic high voltage. To change the value of VDDIO,
calculate a new value for R18 (ohms) as follows.
R18 = (VDDIO/1.225-1) x 169000
VDDIO must be in the range of 1.8 Volts - 3.3 Volts nominal.
VDDIO can also be supplied to the USB3320 from the T&MT connector instead of using the LDO. To
do this, the LDO (U10) must be removed.
The VDDIO voltage level that has been configured on the EVB-USB3320 must be the same as the
ULPI I/O voltage level that the link is using.
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USER MANUAL
2.4 Edge Connector for Digital I/O
The T&MT edge connector is compliant to the ULPI specification. Part numbers and manufacturers for
this connector and it’s mate are given in Table 2.1.
2.5 REFCLK Frequency Selection
The EVB-USB3320 offers a user selectable reference clock frequency. R25 - R30 are used to configure
the REFCLK[2:0] signals which will select the reference clock frequency desired on the EVB-USB3320.
Ensure that the frequency of the reference clock or reference crystal being used matches the desired
operation frequency configured based on Table 2.2 below. By default, the EVB-USB3320 is configured
for 26MHz REFCLK operation.
2.6 USB Connector
A standard Mini-AB connector is provided to attach a USB cable or connector. Provision is made on
the PCB to accept a Micro-AB connector. See the bill of materials in Section 6 for connector part
numbers. Do not substitute a different part number for the Mini-AB receptacle or a short circuit of the
USB signals may result at the micro-AB connector PCB footprint.
2.7 VBUS Present Detection
The USB controller must detect VBUS when a USB cable is attached in device mode or when the USB
controller turns on VBUS in host or OTG mode. The USB connector VBUS signal is connected to the
VBUS pin of the USB3320. The USB3320 includes all of the comparators required to detect VBUS and
report the state of VBUS to the USB controller via the ULPI bus.
Table 2.1 Edge Connector on the EVB-USB3320
PART NUMBER DESCRIPTION MANUFACTURER
2-557101-5 100 pin edge connector on EVB-USB3320 AMP
2-557-101-5 Mating connector to the EVB-USB3320 AMP
1-1734037-0 Alternate 100 pin edge connector for EVB-USB3320 TYCO
1-1734099-0 Alternate mating connector to the EVB-USB3320 TYCO
Table 2.2 Reference Frequency Selection Resistor Configurations
R25 R26 R27 R28 R29 R30 REFCLK FREQUENCY
INSTALL EMPTY INSTALL EMPTY EMPTY INSTALL 26.0 MHz (Default)
EMPTY INSTALL INSTALL EMPTY EMPTY INSTALL 12.0 MHz
EMPTY INSTALL EMPTY INSTALL EMPTY INSTALL 52.0 MHz
INSTALL EMPTY INSTALL EMPTY INSTALL EMPTY 24.0 MHz
INSTALL EMPTY EMPTY INSTALL INSTALL EMPTY 19.2 MHz
EMPTY INSTALL INSTALL EMPTY INSTALL EMPTY 27.0 MHz
EMPTY INSTALL EMPTY INSTALL INSTALL EMPTY 38.4 MHz
INSTALL EMPTY EMPTY INSTALL EMPTY INSTALL 13.0 MHz
EVB-USB3320 USB Transceiver Evaluation Board User Manual
Revision 1.0 (02-09-10) 4 SMSC EVB-USB3320
USER MANUAL
2.8 ULPI Signal Test Points
Probe points at location J2, provide access to all ULPI signals. Install the Tektronix logic analyzer probe
retention kit at J2 to probe these signals. Ordering information for the retention kit is provided in the
bill of materials.
2.9 Converting the EVB to an OTG System
“Out of the box”, the EVB-USB3320 is delivered as a USB Device system. To convert it to be a USB
OTG development board, the following modifications must be made:
1. Install R13 (zero ohm resistor). This connects the VBUS 5V switch to the VBUS signal.
2. Remove R23. This is the R
VBUS
value required for a USB Device.
3. Install R10 (1.0K, 1W resistor). This is the R
VBUS
value required for a USB OTG Device.
Since the USB3320 is designed to accommodate up to 30V on VBUS, R10 is rated at 1W to
accommodate this entire voltage range. Refer to the USB3320 datasheet for more information on sizing
this resistor.
2.10 Converting the EVB to a Host System
“Out of the box”, the EVB-USB3320 is delivered as a USB Device System. To convert it to be a USB
Host development board, the following modifications must be made:
1. Install R13 (zero ohm resistor). This connects the VBUS 5V switch to the VBUS signal.
2. Install C20 (150uF capacitor). This increases the value of C
VBUS
to be USB 2.0 Host compliant.
2.11 Converting the EVB to Support ULPI Clock Input Mode
“Out of the box”, the EVB-USB3320 uses a crystal (Y1) as the clock reference, and is configured for
ULPI Clock Output Mode where CLKOUT sources a 60MHz clock. To convert the EVB to support ULPI
Clock Input Mode, the following changes must be made:
1. Install R12 (zero ohm resistor). This shorts CLKOUT to VDD18.
2. Install R3 (zero ohm resistor). This shorts REFCLK to the System Clock pin on the T&MT
connector.
3. Confirm that R4 is not populated.
4. Remove the following components to remove the crystal circuit: Y1, R17, C23
Refer to the USB3320 datasheet for more information on ULPI Clock Input Mode.
2.12 T&MT Pin Description
The T&MT signal names, pin number and function are described in Table 43 and Table 44 of the ULPI
Specification rev 1.1.
The EVB-USB3320 fully implements a ULPI compliant interface to the T&MT connector, including
support for ULPI Clock Input Mode. This EVB supports a 1.8V ULPI I/O voltage. All signals are
described in Table 2.3.
EVB-USB3320 USB Transceiver Evaluation Board User Manual
SMSC EVB-USB3320 5 Revision 1.0 (02-09-10)
USER MANUAL
Table 2.3 T&MT Connector Pin Definitions
PIN NAME DESCRIPTION DIRECTION
86, 36,
85, 34,
83, 33,
82, 31
DATA[7:0]
Refer to Schematic for
Connector Pin Assignment
ULPI Data Bus IN/OUT
96 STP ULPI STP Signal INPUT TO
EVB
70 DIR ULPI DIR Signal OUTPUT
FROM EVB
71 NXT ULPI NXT Signal OUTPUT
FROM EVB
90 CLKOUT ULPI Clock Signal OUTPUT
FROM EVB
55 VBUS_FAULT_N Driven low by the VBUS switch (U2) in the event of a
switch fault condition.
OUTPUT
15 SPKR_L In USB Audio mode, SPKR_L is connected to the DP
pin via an analog switch in the USB3320.
IN/OUT
45 SPKR_RM In USB Audio mode, SPKR_RM is connected to the
DP pin via an analog switch in the USB3320.
IN/OUT
17 RESET Asserting RESET will place the USB3320 in a low
power state. Upon exiting this state (RESET=0), all
ULPI registers will contain power-on reset values.
INPUT
47 VBUS_IN This pin is not connected NO CONNECT
28 VBUS_OUT +5V from the T&MT connector INPUT TO
EVB
8,
16, 57,
69
VDD +3.3V from the T&MT connector INPUT TO
EVB
52 SYSTEM_CLOCK Optional clock input to EVB. EVB is built with the
USB3320 REFCLK provided by a crystal. See
Section 2.11 for more information on configuring the
EVB-USB3320 for ULPI Clock Input mode.
NO CONNECT
(input to EVB if
R3 is installed)
100 PSU_SHD_N This pin is driven low indicating that +3.3V must be
sourced from the link through the T&MT connector
pins 8, 16, 57, 69 and +5.0V must be sourced from the
link through the T&MT connector pin 28.
OUTPUT
FROM EVB
49 DC_PSNT_N This pin is driven low indicating a daughter card is
present.
OUTPUT
FROM EVB
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USER MANUAL
3 Getting Started
The block diagram in Figure 3.1 gives a simplified view of the EVB-USB3320 EVB. The EVB-USB3320
is ready for device operation. To modify the board for OTG or Host applications, refer to Section 2.9
or Section 2.10, respectively.
It is required to provide +5V to T&MT connector pin 28 and +3.3V on T&MT pins 8,16,57,69 to power
the EVB-USB3320.
The EVB-USB3320 is built with a USB Mini-AB receptacle. Do not substitute a Mini-AB receptacle
different from the one specified in the bill of materials, or a short circuit may occur on the USB signals
at the Micro-AB connector PCB footprint.
When the EVB-USB3320 is powered on, check the following things to be certain the board is
functioning normally:
RESET should be de-asserted (logic low at the T&MT connector and RESETB at the USB3320
should be logic high = VDD18). If RESETB=0, the USB3320 will be in a low power state.
The voltage at R2 (RBIAS) should be 0.8V DC. If this voltage is not present, the USB3320 is in a
low power state.
There should be a digital 60 MHz square wave signal at T&MT connector pin 90. The amplitude
should be approximately VDDIO. This is the CLKOUT signal of the USB3320.
Figure 3.1 Block Diagram of EVB-USB3320
VBUS
Switch
ULPI Signals
VBUS
ID
DP
DM
J1
100-pin
T&MT
2.2uF
150uF
ONA
FAULTAn
VDD3.3
+5V
DP
DM
ID
ULPI Bus
GND
Install C20=150uF if host
operation is desired
RESETB
VDD1p8
VDD3p3
VBAT
2.2uF
1.8V
LDO
XI
EXT_VBUS_DET
USB3320
RESET
PCB can accept Micro-AB
Or Mini-AB receptacle
CPEN
XO
VDDIO
VARIABLE
VDDIO
REG
REFSEL[2:0]
USER
REFCLK
CONFIG
EVB-USB3320 USB Transceiver Evaluation Board User Manual
SMSC EVB-USB3320 7 Revision 1.0 (02-09-10)
USER MANUAL
The voltage at C3 should be approximately 3.3V. This is the USB3320 internal 3.3V voltage
regulator output.
The voltage at C7 should be 1.8V. This is the 1.8V regulator output.
4 Protecting VBUS from Non-Compliant VBUS Voltages
The USB3320 is fully tolerant to VBUS voltages up to 30V. An external resistor on the VBUS line
(R
VBUS
) is required for the integrated overvoltage protection circuit in the USB3320. R
VBUS
is either
R10 or R23 on the EVB-USB3320. For peripheral and host applications, R
VBUS
is 10K (install R23,
remove R10). For OTG applications, R
VBUS
is 1K (install R10, remove R23).
EVB-USB3320 USB Transceiver Evaluation Board User Manual
Revision 1.0 (02-09-10) 8 SMSC EVB-USB3320
USER MANUAL
5 EVB-USB3320 Schematic
Figure 5.1 EVB-USB3320 Schematic
5
5
4
4
3
3
2
2
D
C
B
A
UL
T&MT Connector
For host applications 150 uF to to ground is required on
VBUS to comply with the USB2.0 specification.
1.8V Regulator
DNP
Selectable Frequency 32-pin QFN Evaluation Board
This portion of the schematic
shows components needed for
PHY to operate in a HS peripheral
application.
Host / OTG
Peripheral
R13
Zero Ohm
DNP
DNP
DNP
DNP
For host/OTG applications, R10 1K resistor should be in
For peripheral applications, R23 10K resistor should be
DNP
DNP
DNPDNP
DNP
Schematic shows 26.0 MHz Configuration.
REFCLK[2:0] = 110
R12 = 78.7K VDDIO = 1.8 V
R12 = 107K VDDIO = 2.0 V
R12 = 178K VDDIO = 2.5 V
R12 = 243K VDDIO = 3.0 V
R12 = 287K VDDIO = 3.3 V
VDDIO Regulator
VBUS Switch
DNP
DNP
Transceiver
ZERO
DNP
USB83340
R24
USB3320 2.2uF
1.0uF
C3
0.1uF
1.0uF
C19
DNP
Oscillator Support
DATA1
DATA0
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7
NXT
DIR
RESETB
CPEN
VBUS_FAULT_N
CLKOUT
RESETB
DIR
NXT
STP
DATA1
DATA0
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7
VBUS_FAULT
CPEN
RESET
VBUS
ID
CLKOUT
SPKR_L
DP
DM
STP
SPKR_RM
CPEN
RESETB
REFCLK
REFSEL1
REFSEL2
REFSEL0
REFSEL1
REFSEL0
REFSEL2
+5.0V
USBGND
REFCLK
VBUS_FAULT_N
XO
VDD1p8
+3.3V
+3.3V
+3.3V
+3.3V
+5.0V
+5.0V
+5.0V
VDD1p8
VDD1p8
VDDIO
VDDIO
VDDIO VDDIO
VDDIO
VDDIO
VDDIO
Title
Size Document Numbe
Date:
SCH-7163AZ-A00
PCB7163 Evaluati
C
Tuesday, Febru
Title
Size Document Numbe
Date:
SCH-7163AZ-A00
PCB7163 Evaluati
C
Tuesday, Febru
Title
Size Document Numbe
Date:
SCH-7163AZ-A00
PCB7163 Evaluati
C
Tuesday, Febru
C10
0.1uF
10V
C10
0.1uF
10V
GND
GND
Y1
26 MHz
GND
GND
Y1
26 MHz
1
2 3
4
C22
22pF 50V
C22
22pF 50V
C18
10uF
6.3VC18
10uF
6.3V
C7
10uF
6.3V
C7
10uF
6.3V
+
C20
150uF
10V
+
C20
150uF
10V
C5
1.0uF
10V
C5
1.0uF
10V
R14
10.0K
1/16W
R14
10.0K
1/16W
R34
ZERO
1/4W
R34
ZERO
1/4W
R30
ZERO
R30
ZERO
R1
100K
1/10W
R1
100K
1/10W
R27
ZERO
R27
ZERO
R10
1.0K 1W
R10
1.0K 1W
R23
10K 1/10W
R23
10K 1/10W
C13
0.1uF
10V
C13
0.1uF
10V
TP5
TEST_POINT
TP5
TEST_POINT
C14
1.0uF
10V
C14
1.0uF
10V
R33
27 1/16 W
R33
27 1/16 W
R3
ZERO
R3
ZERO
U1
USB33XX QFN32
U1
USB33XX QFN32
CLKOUT
1
NXT
2
DATA0
3
DATA1
4
DATA2
5
DATA3
6
DATA4
7
REFSEL0
8
DATA5
9
DATA6
10
REFSEL1
11
NC
12
DATA7
13
REFSEL2
14
SPK_L
15
SPK_R
16
CPEN33
17
DP
18
DM
19
VDD33
20
VBAT
21
VBUS
22
ID
23
RBIAS
24
XO
25
REFCLK
26
RESETB
27
VDD18_1
28
STP
29
VDD18_2
30
DIR
31
VDDIO
32
FLAG
33
R7
27K
1/16W
R7
27K
1/16W
TP1
TEST_POINT
TP1
TEST_POINT
C16
0.1uF
10V
C16
0.1uF
10V
R18
78.7K
1/16W
R18
78.7K
1/16W
C12
10uF
6.3V
C12
10uF
6.3V
R6
10.0K
1/16W
R6
10.0K
1/16W
R16
10.0K
1/16W
R16
10.0K
1/16W
U10
TPS77001DBVT
U10
TPS77001DBVT
Vout
5
FB
4
/EN
3
GND
2
Vin
1
C2
0.1uF
10V
C2
0.1uF
10V
J1
AMP_UTMI+_ULPI
J1
AMP_UTMI+_ULPI
GND
2
GND
4
GPIO5
6
VDD
8
Reserved18
10
GPIO11
12
Reserved33
14
VDD
16
Reserved9
18
Reserved8
20
Reserved6
22
GND
24
GPIO1
26
VBUS_out
28
Reserved29
30
GND
32
DATA3
34
DATA1
36
VIO
38
Reserved34
40
Reserved24
42
Reserved26
44
GND
46
Reserved14
48
GPIO13
50
System_Clock
52
GND
54
GPIO6
56
GPIO8
58
Reserved1
60
GND
62
Reserved31
64
Reserved3
66
GND
68
DIR
70
Reserved4
72
Reserved5
74
GND
76
GPIO14
78
GND
80
DATA6
82
GND
84
DATA0
86
Reserved21
88
Clk
90
GND
92
Reserved27
94
STP
96
Reserved13
98
PSU_SHD_N
100
GPIO0
1
GPIO2
3
GPIO4
5
GPIO7
7
GND
9
GPIO9
11
GND
13
SPKR_L
15
Reset
17
Reserved7
19
GND
21
Reserved12
23
Reserved11
25
GND
27
GPIO3
29
DATA7
31
DATA5
33
GND
35
Reserved20
37
GND
39
Reserved22
41
GND
43
SPKR_MIC
45
VBUS_in
47
DC_PSNT_N
49
GND
51
GND
53
Reserved15
55
VDD
57
Reserved17
59
GPIO10
61
GPIO12
63
GND
65
Reserved10
67
VDD
69
NXT
71
GND
73
Reserved2
75
Reserved32
77
Reserved19
79
VIO
81
DATA4
83
DATA2
85
VIO
87
Reserved30
89
Reserved23
91
Reserved25
93
GND
95
Reserved16
97
Reserved28
99
R17
1M
1/10W
R17
1M
1/10W
R15
10.0K
1/16W
R15
10.0K
1/16W
U6
74LVC1G04
U6
74LVC1G04
2 4
53
1
C17
10uF
6.3VC17
10uF
6.3V
P1
Micro-AB
P1
Micro-AB
VBUS
1
D+
3
D-
2
ID
4
GND
5
SHIELD1
6
SHIELD2
7
SHIELD3
8
SHIELD4
9
R13
ZERO
R13
ZERO
X1
26.0 MHZ
X1
26.0 MHZ
VCC
4
OUT
3
EN
1
GND
2
R26
ZERO
R26
ZERO
C9
0.1uF
10V
C9
0.1uF
10V
C11
0.1uF
10V
C11
0.1uF
10V
R24
ZERO
R24
ZERO
R28
ZERO
R28
ZERO
R29
ZERO
R29
ZERO
C4
0.1uF
10V
C4
0.1uF
10V
R2
8.06K 1/16W
R2
8.06K 1/16W
C21
0.1uF
10V
C21
0.1uF
10V
U8
74LVC1G04
U8
74LVC1G04
2 4
53
1
+
C1
2.2uF
50V
+
C1
2.2uF
50V
R4
ZERO
R4
ZERO
R35
10.0 1/16W
R35
10.0 1/16W
U9
TPS76318DBVT
U9
TPS76318DBVT
IN
1
GND
2
ENBLE
3
NC
4
VOUT
5
R12
ZERO
R12
ZERO
R5
10.0K
1/16W
R5
10.0K
1/16W
C23
22pF 50V
C23
22pF 50V
U2
MAX1823B
U2
MAX1823B
ONA
1
INA
2
IN
3
INB
4
ONB
5
FAULTB
6
OUTB
7
GND
8
OUTA
9
FAULTA
10
C3
2.2uF
6.3V
C3
2.2uF
6.3V
TP4
TEST_POINT
TP4
TEST_POINT
C8
0.1uF
10V
C8
0.1uF
10V
R25
ZERO
R25
ZERO
R32
ZERO 1/4W
R32
ZERO 1/4W
R11
10.0K
1/16W
R11
10.0K
1/16W
R9
169K
1/16W
R9
169K
1/16W
R8
10.0K
1/16W
R8
10.0K
1/16W
EVB-USB3320 USB Transceiver Evaluation Board User Manual
SMSC EVB-USB3320 9 Revision 1.0 (02-09-10)
USER MANUAL
6 EVB-USB3320 Bill of Materials
Figure 6.1 EVB-USB3320 Bill of Materials
Ite
m
Number
Re
f
Des
QTY Value Tolerance Description Manufacturer Manufacturer Part Number Digikey Part Number
10 C1 1 2.2µF, 50V ±10% CAP CER 2.2UF 50V X7R 1206 Murata Electronics North America GRM31CR71H225KA88L 490-3367-1-ND
20 C17, C18 2 10.0µF,10V ±10% CAP CER 10UF 10V X5R 0805 Murata Electronics North America GRM21BR61A106KE19L 490-1709-1-ND
30
C2, C4, C8, C9, C10,
C11, C13, C16, C21
9 0.1µF, 10V 20% CAP CER .1UF 10V X5R 0402 Kemet C0402C104K8PACTU 399-3027-1-ND
40 C20 DNP 150.0µF,16V ±20% CAP 150UF 16V ELECT FK SMD PANASONIC EEV-FK1C151XP PCE3512CT-ND
50 C3 1 2.2µF, 6.3V 20% CAP CER 2.2UF 6.3V X5R 0402 Murata Electronics North America GRM155R60J225ME15D 490-4519-1-ND
60 C5, C14 2 1.0µF, 10V ±10% CAP CER 1UF 10V X5R 0402 Murata Electronics North America GRM155R61A105KE15D 490-3890-1-ND
70 C7, C12 2 10.0µF, 10V -20%/+80% CAP 10UF 10V CERAMIC F 0805 KEMAT ECJ-2FF1A106Z PCC2233CT-ND
80 C22, C23 2 22pF, 50V ±5% CAP 22PF 50V CERAMIC 0402 SMD Panasonic - ECG ECJ-0EC1H220J PCC220CQCT-ND
90 J1 1 RCPT ASSY,R/A,CHAMP 050,100 P TYCO ELECTRONICS/AMP 1-1734037-0 A33470-ND
100 J2 DNP Retention Kit for P6960/P6980 Logic analyzer Probe Tektronix 020-2539-00
110 P1 DNP CONN RCPT MICRO USB AB SMD R/A Hirose Electric Co Ltd ZX62-AB-5P H11495CT-ND
120 P2 1
USB-OTG, Mini AB Receptacle, Surface Mount Right
Angle
Molex/Waldom Electronics Corp 56579-0576 WM17122CT-ND
130 R1 1 100K ±5% RES 100K OHM 1/16W 5% 0402 SMD Vishay/Dale CRCW0402100KJNED 541-100KJCT-ND
140 R10 DNP 1K 1% RES 1K OHM 1W 2512 SMD PANASONIC ERJ-1TYF102U PT1KAECT-ND
150 R18 1 78.7K 1% RES 78.7K OHM 1/16W 1% 0402 SMD PANASONIC ERJ-2RKF7872X P78.7KLCT-ND
160 R17 1 1M 5% RES 1M OHM 1/10W 5% 0402 SMD Vishay/Dale CRCW04021M00JNED 541-1.0MJCT-ND
170 R2 1 8.06K ±1% RES 8.06K OHM 1/16W 1% 0402 SMD Vishay/Dale CRCW04028K06FKED 541-8.06KLCT-ND
180 R23 1 10K 1% RES 10.0K OHM 1/10W 0603 SMD YAGEO RC0603FR-0710KL 311-10.0KHRCT-ND
190 R32, R34 2 ZERO ±5% RES ZERO OHM 1/4W 5% 0402 SMD Vishay/Dale CRCW12060000Z0EA 541-0.0ECT-ND
200 R24, R25, R27, R30 4 ZERO ±5% RES ZERO OHM 1/16W 5% 0402 SMD PANASONIC ERJ-2GE0R00X P0.0JCT-ND
210
R3, R4, R12, R13, R26,
R28
,
R29
DNP ZERO ±5% RES ZERO OHM 1/16W 5% 0402 SMD PANASONIC ERJ-2GE0R00X P0.0JCT-ND
220 R33 1 27 1% RES 27 OHM 1/16W 1% 0402 SMD Vishay/Dale CRCW040227R0FKED 541-27.0LCT-ND
230
R5, R8, R11, R14, R15,
R16
8 10K ±5% RES 10K OHM 1/16W 5% 0402 SMD PANASONIC ERJ-2GEJ103X P10KJCT-ND
240 R6 DNP 10K ±5% RES 10K OHM 1/16W 5% 0402 SMD PANASONIC ERJ-2GEJ103X P10KJCT-ND
250 R7 1 27K 1% RES 27K OHM 1/16W 1% 0402 SMD PANASONIC ERJ-S02F2702X ERJ-S02F2702X-ND
260 R9 1 169K 1% RES 169K OHM 1/16W 1% 0402 SMD PANASONIC ERJ-2RKF1693X P169KLCT-ND
270 R35 1 10 1% RES 27 OHM 1/16W 1% 0402 SMD Vishay/Dale CRCW040210R0FKED 541-10.0LCT-ND
280
TP1, TP2, TP3, TP4,
TP5
5 PC TEST POINT MINIATURE SMT Keystone Electronics 5015 5015KCT-ND
290 U1 1 USB PHY with ULPI Interface SMSC USB3320C-EZK
300 U10 1 IC ADJ 50MA LDO REG SOT-23-5 TEXAS INSTRUMENTS TPS77001DBVT 296-2762-1-ND
310 U2 1 IC SW USB DUAL W/FB 10-UMAX Maxim Integrated Products MAX1823BEUB+ MAX1823BEUB+-ND
320 U6, U8 2 IC SINGLE INVERTER-GATE SOT-23-5 TEXAS INSTRUMENTS SN74LVC1G04DBVR 296-11599-1-ND
330 U9 1 IC REG LDO 1.8V 150MA SOT-23-5 TEXAS INSTRUMENTS TPS76318DBVT 296-2700-1-ND
340 X1 DNP Note 1 OSCILLATOR PROG 3.3V +-50PPM SMD, 26.0MHz ABRACON CORPORATION AP3S-BLANKS AP3S3EC-ND
350 Y1 1 Note 2 +/-30ppm CRYSTAL 26.000 MHZ 20PF SMD CTS-Frequency Controls 403C35E26M00000 CTX733CT-ND
Note 1
Oscillator frequency depends on frequency selected by U1 pins REFSEL[2:0]. Frequency must be specified at time of order.
Note 2
Crystals may not available in all frequencies supported by U1.
EVB-USB3320 USB Transceiver Evaluation Board User Manual
Revision 1.0 (02-09-10) 10 SMSC EVB-USB3320
USER MANUAL
7 Revision History
Table 7.1 Customer Revision History
REVISION LEVEL & DATE SECTION/FIGURE/ENTRY CORRECTION
Rev. 1.0
(02-09-10)
Replaced all references of “CRB” with “EVB”
throughout document.
Rev. 1.0
(05-01-09)
Initial Release
/
