NXP i.MX 8M User guide

Brand: NXP

Model: i.MX 8M

Type: User guide

i.MX 8M Nano to i.MX 8M Nano UltraLite

Design Compatibility User's Guide

Hardware Product Design Focus

NXP Semiconductors Document identifier: IMX8MNULDCUG

User Guide Rev. 0, 13 July 2021

Contents

Chapter 1 Introduction........................................................................................... 3

Chapter 2 Feature comparison.............................................................................. 4

Chapter 3 Key considerations for hardware design............................................... 6

3.1 MIPI DSI interface..................................................................................................................... 6

3.2 Power supplies.......................................................................................................................... 6

3.3 PMIC..........................................................................................................................................9

3.4 DDR Interface..........................................................................................................................10

Chapter 4 Package and ball map.........................................................................11

Chapter 5 References..........................................................................................12

Chapter 6 Revision history...................................................................................13

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Chapter 1

Introduction

The i.MX 8M Nano UltraLite processor was designed to be a subset of the i.MX 8M Nano and the two parts share the same product

data sheet. This guide provides an overview of how to design a product using the i.MX 8M Nano when the final product utilizes

the i.MX 8M Nano UltraLite.

This guide focuses on the hardware features and requirements to ensure a smooth transition between the two

application processors.

This can also be expanded to product families that extend new customer features by upgrading from the i.MX 8M Nano UltraLite

SoC to the i.MX 8M Nano SoC.

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Chapter 2

Feature comparison

Table 1 provides a quick feature comparison of the i.MX 8M Nano and i.MX 8M Nano UltraLite. This is intended as a quick

introduction to the devices. For description, see

i.MX 8M Nano Applications Processor Datasheet for Consumer Products

(document IMX8MNCEC).

Table 1. Quick feature comparison

Feature i.MX 8M Nano i.MX 8M Nano UltraLite

Main CPU 4x A53 @ 1.5 GHz 4x A53 @ 1.4 GHz

Microcontroller M7 M7

DDR 16x / 8x

LPDDR4-3200

DDR4-2400

DDR3L-1600

16x / 8x

LPDDR4-3200

DDR4-2400

DDR3L-1600

Memory 8-bit NAND Interface

(3x) eMMC 5.1

(3x) SPI NOR

FlexSPI with XIP

8-bit NAND Interface

(3x) eMMC 5.1

(3x) SPI NOR

FlexSPI with XIP

GPU GC7000UL None

VPU None None

Display LCDIF Display Controller

4 Lane MIPI DSI

None

Camera 4 Lane MIPI CSI 4 Lane MIPI CSI

Synchronous Audio Interface (SAI)

modules

5x SAI Modules

---

(SAI2) 2 TX and 2 RX

(SAI3) 2 TX and 2 RX

(SAI5) 4 TX and 4 RX

(SAI6) 1 TX and 1 RX

(SAI7) 1 TX and 1 RX

5x SAI Modules

---

(SAI2) 2 TX and 2 RX

(SAI3) 2 TX and 2 RX

(SAI5) 4 TX and 4 RX

(SAI6) 1 TX and 1 RX

(SAI7) 1 TX and 1 RX

Audio (additional) S/PDIF

8-Channel Pulse Density Modulation

(PDM) input

ASRC

768 kHz sampling

S/PDIF

8-Channel Pulse Density Modulation

(PDM) input

ASRC

768 kHz sampling

Table continues on the next page...

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Table 1. Quick feature comparison (continued)

Feature i.MX 8M Nano i.MX 8M Nano UltraLite

Connectivity ---

(1x) USB 2.0

(3x) uSDHC

(1x) Gigabit Ethernet

(4x) UART

(4x) I2C

(3x) ECSPI

---

(1x) USB 2.0

(3x) uSDHC

(1x) Gigabit Ethernet

(4x) UART

(4x) I2C

(3x) ECSPI

Package 14 x 14 mm

486-pin BGA, 0.5 mm pitch

11 x 11 mm

306-pin BGA, 0.5 mm pitch

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Feature comparison

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Chapter 3

Key considerations for hardware design

The quick feature comparison as in Table 1 provides a quick insight into the functional blocks that changed between the two

devices. These sections focus on key considerations between the i.MX 8M Nano and i.MX 8M Nano UltraLite that affects the

hardware design:

• MIPI DSI Interface

• Power supplies

• Pinout

These sections also provide an in-depth discussion of how to manage the hardware differences between the i.MX 8M Nano and

i.MX 8M Nano UltraLite devices.

3.1 MIPI DSI interface

i.MX 8M Nano supports a 4-lanes MIPI-DSI interface. The MIPI-DSI interface has been de-featured from i.MX 8M Nano UltraLite,

and there is no related pin for the MIPI-DSI interface. Meanwhile, the VPU module was removed from i.MX8M Nano Ultralite.

Customer use-cases that require display and video support should instead use i.MX 8M Nano or other i.MX 8M family devices

such as the i.MX 8M Plus. i.MX8M Nano UltraLite is better suited for use-cases that do not require displays.

3.2 Power supplies

The power domains for each IOs are the same between i.MX 8M Nano and i.MX 8M Nano UltraLite.

Several power rails in i.MX 8M Nano were combined in the i.MX 8M Nano UltraLite.

The i.MX 8M Nano Ultra Lite has a few different power supply requirements from the i.MX 8M Nano. These changes are from

two factors:

• Removal of modules

• Combination of power rails

Even with the power supply changes, the two devices are both design and functionally compatible.

3.2.1 Power rails combination

Table 2 provides the power pins changes between the i.MX 8M Nano and i.MX 8M Nano UltraLite.

Table 2. Power rails combination

Module Name i.MX 8M Nano Power Rails i.MX 8M Nano UltraLite Power Rails

Cortex® A53 VDD_ARM VDD_SOC

Cortex M7 VDD_SOC

DRAM VDD_DRAM

DRAM PLL VDD_DRAM_PLL_0P8

Analog PLL VDD_ANA_0P8

Arm® PLL VDD_ARM_PLL_0P8

MIPI PHY 0.8 V VDD_MIPI_0P8

USB PHY 0.8 V VDD_USB_0P8

Table continues on the next page...

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Table 2. Power rails combination (continued)

Module Name i.MX 8M Nano Power Rails i.MX 8M Nano UltraLite Power Rails

GPU VDD_GPU N/A

SNVS core Logic VDD_SNVS_0P8 VDD_SNVS_0P8

GPIO pre-driver for SNVS NVCC_SNVS_1P8 NVCC_SNVS_1P8

DRAM IO NVCC_DRAM NVCC_DRAM

Analog 1.8 V DRAM power VDD_DRAM_PLL_1P8 VDD_DRAM_PLL_1P8

MIPI PHY 1.2 V VDD_MIPI_1P2 VDD_MIPI_1P2

USB PHY 3.3 V VDD_USB_3P3 VDD_USB_3P3

Power supply for I2CNVCC_I2C NVCC_I2C_UART

Power supply for UART NVCC_UART

Power supply for SAI3 NVCC_SAI3 NVCC_SAI3_SAI5

Power supply for SAI5 NVCC_SAI5

Power supply for SD1 NVCC_SD1 NVCC_SD1_NAND

Power supply for NAND NVCC_NAND

Power supply for ENET NVCC_ENET NVCC_ENET_GPIO_SAI2

Power supply for GPIO NVCC_GPIO1

Power supply for SAI2 NVCC_SAI2

Power supply for CLK NVCC_CLK NVCC_CLK_JTAG_PVCC_1P8

Power supply for JTAG NVCC_JTAG

Power supply for GPIO Pre-Driver PVCC0_1P8

PVCC1_1P8

PVCC2_1P8

Power supply for SD2 NVCC_SD2 NVCC_SD2

Power supply for ECSPI NVCC_ECSPI NVCC_ECSPI

XTAL 1.8 V Power VDD_24M_XTAL_1P8 VDD_ANA1_XTAL_MIPI_USB_1P8

Analog-1 1.8 V power VDD_ANA1_1P8

MIPI PHY 1.8 V VDD_MIPI_1P8

USB PHY 1.8 V VDD_USB_1P8

Analog-0 1.8 V power VDD_ANA0_1P8 VDD_ANA0_ARM_PLL_1P8

Arm PLL 1.8 V Power VDD_ARM_PLL_1P8

i.MX8M Nano Arm core frequency can be maximum 1.5 GHz for Commercial part and 1.4 GHz for Industrial part.

NOTE

i.MX8M Nano UltraLite Arm core frequency can be a maximum 1.4 GHz for both Commercial and Industrial Parts.

NOTE

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3.2.2 Estimated power supply maximum current

Power consumption is highly dependent on the application.

The estimated power supply maximum current is changed because of module removal and power rails combination. See Table

3 and Table 4 for the maximum supply currents for i.MX8M Nano and i.MX8M Nano UltraLite respectively.

Table 3. Maximum supply currents for i.MX 8M Nano

Power rail Max current Unit

VDD_ARM 2200 mA

VDD_SOC 1000 mA

VDD_GPU 800 mA

VDD_DRAM 800 mA

VDD_ANA_0P8 50 mA

VDD_ANA0_1P8

VDD_ANA1_1P8

250 mA

NVCC_SNVS_1P8 3 mA

NVCC_<XXX> Imax = N x C x V x (0.5 x F) Where:

N - Number of IO pins supplied by the power line C—Equivalent external

capacitive load

V - IO voltage

(0.5 x F) - Data change rate. Up to 0.5 of the clock rate (F).

In this equation, Imax is in Amps, C in Farads, V in Volts, and F in Hertz.

NVCC_DRAM

DRAM_VFEF 10 mA

Electrical characteristics:

Table 4. Maximum supply currents for i.MX 8M Nano UltraLite

Power rail Max current Unit

VDD_SOC 3000 mA

NVCC_SNVS_1P8 3 mA

VDD_ANA1_XTAL_MIPI_USB_1P8, VDD_ANA0_ARM_PLL_1P8, and

VDD_DRAM_PLL_1P8

250 mA

VDD_MIPI_1P2 100 mA

NVCC_<XXX> Imax = N x C x V x (0.5 x F) Where:

N - Number of IO pins supplied by the power line

C - Equivalent external capacitive load

V - IO voltage

(0.5 x F)—Data change rate. Up to 0.5 of the clock

rate (F).

NVCC_DRAM

Table continues on the next page...

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Table 4. Maximum supply currents for i.MX 8M Nano UltraLite (continued)

Power rail Max current Unit

In this equation, Imax is in Amps, C in Farads, V in

Volts, and F in Hertz.

DRAM_VFEF 10 mA

3.2.3 Power sequence

The power sequence and power supplies states are minor changes on i.MX 8M Nano UltraLite because of the power rails

combination. For detail, see

i.MX 8M Nano Applications Processor Datasheet for Consumer Products

(document IMX8MNCEC).

3.3 PMIC

The NXP PMIC PCA9450B is used to support both i.MX 8M Nano and i.MX 8M Nano UltraLite. Table 5 provides the power rails

connections for each processor.

Table 5. Power rails connections

PMIC Regulators Voltage i.MX 8M Nano i.MX 8M Nano UltraLite

BUCK1 0.85/0.95V VDD_SOC

VDD_DRAM

VDD_GPU

VDD_DRAM_PLL_0P8

VDD_ARM_PLL_0P8

VDD_ANA_0P8

VDD_USB_0P8

VDD_MIPI_0P8

VDD_SOC

BUCK2 0.85/0.95V VDD_ARM No-Use

BUCK4 3.3 V VDD_3V3

NVCC_3V3

VDD_3V3

NVCC_3V3

BUCK5 1.8 V NVCC_1V8

PVCCx_1V8

NVCC_1V8

PVCCx_1V8

BUCK6 1.35 V for DDR3L

1.2 V for DDR4

1.1 V for LPDDR4

NVCC_DRAM NVCC_DRAM

BUCK3 N/A No-Use No-Use

LDO1 1.8 V NVCC_SNVS_1V8 NVCC_SNVS_1V8

LDO2 0.8 V VDD_SNVS_0V8 VDD_SNVS_0V8

LDO3 1.8 V VDD_xxx_1V8 VDD_xxx_1V8

Table continues on the next page...

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Table 5. Power rails connections (continued)

PMIC Regulators Voltage i.MX 8M Nano i.MX 8M Nano UltraLite

LDO4 1.2 V VDD_PHY_1V2 VDD_PHY_1V2

LDO5 3.3 V / 1.8 V NVCC_SD2 NVCC_SD2

LoadSW 3.3 V No-Use No-Use

i.MX8M Nano supports the Arm Cortex-A53 core running at 1.5 GHz when VDD_ARM is set at 1.0 V.

NOTE

i.MX8M Nano Ultralite limits the Arm Cortex-A53 running at 1.4 GHz.

NOTE

3.4 DDR Interface

i.MX 8M Nano and i.MX 8M Nano UltraLite can support 3 types of DDR memory interfaces: LPDDR4, DDR4, and DDR3L.

5 DRAM pins have been removed on i.MX 8M Nano UltraLite comparing with i.MX 8M Nano, see Table 6:

Table 6. Impact for i.MX 8M Nano UltraLite

Pins LPDDR4 DDR4 DDR3L Impact for i.MX 8M Nano UltraLite

DRAM_AC19 MTEST MTEST MTEST No Impact

DRAM_AC22 CS1_B - - No impact. It is for channel B. Even for the 14 x14 part,

the pin is not used.

DRAM_AC27 - PARITY - No impact

DRAM_AC37 - ODT1 ODT1 No impact

DRAM_AC38 - CS1_n CS1# No impact for using LPDDR4.

For DDR4 and DDR3L, the maximum memory size will be

reduced by half.

For the EVK design, the maximum supported 16-bit DDR

memory available in the market at the time of publication is

being used, so the pin is not used.

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Chapter 4

Package and ball map

• i.MX 8M Nano is 14 x 14 mm package, which 0.5 mm pitch with 486 pads.

• i.MX 8M Nano UltraLite is 11 x 11 mm package, which 0.5 mm pitch with 306 pads.

See the detailed package and ball map information in

i.MX 8M Nano Applications Processor Datasheet for Consumer Products

(document IMX8MNCEC).

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Chapter 5

References

The following reference documents are available on www.nxp.com:

•

i.MX 8M Nano Applications Processor Datasheet for Consumer Products

(document IMX8MNCEC)

•

i.MX 8M Nano Hardware Developer’s Guide

(document IMX8MNHDG)

• i.MX 8M Nano EVK schematics and layout files (8MNANOLPD4-EVK-DESIGNFILES.zip)

• i.MX 8M Nano UltraLite EVK schematics and layout files (8MNANOD3L-EVK-DESIGNFILES.zip)

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Chapter 6

Revision history

Table 7 summarizes the changes done to this document since the initial release.

Table 7. Revision history

Revision number Date Substantive changes

0 13 July 2021 Initial release

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Date of release: 13 July 2021

Document identifier: IMX8MNULDCUG

NXP i.MX 8M User guide

NXP i.MX 8M User guide

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