UM10438
UBA2015AP 120 V (AC) evaluation board
Rev. 2.1 — 9 March 2012 User manual
Document information
Info Content
Keywords UBA2015AP, evaluation board, dimming, boost
Abstract This document describes the performance, technical data and wiring of
the UBA2015AP 120 V (AC) evaluation board.
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User manual Rev. 2.1 — 9 March 2012 2 of 38
Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
NXP Semiconductors
UM10438
UBA2015AP 120 V (AC) evaluation board
Revision history
Rev Date Description
v.2.1 20120309 fourth issue
v.2 20111117 third issue
v.1.1 20110912 second issue
v.1 20110826 first issue
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UM10438
UBA2015AP 120 V (AC) evaluation board
1. Introduction
This evaluation board is intended to build applications with the UBA2016A, UBA2015A
and UBA2015 ballast controller family. This document describes the specification and use
of the board. This ballast design is intended to drive one 35W T5 lamp with the
UBA2015AP. However, several options are provided on the board to use it with the
UBA2016AP and UBA2015P.
WARNING
Lethal voltage and fire ignition hazard
The non-insulated high voltages that are present when operating this product, constitute a
risk of electric shock, personal injury, death and/or ignition of fire.
This product is intended for evaluation purposes only. It shall be operated in a designated test
area by personnel qualified according to local requirements and labor laws to work with
non-insulated mains voltages and high-voltage circuits. This product shall never be operated
unattended.
Fig 1. Photograph of the UBA2015AP evaluation board
aaa-000409
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UM10438
UBA2015AP 120 V (AC) evaluation board
2. Safety warning
This evaluation board is connected to a high AC voltage (up to 200 V). Avoid touching the
reference board during operation. An isolated housing is mandatory when used in
uncontrolled, non-laboratory environments. Galvanic isolation of the mains phase using a
fixed or variable transformer (Variac) is always recommended. The symbols shown in
Figure 2
indicate these devices.
3. Specification
a. Isolated b. Not isolated
Fig 2. Variac isolation symbols
019aab173
019aab174
Table 1. Specifications for the evaluation board
Parameter Description
Ballast type electronic
Starting method programmed start with preheat
Lamp terminals 4
Line voltage 100 V to 140 V
Line frequency 50 Hz or 60 Hz
Number of lamps 1
Dimming interface 1 V to 10 V
Transient protection IEC61547
Table 2. Supported lamps
Lamp type Description
T5 35W 35 W T5 high-efficiency fluorescent lamp
Table 3. Ballast performance
Lamp type Lamps P
o
(W)
Maximum
THD
Maximum
lamp current
crest factor
Power
factor
Nominal
lamp current
(A)
Minimum
lamp current
(mA)
T5 35W 1 35 10 % 1.7 >0.95 0.170 5
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UM10438
UBA2015AP 120 V (AC) evaluation board
Remark: The chassis (if any) must connect to the earth which is available on mounting
hole E1.
Remark: Before powering up the board, check if the three MOSFETs are correctly
mounted. During transport, the MOSFETs can become detached.
Fig 3. Wiring diagram
green/yellow
EVALUATION BOARD
X3
X7
X2
E1
LAMP T5 35W
aaa-000350
blue
violet (+)
grey (-)
brown
blue
red
red
blue
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UM10438
UBA2015AP 120 V (AC) evaluation board
4. Performance data
4.1 Power factor, THD and input power
4.2 Dimming curve
(1) PF.
(2) Current THD.
(3) input power.
Fig 4. Power factor, THD and input power as function of the mains input voltage
aaa-000351
RMS mains voltage (V)
90 130 170 210 250 290
1.2
1.0
0.8
0.6
0.4
0.2
PF,
THD
44.4
P
IN
(W)
0 42.0
42.4
42.8
43.2
43.6
44.0
(1)
(2)
(3)
(1) Measured with an AC coupled current probe
Fig 5. Normalized lamp discharge current as function of the DIM input voltage
40
60
20
80
100
0
dim input voltage (V)
0108462
aaa-000352
normalized lamp
discharge current (A)
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UM10438
UBA2015AP 120 V (AC) evaluation board
4.3 Sum of Squares (SoS) curve
(1) SoS (maximum).
(2) SoS target.
(3) SoS measured.
(4) SoS (minimum).
a. SoS results
(1) I
LH
(maximum).
(2) I
L1
measured.
(3) I
LL
(maximum).
(4) I
L2
measured.
b. Maximum lead current check
Fig 6. Sum of Squares and maximum lead current check
0.02
0.04
0
0.06
0.08
SoS
(A
2
)
-0.02
lamp discharge current (A)
0 0.200.150.05 0.10
aaa-000353
(1)
(2)
(3)
(4)
0.10
0.20
0.30
current
(A)
0
lamp discharge current (A)
0 0.200.150.05 0.10
aaa-000354
(4)
(2)
(3)
(1)
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UM10438
UBA2015AP 120 V (AC) evaluation board
4.4 ElectroMagnetic Interference (EMI) emission tests
a. 115 V (AC) L
b. 115 V (AC) N
Fig 7. EMI – conducted emission test results
aaa-000355
aaa-000356
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UM10438
UBA2015AP 120 V (AC) evaluation board
5. Board Information
The input section includes the fuse; surge protection against fast AC transients; EMI filter;
double side rectifier and pre-conditioner or power factor correct (PFC). The output of the
PFC connects to a buffer electrolytic capacitor to supply the half-bridge circuit. The lamp
connects to the half-bridge circuit. The UBA2015AP controller IC controls the PFC and the
half-bridge circuit. A low-voltage control input is present to control the dimming of the lamp
light output.
The PFC is implemented as an up-converter in boundary conduction mode. The resonant
circuit is voltage fed by the half-bridge which consists of two NMOST transistors. The
resonant circuit includes a transformer for electrode preheating and heating.
The type of ballast presented here is used for most ballast for lamp powers above 25 W. It
has proven to be a cost effective application.
Remark: Some of the components are overrated for this evaluation board. When
designing a final application, some component ratings can be lowered and some circuits
can be simplified or combined to reduce component count and costs.
5.1 Dimming without using an external voltage source
The ballast is dimmed with a voltage source of 1 V (DC) to 10 V (DC) connected to
connector X7.
It is also possible to dim with an external potentiometer of 470 k (for example, no
external voltage supply is available). The potentiometer must connect to pin 1 (black wire,
DIM) and pin 2 (red wire, DIM+) of connector X7.
5.2 Half-bridge operating principle
This topology supports dimming and preheat times below 1 s for T5 lamps. It uses an
additional transformer for preheating/heating the filaments.
Fig 8. Block diagram
aaa-000357
FUSE
EMI
FILTER
mains
voltage
input
1 V to 10 V
dim
input
SURGE
PROTECTION
AC
RECTIFIER
RESONANT
CIRCUIT
lamp
PFC
BUFFER
CAPACITOR
HALF
BRIDGE
DIM
UBA2015A
CONTROLLER
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User manual Rev. 2.1 — 9 March 2012 10 of 38
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UM10438
UBA2015AP 120 V (AC) evaluation board
When the lamp is off, two resonant frequencies can be distinguished. A main resonant
frequency f
res
and a second frequency f
sec
. Approaching f
res
will ignite the lamp:
(1)
Preheating the electrodes near f
sec
increases the preheat current without increasing the
filament current during normal operation. In dimmable applications, this aids compliance
with the lamp sum of squares requirement.
(2)
Rx is used to limit the voltage across Cx and LxA when the lamp is removed during
preheat or ignition.
Fig 9. Half-bridge topology
aaa-000358
C
res
3.3 nF
C
dc
150 nF
T5 35W
Rx
4.7 kΩ
Cx
33 nF
C
fil
C
fil
LxA
127 µH
LxC
4.1 µH
LxB
4.1 µH
420 V
Q
highside
Q
lowside
L
res
3.5 mH
330 nF
330 nF
f
res
1
2 L
res
C
res
-----------------------------------
f
res
46.8 kHz==
f
sec
1
2 LxA Cx
---------------------------------
f
sec
77.7 kHz==
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User manual Rev. 2.1 — 9 March 2012 11 of 38
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UM10438
UBA2015AP 120 V (AC) evaluation board
The UBA2015AP controller starts at 100 kHz and sweeps down until the preheat
frequency is reached. The resistor on pin PH/EN sets the preheat frequency. During
preheat, the LC tank voltage remains below 200 V to prevent early ignition and glow.
(1) I
fil
.
(2) LC tank voltage.
Fig 10. Half-bridge frequency response with lamp not ignited
aaa-000359
f (kHz)
40 1008060
0.4
0.6
0.2
0.8
1.0
current
(A)
0
0.8
1.2
0.4
1.6
2.0
voltage
(kV)
0
(2)
(1)
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UBA2015AP 120 V (AC) evaluation board
5.3 Schematic diagrams
Fig 11. Schematic diagram: Half-bridge circuit
J13-1
R33
R34
33 Ω
47 kΩ
J13-2
J13-3
BUS
RES
GHHB
SHHB
3
1
2
GDS=123
placed in header
Q2
2N60C
J14-1
R35
R36
33 Ω
R14
10 kΩ
R25
10 kΩ
10 kΩ
J14-2
J14-3
J17
J9
close
R12
1.33 Ω
R13
1 Ω
C7
3.3 nF
R26
6.19 Ω
R27
23.7 Ω
R32
20 Ω
C9
330 nF
R11
205 kΩ
R20
220 kΩ
D11
1N4937
D12
1N4937
D9
1N4937
R21
27 kΩ
C13
470 nF
C15
100 nF
R28
1 Ω
D7
1N4937
R19
1 kΩ
D8
1N4937
R10
5.1 kΩ
C11
100 pF
C10
33 nF
R15
10 MΩ
R18
1 Ω
J10
open
J15
close 1-2
close
GLHB
SLHB
IFB
BUS
3
3
1
3
2
213
213
2
1
GND
GND
1
2
GDS=123
placed in header
Q3
2N60C
J7
close
52
J5
T2
3.5 mH/1.4 A
750312352
close
R24
237 kΩ
R29
75 kΩ
R22
237 kΩ
R37
150 kΩ
C1
33 nF
R7
4.7 kΩ
VFB
C8
150 nF
J16
close 1-2
J12
close 1-2
J18
close
D13
1N4937
J8
close
1.9 V
CDC
EOL
GND
aaa-000360
IFB
TP6
R4
249 kΩ
R3
X11
X1-1
X13
X1-2
X15
X1-3
X17
X1-4
249 kΩ
R2
249 kΩ
R1
249 kΩ
C2
330 nF
T1A, 127 μH, 1.8 A
760800001
T1C
4.1 μH
T1B
4.1 μH
C4
330 nF
R5
11 kΩ
HVPROBE
GND
T5 35W
X2
1
1
2
3
4
4
2
3
TP7
J1
J2
J3
1
2
3
4
6
8
J4
close
close
RELAMP
close
close
TP10
TP12
TP15
R8
23.7 kΩ
R31
100 Ω
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UM10438
UBA2015AP 120 V (AC) evaluation board
Fig 12. Schematic diagram: PFC circuit
aaa-000361
X12
Chassis
X14
Mains_N
X16
Mains_L
F1
T1A
C5
C3
4
1
3
2
C14
220 nF
2.2 nF
R6
165 kΩ
D1
1N5062
D4
UF4006
R9
165 kΩ
L1
2 x 15 mH
2
11
5
9
T3
1.1 mH/2.7 A/Np:Ns = 57
750312407
V1
710 V
220 nF
D5
1N5062
C6
470 nF
GND
D6
1N5062
D2
1N5062
D3
1N5062
R39
4.7 Ω
R23
1 Ω
R44
3.48 kΩ
J19
close
J20
open
J21
open
R46
2.4 kΩ
U2
R45
2.5 kΩ
TLVH431
U1 TLVH431
1
3
2
GND
R43
47 kΩ
R30
10 Ω
R16
562 kΩ
R17
562 kΩ
R42
562 kΩ
R41
562 kΩ
R40
100 kΩ
R38
187 kΩ
C16
47 µF
350 V
C12
10 nF
C17
47 µF
350 V
J11
close
J6-1
J6-2
J6-3
D10
1N4937
X3
3
2
1
BRIDGE
V
DD
BUS
AUX
1V9
3
1
2
GDS = 123
placed in header
Q1
6N60C
GPFC
FBPFC
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UBA2015AP 120 V (AC) evaluation board
Fig 13. Schematic diagram: controller circuit
aaa-000362
CPT
J28
close
J30
open
J31
open
J32
close
J33
open
R69
41.2 kΩ
C40
10 nF
C39
22 nF
C38
47 nF
C37
100 nF
C41
47 nF
CF
BUS
PREHEAT
J23
close
J25
close
J24
open
J26
open
C35
10 pF
C34
22 pF
C42
100 nF
D24
BZX79-C3V3
C43
22 µF
16 V
R55
2.2 MΩ
R59
2.2 MΩ
R75
47 kΩ
R72
470 kΩ
D25
1N4937
C44
100 µF
50 V
C33
47 pF
C32
100 pF
C29
100 pF
GND
GND GND
GND
DIM
BOOST
R67
R71
47 kΩ
D23
J27
open
J36
close 1-2
123
1N4937
10 kΩ
R68
1 kΩ
R70
33 kΩ
SW1
disable
1
34
4
2
12
3
2
R74
500 kΩ
R73
53.6 kΩ
J35
close 1-2
321
U3
J29
open
C26
100 nF
D16
1N4744A
C23
470 nF
Q7
BC557B
Q6
BC557B
D19
1N5224B
UBA2015AP
PH/EN
DIM
BOOST
12
J34
close 1-2
3
PREHEAT
CPT
CF
DIM
CPT
CF
CIFB
CIFB
IREF
VFB
EOL
R60
33 kΩ
R61
33 kΩ
C24
10 nF
C25
470 nF
GND
IFB
SLHB
VFB
EOL
IFB
SLHB
FBPFC
FBPFC
11
12
13
14
15
16
17
18
19
20
10
9
8
7
6
5
4
3
2
1
COMPPFC
COMPPFC
AUXPFC
GPFC
GPFC
GND
V
DD
V
DD
GLHB
GLHB
SHHB
FSHB
GHHB
GHHB
AUXPFC
IREF
FSHB
C21
100 nF
C22
1 nF
500 V
SHHB
C28
68 nF
R51
10 MΩ
C27
100 nF
R62
1 kΩ
R64
390 kΩ
AUX
R58
D18
1N4937
100 Ω
C36
22 nF
D14
1N4744A
GND
GND
R65
Reserved
R66
100 Ω
D22
1N4937
R47
750 kΩ
RELAMP
switch off when lamp is removed
switch on when lamp is inserted
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UM10438
UBA2015AP 120 V (AC) evaluation board
Fig 14. Schematic diagram: dim input circuit
X12
DIM+
X19
DIM-
X7
2
1
GND
TP32
SHHB
DIM
D15
BZX79-C3V3
R52
5.6 kΩ
J22
close 1-2
123
Q4
2N3819
Q5
BC547C
R54
1 MΩ
R56
4.99 kΩ
R49
4.99 kΩ
C18
22 pF
500 V
C19
100 nF
R50
1 kΩ
R57
1 kΩ
D17
1N4937
D20
1N4937
D21
BZX79-C12
RT1
150 Ω
T4, 2 x 10 mH
750311081
Q8
BC547C
R53
261 kΩ
C20
10 nF
C30
100 nF
C31
100 nF
R63
4.7 kΩ
6
4
1
2
R48
3.3 kΩ
aaa-000363
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xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx
xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx
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UM10438
UBA2015AP 120 V (AC) evaluation board
Fig 15. Schematic diagram: test points
TP37
SLHB
TP39
IFB
TP44
EOL
TP46
VFB
TP51
IREF
SHHB
TP20
TP24
TP29
TP33
TP28
TP21
TP25
TP30
TP34
TP36
TP56
CIFB
TP58
CF
TP64
CPT
TP69
DIM
TP10_1
PREHEAT
TP10_2
BOOST
TP38
GHHB
TP40
FSHB
TP45
SHHB
TP47
GLHB
TP52
V
DD
TP59
GPFC
TP65
AUXPFC
TP68
COMPPFC
TP70
FBPFC
TP3 TP86
TP9
BUS
TP1
BRIDGE
TP8
Chassis
TP14
Mains_L
TP11
Mains_N
TP13
CDC
TP23
RELAMP
TP16
RES
TP63
DIM+
TP67
DIM-
GND
TP41
TP48
TP53
TP60
TP42
TP49
TP54
TP61
TP66
GND
GND GND GND
TP71
TP74
TP77
TP80
TP72
TP75
TP78
TP81
TP22
TP26
TP31
TP35
TP43
TP50
TP55
TP62
TP73
TP76
TP79
TP82
TP87
GND
EXPERIMENTING
AREA
EXPERIMENTING
AREA
EXPERIMENTING
AREA
X5
2
3
1
4
X6
2
3
1
4
X8
2
3
1
4
TEST CONNECTIONS FOR PROBES
GROUND CONNECTIONS FOR PROBES
MOUNTING HOLES
TP85 TP84 TP83 TP89 TP88 TP19 TP4 TP18 TP2 TP5 TP27 TP17
Chassis
E1
spacer
M3X10-VZK
TP57
X1
jumper link
jumper link
X9
GND GND
X4
jumper link
jumper link
X10
E2
spacer
M3X10-VZK
E3
spacer
M3X10-VZK
E5
spacer
M3X10-VZK
E4
spacer
M3X10-VZK
aaa-000364
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User manual Rev. 2.1 — 9 March 2012 17 of 38
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UBA2015AP 120 V (AC) evaluation board
5.4 Functional description
The mains voltage is applied to the board and current flows through R6 and R9 to the
supply of the controller (VDD pin). When the current through R6 and R9 is higher than
240 A (I
stb(VDD)
), the controller the VDD voltage rises. When the VDD voltage is above
4.2 V (V
rst(VDD)
), the half-bridge circuit low-side MOSFET switches on and the floating
supply capacitor C1 is pre-charged.
The controller starts oscillating when the VDD voltage is above the 12.4 V (V
startup(VDD)
).
The PFC gate driver starts and the HB gate drivers start oscillating at 100 kHz (f
sw(high)
).
The dV/dt supply with capacitor C22 takes over the VDD supply to supply the IC with
enough energy for the gate drivers. The preheat timer starts and the controller sweeps the
frequency down from 100 kHz to the preheat frequency set by the PH/EN pin. The
oscillator remains at the preheat frequency until the preheat timer has ended.
When the preheat ends, the controller sweeps down to the half-bridge switching
frequency. The lamp ignites when the LC tank voltage reaches the lamp ignition voltage.
The ignition frequency is typically 50 kHz. The lamp current increases and the LC tank
voltage decreases. The controller senses the lamp current and LC tank voltage. When the
lamp current is high enough and the LC tank voltage is low enough for 3 ms
(V
IFB
>V
th(lod)IFB
and V
VFB
<V
th(lod)VFB
for t
d(lod)
), the controller assumes that the lamp is
on. The controller enters burn state.
In burn state, all the protection features are activated. The controller closes the lamp
current control loop and the oscillator regulates the half-bridge switching frequency. The
half-bridge frequency is regulated and reaches its set point when the average absolute
IFB pin voltage equals the DIM pin voltage.
5.4.1 Start-up current, relamp and antistriation
The VDD supply of the IC is charged with a start-up current derived from the rectified
mains voltage. Resistor R2 provides the current path and determines the start-up voltage
level.
When the lamp is removed while the IC is set to deep dimming, a protection is triggered
and the controller is shut down. In this board, transistor Q7 pulls down the VDD voltage.
The signal RELAMP indicates the filament of the lamp and controls transistor Q7. The
pull-down by Q7 is released when the lamp is inserted.
UBA2015P and UBA2015AP can also be disabled by pulling down the voltage on the
PH/EN pin.
The RELAMP signal is generated with a DC current injection on the DC blocking capacitor
C8. This DC current also takes care of the antistriation function.
5.5 Evaluation board features
This board is equipped with evaluation functionality. This section described the additional
functionality and how to use the jumpers.
5.5.1 Default jumper settings
Table 4 shows the default (factory) configuration jumper settings with the UBA2015AP
mounted.
UM10438 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
User manual Rev. 2.1 — 9 March 2012 18 of 38
NXP Semiconductors
UM10438
UBA2015AP 120 V (AC) evaluation board
5.5.2 Supporting other IC versions
The board supports all DIP versions of the ballast controller family. Make sure that the
BUS capacitor is discharged when replacing ICs.
Table 4. Default jumper setting
Jumper Function Type UBA2015AP
J1 Lamp connection 2-pin closed
J2 Lamp connection 2-pin closed
J3 Lamp connection 2-pin closed
J4 Lamp connection 2-pin closed
J5 HB inductor 2-pin closed
J6 PFC MOSFET socket socket 6N60C
J7 HB inductor 2-pin closed
J8 EOL circuit 2-pin closed
J9 HB current sense 2-pin closed
J10 HB current sense 2-pin open
J11 PFC over current sense 2-pin closed
J12 EOL disable 3-pin closed 1-2
J13 HB MOSFET socket high-side socket 2N60C
J14 HB MOSFET socket low-side socket 2N60C
J15 IFB input select 3-pin closed 1-2
J16 Lamp current sense circuit select 3-pin closed 1-2
J17 HB current sense 2-pin closed
J18 EOL circuit 2-pin closed
J19 Bus voltage setting 2-pin closed
J20 FBPFC fixed voltage 2-pin open
J21 Bus voltage adjustable 2-pin open
J22 DIM input setting 3-pin closed 1-2
J23 CF capacitor bank 100 pF 2-pin closed
J24 CF capacitor bank 47 pF 2-pin open
J25 CF capacitor bank 22 pF 2-pin closed
J26 CF capacitor bank 10 pF 2-pin open
J27 Start-up dim level 2-pin open
J28 CPT test 2-pin closed
J29 PFC disable 2-pin open
J30 CPT capacitor bank 100 nF 2-pin open
J31 CPT capacitor bank 47 nF 2-pin open
J32 CPT capacitor bank 22 nF 2-pin closed
J33 CPT capacitor bank 10 nF 2-pin open
J34 Boost/ fixed freq preheat select 3-pin closed 1-2
J35 Preheat frequency setting 3-pin closed 1-2
J36 Boost select 3-pin closed 1-2
UM10438 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
User manual Rev. 2.1 — 9 March 2012 19 of 38
NXP Semiconductors
UM10438
UBA2015AP 120 V (AC) evaluation board
5.5.2.1 UBA2015P
The UBA2015P IC is a non-dimmable version with fixed frequency preheat option. The
UBA2015P does not support boost.
The default jumper settings are suited. The DIM input pin of the UBA2015P is internally
not connected.
5.5.2.2 UBA2016AP
The UBA2016AP IC is a dimmable version with no fixed frequency preheat option. The
UBA2015AP supports boost.
5.5.3 Evaluation features and alternative jumper settings
5.5.3.1 PFC overcurrent adjustment
[1] Default setting.
5.5.3.2 External supply for the half-bridge circuit with PFC disabled
Experimenting with an external voltage (laboratory supply or separate PFC controller) for
the BUS is possible. Fix the PFC feedback signal FBPFC and the COMPFC to 1.24 V.
The default bus voltage is 420 V (DC). When adjusting the bus voltage it is advised to
disable the EOL protection with jumper J12.
The external laboratory supply must connect to the BRIDGE (TP1) because the start-up
current supplies the VDD pin.
5.5.3.3 Bus voltage adjustment with PFC enabled
The default bus voltage is 420 V (DC). With the alternative jumper settings shown in this
paragraph, it is possible to adjust the bus voltage. When adjusting the bus voltage, it is
advised the EOL protection is disabled using jumper J12.
Table 5. UBA2016AP jumper setting
Jumper Function Type UBA2016AP
J9 HB current sense 2-pin open
J34 Boost/fixed freq preheat select 3-pin closed 2-3
Table 6. Jumper settings: PFC overcurrent sense resistor
Jumper Function Setting R
SENSE
J11 PFC over current sense closed 0.82
[1]
J11 open 1
Table 7. Jumper settings: PFC disable for external half-bridge supply
Jumper Function Setting
J6 PFC MOSFET socket remove MOSFET
J19 Bus voltage setting open
J20 FBPFC fixed voltage 1.24 V closed
J21 Bus voltage adjustable open
J29 PFC disable closed
UM10438 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
User manual Rev. 2.1 — 9 March 2012 20 of 38
NXP Semiconductors
UM10438
UBA2015AP 120 V (AC) evaluation board
The bus voltage V
bus
is adjustable with resistor R45:
• R45 turned clockwise: V
bus
= 300 V (DC)
• R45 turned counter clockwise: V
bus
= 600 V (DC)
5.5.3.4 Half-bridge frequency control loop options
The default setting is lamp current control. The controller can regulate any other signal
such as the HB current. The controller increases the half-bridge switching frequency when
the feedback signal is too high. The controller decreases the half-bridge switching
frequency when the feedback signal is too low.
[1] Default setting.
HB current sense (J15 closed 2-3): Some LC tank topologies allow dimming to 10 % via
the HB current sense. The HB current is fed back to the IFB pin and the controller
regulates the HB current.
Remark: The LC tank topology on this board is not suited for dimming via the HB current
sense. A dedicated LC circuit could be placed in the experiment area, see
NXP Semiconductors AN10872 for suitable series resonant type of circuits.
Disabled (J15 open): The IFB pin is internally pulled down to ground level when the IFB
pin is left open. The controller then operates at the minimum operating frequency set by
the CF capacitor. The default minimum operating frequency is default 43 kHz.
Remark: It is recommended to connect the IFB pin to ground instead of leaving J15 open
to avoid interference on the PCB track.
5.5.3.5 Lamp current sense
There are two lamp current sense circuits on the evaluation board; by default the
non-linear sense circuit is selected.
The IC contains a double-sided rectifier. This setup means that no rectification is required
in the sense circuit.
Table 8. Jumper settings: PFC output voltage (VBUS) adjustment
Jumper Function Setting
J19 Bus voltage setting open
J20 FBPFC fixed voltage open
J21 Bus voltage adjustable closed
Table 9. Half-bridge frequency control loop jumper setting
Jumper Function Setting IFB input
J15 IFB input select closed 1-2
[1]
Lamp current
J15 closed 2-3 HB current
J15 open Disabled
Table 10. Half-bridge frequency control loop jumper setting
Jumper Function Setting Remarks
J16 Lamp current sense circuit select closed 1-2
[1]
non-linear
J16 closed 2-3 adjustable resistor
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