Datasheet 3
Contents
Contents
1 Introduction....................................................................................................................................11
1.1 Terminology........................................................................................................................12
1.1.1 Processor Packaging Terminology........................................................................12
1.2 References .........................................................................................................................13
2 Electrical Specifications.................................................................................................................15
2.1 Power and Ground Lands...................................................................................................15
2.2 Decoupling Guidelines........................................................................................................15
2.2.1 VCC Decoupling ....................................................................................................15
2.2.2 VTT Decoupling.....................................................................................................15
2.2.3 FSB Decoupling.....................................................................................................16
2.3 Voltage Identification ..........................................................................................................16
2.4 Reserved, Unused, FC and TESTHI Signals......................................................................18
2.5 Voltage and Current Specifications ....................................................................................19
2.5.1 Absolute Maximum and Minimum Ratings.............................................................19
2.5.2 DC Voltage and Current Specifications .................................................................19
2.5.3 VCC Overshoot Specification ................................................................................25
2.5.4 Die Voltage Validation ...........................................................................................26
2.6 Signaling Specifications......................................................................................................26
2.6.1 FSB Signal Groups................................................................................................26
2.6.2 GTL+ Asynchronous Signals.................................................................................28
2.6.3 FSB DC Specifications ..........................................................................................29
2.7 Clock Specifications............................................................................................................32
2.7.1 FSB Clock (BCLK[1:0]) and Processor Clocking...................................................32
2.7.2 FSB Frequency Select Signals..............................................................................32
2.7.3 Phase Lock Loop (PLL) and Filter .........................................................................33
3 Package Mechanical Specifications ..............................................................................................35
3.1 Package Mechanical Drawing ............................................................................................35
3.2 Processor Component Keep-Out Zones.............................................................................39
3.3 Package Loading Specifications.........................................................................................39
3.4 Package Handling Guidelines.............................................................................................39
3.5 Package Insertion Specifications........................................................................................40
3.6 Processor Mass Specification.............................................................................................40
3.7 Processor Materials............................................................................................................40
3.8 Processor Markings............................................................................................................40
3.9 Processor Land Coordinates ..............................................................................................42
4 Land Listing and Signal Descriptions ............................................................................................43
4.1 Processor Land Assignments.............................................................................................43
4.2 Alphabetical Signals Reference..........................................................................................66
5 Thermal Specifications and Design Considerations......................................................................75
5.1 Processor Thermal Specifications ......................................................................................75
5.1.1 Thermal Specifications ..........................................................................................75
5.1.2 Thermal Metrology.................................................................................................79