Vector 8K Static Ram User manual

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REPAIR

JlGREEMm'l"

The

8K

Memory

Board

sold

hereunder

is

sold

"as

is",

with

all

faults

and

without

any

warranty,

either

expressed

or

implied,

including

any

implied

warranty

of

fitness

for

intended

use

or

merchantability.

However,

the

above

notwithstanding,

VECTOR

GRAPHIC,

INC.,

will,

for

a

period

of

ninety

(90)

days

following

delivery

to

customer,

repair

or

replace

any

8K

Memory

Board

that

is

found

to

contain

defects

in

materials

or

workmanship,

provided:

1.

Such

defect

in

material

or

workmanship

existed

at

the

time

the

8K

Memory

Board

left

the

VECTOR

GRAPHIC

~

INC.,

factory;

2.

VECTOR

GRAPHIC,

INC.,

is

given

notice

of

the

precise

defect

claimed

within

ten

(10)

days

after

its

discovery;

3.

The

8K

Memory

Board

is

promptly

returned

to

VECTOR

GRAPHIC,

INC.,

at

customer

I s

expense,

for

examination

by

VECTOR

GRAPHIC,

INC.,

to

confirm

the

alleged

defect,

and

for

subsequent

repair

or

replacement

if

found

to

be

in

order.

Repair,

replacement

or

correction

of

any

defects

in

material

or

workmanship

which

are

discovered

after

expiration

of

the

period

set

forth

above

will

be

performed

by

VECTOR

GRAPHIC,

INC.,

at

Buyer's

expense,

provided

the

8K

Memory

Board

is

returned,

also

at

Buyer!s

expense,

to

VECTOR

GRAPHIC,

INC.,

for

such

repair.

replacement

or

correction.

In

performing

any

repair;

replacement

or

correction

after

expiration

of

the

period

set

forth

above,

Buyer

will

be

charged

in

addition

to

the

cost

of

parts

the

then-current

VECTOR

GRAPHIC,

INC.,

repair

rate.

At

the

present

time

the

applicable

rate

is

$35.00

for

the

first

hour,

and

$18.00

per

hour

for

every

hour

of

work

required

thereafter.

Prior

to

commencing any

repair,

replacement

or

correction

of

defects

in

material

or

workmanship

discovered

after

expiration

of

the

period

for

no-cost-to-Buyer

repairs,

VECTOR

GRAPHIC,

INC.,

will

submit

to

Buyer a

written

estimate

of

the

expected

charges,

and

VECTOR

GRAPHIC.

INC.,

will

not

commence

repair

until

such

time

as

the

written

estimate

of

charges

has

been

returned

by

Buyer

to

VECTOR

GRAPHIC,

INC.,

signed

by

duly

authorized

representative

authorizing

VECTOR

GRAPHIC,

INC.,

to

commence

with

the

repair

work

involved.

VECTOR

GRAPHIC,

INC.,

shall

have

no

obligation

to

repair,

replace

or

correct

any

8K

Memory

Board

until

the

written

estimate

has

been

returned

with

approval

to

proceed,

and

VECTOR

GRAPHIC.

INC.,

may

at

its

option

also

require

prepayment

of

the

estimated

repair

charges

prior

to

commencing

work.

Repair

Agreement

void

if

the

enclosed

card

is

not

returned

to

VECTOR

GRAPHIC,

INC.

within

ten

(10)

days

of

end consumer

purchase.

8K

RAM

BOARD

TABLE

OF

CONTENTS

SUBJECT

INTRODUCTION

PARI'S

LIST

SCHENATIC

COMroNENT

DIAGRAM

USERS

GUIDE

MEMORY

TEST

PRCGRAM

MACHINE

LANGUAGE

TEST

PROGRAM

ERROR

MAPPIN.;

MEMORY

TEST

TROUBLE

SHOJrING

HON

'ID

LOCATE

BAD

MEMORY

CHIPS

GENERAL

TROUBLE

SHOJrING

GUIDE

ASCII

CODE

CHART

PAGE

1

2

2A

2B

3

4

5

10

18

19

20

23

8K

MEMORY

USERS

MANUAL

INTRODUCTION

Page 1

THE

VECTOR

GRAPHIC

8K

STATIC

MEMORY

OOARD

IS

DESIGNED

'IO

BE

PLUG-IN

COMPATIBLE

WITH

YOUR

VECTOR

1,

ALTAIR, IMSAI

AND

POLY

88

SYSTEMS.

WE

HAVE

PROVIDED

A

HIGH

QUALITY

PRODUCT

BY

USING

THE

FINEST

AVAILABLE

MEMORY

CHIPS

AND

AEROSPACE

QUALITY

PRINTED

CIRCUIT

BOARD.

THE

MEMORY

OPERATES

AT

THE

MAXIMUM

SPEED

OF

SOSOA

MPU

OR

Z-80

MPU

CAPACITY

w'"ITH

00

WAIT

STATES

REQUIRED.

THE

MEMORY

CHIP

ADDRESS

INPUTS

ARE

BUFFERED 'IO

REDUCE

THE

CAPACITANCE

LOADING

ON

THE

ADDRESS

BUS, A

MAJOR

PLUS

SINCE THIS

COULD

EXCEED

2000

PF

IN

A

LARGE

SYSTEM. ADDRESS SELECTION

IS

BY

MEANS

OF

A

DIP

SWITCH

LOCATED

ON

THE

UPPER

EDGE

OF

THE

BOARD.

WITH

THIS

FEATURE

YOU

MAY

CHANGE

THE

OOA...'ID

ADDRESS

FOR

PROORAMS

THAT

RUN

IN

HIGH

MEMORY

WITHOUT

HAVING

'IO

REMOVE

THE

BOARD

FRCM

THE

COMPUTER.

ANorHER

CONVENIENCE

IS

THE

OUTPUT

DISABLE

FEATURE

WHICH

PERMITS

STARr

UP

OF

THE

COMPurER

WITHOUT

THE

FRONT

PANEL

SWITCHES. FURI'HER,

THE

BOARD

CAN

BE

WRITE

PRorECTED. TYPICAL

l?CWER

CONSUMPTION

OF

THE

250

NS

BOARD

IS

1.6

AMPS

USHX:;

FAIRCHILD 2102LHPC CHIPS.

IF

THERE

IS

ANYTHING

THAT

YOU

DO

Nor

UNDERSTAND,

PLEASE

DO

Nor

HESITATE 'IO

CALL

OR

WRITE

US!

8K

MEMORY

USERS

MANUAL

PARTS

LIST

Page 2

e:trY

•

1

64

1

4

2

1

24

1

7

4

5

67

4

DESCRIPTION

PRINl'ED

CIRCUIT

BOARD

2102LHK:

STATIC

RAMS

OR

EQUIVALENT

4-POSITION

DIP

SWITCH

7805

REGULATORS

SETS

OF

HARIWARE

FOR

THE

REGULATORS

6-32X3/8"

SCREW'S,

NUTS

AND

LOCKWASHERS

74367/8097

TRI-STATE

BUS

DRIVERS

7414

SCHMITT TRIGGERS

74LS42

mE

OF

EIGHT

DECODER

74LS86

EXCLUSIVE

OR

GATE

74LS30

8 INPUT

NAND

GATE

74LSOO

QUAD

2 INPUT

NAND

GATE

22

MFD

16

VOLT

AXIAL ELECTROLYTIC CAPACITOR

0.1

MFD

50

VOLT

MONOLITHIC

RADIAL

CAPACITORS

470

PF

50

VOLT

AXIAL

CERAMIC

CAPACITOR

4.7K

RESISTORS

1/4

WATT

(BANDS

OF

YELLOW,

VIOLET,

RED)

IN4002

DIODES

14

IC

SOCKETS

16

IC

SOCKETS

THERMALLOY

#6073B

HEAT

SINKS

I 7

2102LIPC

6

2102L1PC

50

40

30

8K

STATIC

RAM

--@-

''J

(~?\

)

8097

I)

74LSOO

I

VE(rO=t

G=fAill-iC

inc, 0 0

REV

1

J3

A

J2

20

I'""""?'-

..........

-l m) 8097 I

) [

7414

]

l(

0

A 0

J4

B

J5

B

JUMPER

10

n

) r

7414]

I

o

J6

1

>

74LS42

I

o

J7

L

l-Q

~

ro

N

Qj

8K

MEMORY

USERS GUIDE

.:rowER SUPPLY CONSIDERATIONS

USERS GUIDE

Page 3

FOR RELIABLE OPERATION,

AN

ADEQUATE,

UNREGULATED

8

VOLT

SUPPLY

MUST

BE

PROVIDED.

THE

REGULATORS

ON

THE

8K

BOARD

REQUIRE

AT

LEAST

2 VOLTS DROP TO REGULATE

PROPERLY.

THIS

MEANS

THAT'lliE

'IROUGH

OF

THE

UNREGULATED

SUPPLY

WAVEFORM

MUST

BE

AT

LEAST

7

VOLTS.

TO

ALLCM

FOR

NORMAL

LINE

VOLTAGE

FLUCTUATIONS,

AT

LEAST 10%

MARGIN

SHOULD

BE

MAINTAINED

ABOVE

THIS.

THUS

WITH 1

VOLT

PEAK-PEAK

RIPPLE,

THE

AVERAGE UNREGULATED

SUPPLY

VOLTAGE

SHOULD

BE

AT

LEAST

8.2

VOLTS. TO MAINTAIN

LESS

THAN

1

VOLT

P-P

RIPPLE,

M LEAST

8000

Mill

OF

FILTER

CAPACITANCE SHOULD BE

PROVIDED

PER

AMPERE OF TOTAL CURRENT

DRAIN.

IF

YOUR

COMPUTER

SUPPLY

IS

Nar

ADEQUATE,

WE

OFFER A

REPLACEMENT

FOWER

TRANSFORMER

WHICH

WILL

PRODUCE

+8V,

18A;

.:i:l6V,

2.5A.

CONTACT

US

FOR FURI'HER INFORMATION.

LINE

TRANSIENTS

MOST

OF

US

HAVE

EXPERIENCED THE FRUSTRATION

OF

SPENDING A LOT

OF

TIME

~RKING

ON

A PROGRAM,

ONLY

TO

HAVE

A

PCl'I7ER

LINE

TRANSIENT CAUSE

THE

PROGRAM

TO

BOMB.

THIS

PROBLEM

IS

USUALLY

DUE

TO

HIGH FREQUENCY

TRANSIENTS

CAUSED

BY

MOTOR

STARTING

CONTACTORS OR

INDUCTIVE

ENERGY STORAGE SOMEWHERE

ON

THE

POWER

DISTRIBUTION

SYSTEM.

ACTUAL:R:mER

OUTAGES

ARE

RELATIVELY RARE.

MEMORY

WRITE

PROTECTION

OR

STANDBY POWER SOURCES WILL

NOT

PREVENT

THIS

PROBLEM.

IT

IS

RECOMMENDED

THAT

A

rovER

LINE

FILTER

BE

INSTALLED

IN

YOUR

COMPUTER

AS

CLOSE

TO

THE

LINE

CORD ENTRY

POINT

AS

POSSIBLE.

A

CORCCM

MODEL

3Bl

OR

EQUIVALENT

IS

VERY

EFFECTIVE.

VECTOR

GRAPHIC SYSTEMS

HAVE

A

:tOWER

LINE

FILTER

AS

STANDARD

EQUIPMENT.

VENTILATION

IT

IS

RECOMMENDED THAT ADEQUATE FORCED

VENTILATION

BE PROVIDED

IN

ENCLOSED

CABINETS.

IF

'IHE

COMPUTER

IS

OPERATED WITHOUT A COVER,

ALLCW

2 SLOTS SEPARATION

OR

1.

5"

BETWEEN BOARDS.

IF

YOU

CAN'T

HOLD

YOU

FINGER

ON

THE

HEAT

SINK

FOR

AT

LEAST A

FEW

SECONDS,

'lliE

VENTILATION

IS

oor

ADEQUATE.

ADDRESS SELECTION

THE ADDRESS RANGE THAT THE BOARD RESPONDS TO

IS

SELECTED

BY

THE THREE

LEFT

SWITCHES

CN

THE

DIP

SWITCH. THEY

ARE

ARRANGED

IN

EXACTLY

THE

SAME

CONFIGURATION

AS THE MOST

SIGNIFICANT

FRONT PANEL ADDRESS

SWITCHES;

NAMELY

A

15,

THE

MOST

SIGNIFICANT

ADDRESS

BIT,

IS

ON

THE

LEFT,

AND

SETTING

THE SWITCH TO THE

ON,

OR

UP,

POSITION

SETS

THE ADDRESS

BIT

HIGH. TABLE 1 GIVES

THE

SWITCH SETTING FOR

ALL

roSSIBLE

ADDRESS RANGES.

8K

MEMORY

USERS

GJIDE

ADDRESS

RANGE

0000-IFFF

2000-3FFF

4000-5FFF

6000-7FFF

8000-9FFF

AOOO-BFFF

COOO-DFFF

EOOO-FFFF

TABLE

1

Page 4

SWITCH

SETTING

(1

=ON)

OOOX

001X

OIOX

OllX

lOOX

101X

llOX

11IX

IF

YOU

HAVE

4K

OR

SMALLER

BOARDS,

THE

MOST

CONVENIENT

ARRANGEMENT

IS

TO

PUT

THE

8K

BOARDS

AT

THE

I...CWEST

ADDRESS

FDLLCMED

BY

THE

4K

AND

SMALLER

BOARDS.

IF

YOU

HAVE

MACHINE

LAJ."IJGUAGE

ROUTINES

CN

PRQI1S

THAT

USE

THE

STACK,

A

SMALL

MEMORY

BOARD

LOCATED

JUST

BELCM

32K

IS

VERY

CONVENIENT.

THIS

ALLCWS

YOU

TO

ADD

TO

YOUR

MAIN

MEMORY

WITHOur

HAVING

TO

REP:R:CX;RAM

PROMS

WITH

THE

NEW

STACK

LOCATION.

MEMORY

WRITE

PRarECT

THE

RIGHT

HAND

DIP

SWITCH

CONTROLS

THE

MEMORY

WRITE PROTECT.

WITH

THE

SWITCH

OFF,

THE

MEMORY

CAN

NOT

BE

WRITTEN

INTO.

THE

NOID1AL

POSITION

IS

ON.

THIS

FEATURE

IS

IDl'

USED

WHEN

RUNNING

BASIC,

Bur

CAN

BE

USED

'ill

PR0rECT

SOURCE

FILES

OR

ASSEMBLERS

WHEN

DEBUGGING

MACHINE

CODE

ROUTINES,

WHICH

OFTEN

GO

AWRY

AND

CAUSE

OI'HER

PARTS

OF

ME,.1I1.0RY

'IO

BE

ALTERED.

'IO

USE

THE

FEATURE,

MERELY

FLIP

THE

PROTECT

SWITCH

J:lCMN

BEFORE

EXECtJrING

THE

MACHINE

USAGE

ROtJrINE.

NATURALL

Y,

THE

STACK

OR

MEMORY

LOCATIONS

ALTERED

CURING

NORMAL

PROGRAM

EXECtJrION

CAN

IDI'

RESIDE

CN

PROI'ECTED

BOARDS.

OtJrPUT

DISABLE

FEATURE

THERE

IS

CNE

JUMPER

LOCATION,

AS

SHCMN

CN

THE

CCMroNENT

PLACEMENT

DIAGRAM,

WHICH

PERMITS THE

TRI-STATE

BUS

DRIVERS

TO

BE

DISABLED

DURING

MEMORY

READ

CYCLES.

THIS

PERMITS

A

TRANSPARENT

BOOTSTRAP

LOADER

'IO

BE

IMPLEMENTED

USING

COMPONENTS

ON

ornER

BOARDS.

WITH

THE

JUMPER

INSTALLED,

PULLING

LINE 67

ON

THE

BUS

LCW

WILL

DISABLE

'!HE

TRI-STATE

BUS

DRIVERS.

MEMORY

TEST

PROGRAM

THERE

ARE

NUMEROUS

MEMORY

TEST

PROGRAMS

AVAILABLE

IN

THE

LITERATURE

FOR

ANY

LEVEL

OF

SYSTEM

SOPHISTICATION.

IF

YOU

HAVE

8K

BASIC

UP

AND

RUNNING,

OR

KNCM

SOMEONE

WHO

roES,

'!HE

FOLLCWING

PROGRAM

WILL

ro

A

THOROUGH

JOB

OF

TESTING

YOUR

MEMORY

WITH A

RANDOM

PATTERN USING

THE

RND

FUNCTION.

TO

USE

THE

PROGRAM,

A

SYSTEM

TN'"ITH

AT

LEAST

8K

OF

MEMORY

IS

REQUIRED,

NOT

COUNTING

THE

BOARD

TO

BE

TESTED. SET

THE

BOARD

ADDRESS

'IO

SOME

RANGE

ABOVE

THE

EXISTING

MEMORY

Bur

BELCW

32K.

LOAD

Bi\SIC

AND

INITIALIZE

MEMORY

AT

8192

BYTES,

SO

BASIC WILL

NOT

LOAD

A

PROGRAM

IN

THE

BOARD

TO

BE

TESTED.

LOAD

THE

TEST

P:R:CX;RAM

USING

THE

KEYBOARD,

PAPER

TAPE,

OR

CASSETrE.

RUN

THE

PROGRAM

AND

ENTER

THE

STARTING

AND

ENDING

8K

MEMORY

USERS

GUIDE

Page

5

HEMORY

LOCATIONS

TO

BE

TESTED

(IN

DECIMAL)

•

IT

TAKES

SEVERAL

MINUTES

TO

TEST A

BOARD,

AFTER NHICH

THE

PROGRl\M

TYPES "CHECK

OK"

AND

CONTINUES

TESTING.

A

THOROUGH

TEST REQUIRES

ABOUT

10

PASSES.

IF

At."J

ERROR

OCCURS,

THE

LOCATION

IS

PRINTED

OOT

ALONG

luTE

THE

NUMBER

WRITI'EN

INTO

fI11EHORY

AND

READ

FROM

MEMORY.

EXAMPLE RUN

RUN

HiGH

MEMORY

ADD.?

20479

LOW

MEMORr

ADD.?

8192

LOCATION

WROTE

CHECK

OK

GHECK

OK

CH[CX

OK

PROGRAM LISTING (MITS

!ASIC]

30

INPUT~"HIGH

ME-HORY ADD

..

··JH

;0

I

NPUT"LOW

MEMORY

ADD

..

••

J L

! 21

PR

I

NT"I-OCAT

I ON".t·'

WROTE'·

..

>OR

EAO"

1.2'2

A-RND

( 1 )

125

e

...

RND(-A)

130

FOR

N-L

TO

H

140

POKE

N~INT(256.RNO{1»

150

BllIlRNO

(-A)

110

FOR N",I- TO H

180

IF

PEEK(N)=lNT<256*RNO(1)

)

GOTD

190

PRINT

N~lNT<256.RNO(0»#PEEK<N)

200

PRINT"CHECK OK"

22121

GOTO

122

OK

20121

f1ACHINE

LANGUAGE

TEST

PROGRA..'I1

THE

MACHINE

LANGUAGE

MEMORY

TEST

PRCX3RA.r-l

eN'

THE

FOLLOWING

PAGES

IS

ABSTRACTED

FROM

THE

VECTOR

1

MONITOR

PRCGRAt."1,

AND

ASSEMBLED

TO

RUN

IN

THE

LallEST 256

BYTES

OF

HE.."10RY.

srARI'

EXECUTION

AT

ADDRESS

OOOOH.

A

"*/1

WILL

BE

TYPED

IF

YOU

HAVE

PROPERLY

PATCHED

THE

I/O

ROUTINES

FOR

YOUR

SYSTEM.

PTCN

IS

THE

OUTPUT

ROUTINE

FOR

A 3P+S

BOARD

WITH

STATUS

INVERTED

(OR

MITS

REV.

1

SIO).

RDCN

IS

THE INPUT

ROUTINE.

IF

YOU

ARE

USING

A

BOARD

WITH

A

PROGRAMMABLE

USART,

YOU

WILL

HAVE

TO

INITIALIZE

IT

IN

ADDITION

TO

CHANGING

THE

r-'ASK,

JUMP

CONDITION,

AND

FORT.

AFTER

"*",

TYPE

IN

FOUR

HEX

CHARACTERS

FOR

THE

STARrING

ADDRESS

OF

THE

MEr10RY

BLOCK

'IO

BE

TESTED

AL\ID

FOUR

HEX

CHARACTERS

FOR

THE

ENDING

ADDRESS

OF

THE

BLOCK.

SPACE

IS

AUTOMATIC,

AND

IF

YOU

TYPE

ANY

CHARACTERS OTHER

THAN

0-9,

A-F

THE

PRCGRAM

WILL

ro

STRANGE

THINGS. A

RESET

WILL

TERMINATE

THE

TEST.

THE

PROGRAM

GENERATES

A 2

16-1

BYTE

PSEUDO-RANIX::M

NUMBER

SEQUENCE,

WRITES

A PORI'ION

OF

IT

IN

THE

BLOCK

OF

MEMORY

AND

THEN

REGENERATES

THE

SEQUENCES

FROM

THE

SAJ."1E

POINT

TO

COMPARE

\-vITH

WHAT

IS

READ

FRCM

MEMORY.

IF

THE

PASS

IS

CORRECT,

A

NEW

PORI'ION

OF

THE

SEQUENCE

IS

WRITrEN

INTO

ME.."10RY.

ERRORS

ARE

PRINTED

OUT

WITH

THE

ADDRESS,

w11AT

WAS

WRI'ITEN,

AND

WHAT

WAS

READ.

USE

THE

ADDRESS

LOCATIONS

ON

THE

CQ.\1FONENT

PLACEMENT

DIAGRAM

TO

LOCATE

THE

BAD

ROW,

AND

THE

INCORRECT

BIT

TO

LOCATE

THE

COLUMN.

AN

OUTPtJr

OF

"FF"

~1E..lillS

NO

MEMORY.

MORE

THAN

ONE

BIT

WRONG

IS

USUALLY

CAUSED

BY

CHIPS IN

Bl\CKWARDS

(WHICH

roES

~

DESTROY

THE

MEMORY

CHIPS,

CONTRARY

TO

TTL)

OR

A SOLDER BRIDGE.

BENT

UNDER

ADDRESS

PINS

CAUSE

MANY

ERRORS

TO

BE

PRINTED

OOT

IN

CNE

1K

BLOCK.

THE

MOST

DIFFICULT

PROBLEM

TO

ISOLATE

IS

A

SHORI'

CIRCUITED

ADDRESS

LINE

TO

THE

MEMORY

ARRAY.

THIS

WILL

USUALLY

CAUSE

ALL

MEMORY

LOCATIONS

TO

INDICATE

ERROR

WITH

ALL

B

ITS

BAD.

THE

SHORr

CAN

BE

CAUSED

BY

A Sa..DER BRIDGE,

AN

ETCH

BRIDGE

(ALTHOUGH

EACH

BOARD

IS

ELECTRICALLY

TESTED

FDR

THIS),

OR

A DEFECTIVE

CHIP.

IF

YOU

CANNOT

LOCATE

THE

PROBLEM

VISUALLY,

REMOVE

HALF

OF

THE

RCWS

OF

CHIPS

AND

TEST

WITH

A

SMALLER"

BLOCK

LENGTH. REPEAT

THIS

UNTIL

ALL

CHIPS

~_VE

BEEN

ELIMINATED

AS

TROUBLE

MAKERS.

THEN

TEST

BE'IWEEN

MEMORY

SOCKET

PINS

USING

A LOil

8K

MEMORY

USERS

GUIDE

Page 6

VOLTAGE

OHMMETER

ON

THE

Xl

OHMS

SCALE

AT

ONE

CHIP

LOCATION.

IF

THIS

FAILS

TO

~

THE

PROBLEM,

SOME

EXPERIENCE

IN

TROUBLESHOOTING

ELECTRONIC

CIRCUITS

BECOMES

VERY

USEFUL.

Page 7

ALPHA

BIAS

4 DIGITS?

KEEP

READING

CONSOLE

STAT

PORT

CONSOLE

DATA

PORT

STACK

POINTER

PRINT

SPACE

SAVE

REG

A

READ

PRTR

STATUS

IF

BIT 7

NOT

0,

WAIT

TILL TIS

THEN

RECOVER

A

AND

PRINT

IT

FROM

PTCN

PRINT

CR

ASCII

BIAS

DIGIT

0-10

PRINT

"*,,

READ

KB

STATUS

IF

BIT 1

NOT

a

REPEAT

UNTIL

IT

IS

READ

FROM

KB

STRIP

OFF

MSB

ECHO

ONTO

PRINTER

GET

16 BIT

ZERO

COUNT

OF

4 DIGITS

READ

A

BYTE

SHIFT 4

LEFT

A,20H

PSW

CONC

80H

PTLOP

PSW

COND

RETURN

A,ODH

PTCN

A,OAH

PTCN

a

1

0100H

SP,SPTR

CRLF

A

'*'

,

PTCN

TMEM

CONC

1

RDCN

COND

7FH

PTCN

H,O

C,4

RDCN

H

48

10

ALF

7

L

L,A

C

AHE1

EQU

LXI

CALL

MVI

CALL

JMP

IN

ANI

JNZ

IN

ANI

JMP

LXI

MVI

CALL

DAD

SUI

CPI

JC

SUI

ADD

MOV

DCR

JNZ

XCHG

MVI

PUSH

IN

ANI

JNZ

POP

OUT

RET

MVI

CALL

MVI

JMP

SPCE

PTCN

PTLOP

0010

CONC

0020

COND

0050

SPTR

0051 *

0052

***

VECTOR

GRAPHIC

MEMORY

TEST

PROGRAM

0053

*FOR

SIO

REV.

1

AND

3P+S

W.

INV.

STATUS

0060 *

ASSEMBLED

FOR

0000

TO

OOFF

HEX

0070

*

0100

START

0105

a110

0120

0130

0410 *

0420

***

CONVERT

UP

TO

4

HEX

DIGITS

TO

BIN

0430 *

0440

AHEX

0450

0460

AHE1

0470

0480

0490

0500

0510

0520

0530

0540

0550

ALF

0560

0570

0580

0585

0590

0600

0610

0620

0630

0640

0650

0660

0670

CRLF

0680

0690

0700

0710

*

0720

***

READ

FROM

CONSOLE

TO

REG

A

***

0730

*

0740

RDCN

0750

0760

0770

0780

0790

1590 *

0000

31

00

01

0003

CD

38 00

0006

3E

2A

0008

CD

2C

00

OOOB

C3

50 00

OOOE

21

00 00

00

11

OE

04

0013

CD

42 00

0016 29

0017

29

0018

29

0019 29

001A

D6

30

001C

FE

OA

001E

DA

23 00

0021

D6

07

0023 85

0024

6F

0025

OD

0026

C2

13 00

0029

EB

002A

3E

20

002C

F5

002D

DB

00

002F

E6

80

0031

C2

2D

00

0034

F1

0035

D3

01

0037

C9

0038

3E

aD

003A

CD

2C

00

003D

3E

OA

003F

C3

2C

00

0042

DB

00

0044

E6

01

0046

C2

42

00

0049

DB

01

004B

E6

7F

004D

C3

2C

00

0050

Page

8

0050 1600

***

MEMORY

TEST

ROUTINE

***

0050

1610

*

0050

CD

OE

00

1620

TMEM

CALL

AHEX

READ

BLK

LEN

0053

CD

OE

00 1640

CALL

AHEX

READ

ST

ADD

0056

01

5A

1650

LXI

B,5A5AH

INI

B,C

0059

CD

81

00

1660

CYCL

CALL

RNDM

005C

C5

1670

PUSH

B

KEEP

ALL

REGS

005D

E5

1680

PUSH

H

005E

D5

1690

PUSH

D

005F

CD

81

00

1700

TLOP

CALL

RNDM

0062

70

1710

MOV

M,B

WRITE

IN

MEM

0063

CD

C5

00

1720

CALL

BMP

0066

C2

5F

00

1760

JNZ

TLOP

REPEAT

LOOP

0069

D1

1770

POP

D

006A

E1

1780

POP

H

RESTORE

ORIG

006B

C1

1790

POP

B

VALUES

OF

006C

E5

1800

PUSH

H

006D

D5

1810

PUSH

D

006E

CD

81

00

1820

RLOP

CALL

RNDM

GEN

NEW

SEQ

0071

7E

1830

MOV

A,M

READ

MEM

0072

B8

1840

CMP

B

COMP

MEM

0073

C4

9F

00

1850

CNZ

ERR

CALL

ERROR

ROUT

0076

CD

C5

00

1860

CALL

BMP

0079

C2

6E

00

1930

JNZ

RLOP

007C

D1

1940

POP

D

007D

E1

1950

POP

H

007E

c3

59

00

1960

JMP

CYCL

0081

1970

***

THIS

ROUTINE

GENERATES

RANDOM

NOS

***

0081

78

1980

RNDM

MOV

A,B

LOOK

AT

B

0082

E6

B4

1990

ANI

OB4H

MASK

BITS

0084

A7

2000

ANA

A

CLEAR

CY

0085

EA

89

00

2010

JPE

PEVE

JUMP

IF

EVEN

0088

37

2020

STC

0089

79

2030

PEVE

1'10V

A,C

LOOK

AT

C

008A

17

2040

RAL

ROTATE

CY

IN

008B

4F

2050

MOV

C,A

RESTORE

C

008c

78

2060

MOV

A,B

LOOK

AT

B

008D

17

2070

RAL

ROTATE

CY

IN

008E

47

2080

MOV

B,A

RESTORE

B

008F

C9

2090

RET

RETURN

W

NEW

B,C

0090

2100

*

0090

2110

***

ERROR

PRINT

OUT

ROUTINE

0090

2120

*

0090

CD

38

00

2130

PTAD

CALL

CRLF

PRINT

CR,LF

0093

7C

2140

MOV

A,H

PRINT

0094

CD

AB

00

2150

CALL

PT2

ASCII

0097

7D

2160

MOV

A,L

CODES

0098

CD

AB

00

2170

CALL

PT2

FOR

009B

CD

2A

00

2180

CALL

SPCE

ADDRESS

009E

C9

2200

RET

009F

F5

2210

ERR

PUSH

PSW

SAVE

ACC

OOAO

CD

90

00

2220

CALL

PTAD

PRINT

ADD.

00A3

78

2230

MOV

A,B

DATA

00A4

CD

AB

00

2240

CALL

PT2

WRITTEN

00A7

CD

2A

00

2250

CALL

SPCE

OOAA

F1

2270

POP

PSW

DATA

READ

Page

9

OOAB

F5

2280

PT2

PUSH

PSW

OOAC

CD

B3

00 2290

CALL

SINH

OOAF

Fl

2300

POP

PSW

OOBO

C3

B7

00

2310

JMP

BINL

00B3

IF

2320

BINH

RAR

00B4

IF

2330

RAR

00B5

IF

2340

RAR

00B6

IF

2350

RAR

00B7

E6

OF

2360

BINL

ANI

OFH

LOW

4 BITS

00B9

C6

30 2370

ADI

48

ASCII

BIAS

OOBB

FE

3A

2380

CPI

58

DIGIT

0-9

OOBD

DA

2C

00

2390

JC

PTCN

OOCO

C6

07

2400

ADI

7

DIGIT

A-F

00C2

C3

2C

00 2410

JMP

PTCN

00C5

7B

3000

BMP

MOV

A,E

00C6

95

3010

SUB

L

00C7

C2

CC

00

3020

JNZ

GOON

OOCA

7A

3030

MOV

A,D

OOCB

9C

3040

SBB

H

OOCC

23

3050

GOON

INX

H

OOCD

c9

3060

RET

SYMBOL

TABLE

AHEl

0013

AHEX

OOOE

ALF

0023

BINH

00B3

BINL

00B7

BMP

00C5

CONC

0000

COND

0001

CRLF

0038

CYCL

0059

ERR

009F

GOON

OOCC

PEVE

0089

PT2

OOAB

PTAD

0090

PTCN

002C

PTLOP

002D

RDCN

0042

RLOP

006E

RNDM

0081

SPCE

002A

SPTR

0100

START

0000

TLOP

005F

TMEM

0050

$D

4000 40CF

4000

31

00

01

CD

38

00

3E

2A

CD

2C

00

C3

50

00

21

00

4010 00

OE

04

CD

42

00

29

29 29 29

D6

30

FE

OA

DA

23

4020

00

D6

07

85

6F

OD

C2

13

00

EB

3E

20

F5

DB

00

E6

4030 80

C2

2D

00

Fl

D3

01

C9

3E

OD

CD

2C

00

3E

OA

C3

4040

2C

00

DB

00

E6

01

C2

42 00

DB

01

E6

7F

C3

2C

00

4050

CD

OE

00

CD

OE

00

01

5A 5A

CD

81

00

C5

E5

D5

CD

4060

81

00 70

CD

C5

00

C2

5F

00

Dl

El

Cl

E5

D5

CD

81

4070 00

7E

B8

C4

9F

00

CD

C5

00

C2

6E

00

Dl

E1

C3

59

4080

00

78

E6

B4

A7

EA

89

00

37 79

17

4F

78

17

47

C9

4090

CD

38 00

7C

CD

AB

00

7D

CD

AB

00

CD

2A

00

C9

F5

40AO

CD

90

00

78

CD

AB

00

CD

2A

00

F1

F5

CD

B3

00

F1

40BO

C3

B7

00

1F

1F 1F

E6

OF

C6

30

FE

3A

DA

2C

00

40CO

C6

07

C3

2C

00

7B

95

C2

CC

00

7A

9C

23

C9

00 00

$

Page 10

ERROR MAPPIN:;

MEMORY

TEST

THE

ERROR

MAPPING

MEMORY

TEST

00

THE FOLLCWING PAGES

IS

USEFUL

SINCE

IT

PROVIDES

A

MAP

OF THE

MEMORY

BOARD

ON

THE DISPLAY

AND

INDICATES THE

EXACT

BOARD

LOCATION

OF

BAD

MEMORY

CHIPS.

THIS

PROORAM

IS

WRITTEN 'ID

MAP

VEC'IDR

GRAPHIC

8K

AND

16K

STATIC

MEMORY

BOARDS.

NOTE THAT THE

PROGRAM

REQUIRES

SPECIFIC

EQUIFMENT FOR

OPERATION

(LISTED

PIT

BEGINNING OF

PROORAM

LISTING)

•

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Vector 8K Static Ram User manual

Vector 8K Static Ram User manual

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