Humandata ACM-108-GX110 User manual

Brand
Humandata
Model
ACM-108-GX110
Type
User manual

This manual is also suitable for

HuMANDATA LTD.
Cyclone IV GX FPGA Board
ACM-108
User’s Manual
Ver. 1.0
Table of Contents
Table of Contents Table of Contents
Table of Contents
Revision History ................................................................................................. 1
Revision History ................................................................................................. 1Revision History ................................................................................................. 1
Revision History ................................................................................................. 1
Introduction ........................................................................................................ 1
Introduction ........................................................................................................ 1Introduction ........................................................................................................ 1
Introduction ........................................................................................................ 1
1. Unused Pins
1. Unused Pins 1. Unused Pins
1. Unused Pins [IMPORTANT]
[IMPORTANT][IMPORTANT]
[IMPORTANT] ................................................................................. 2
................................................................................. 2 ................................................................................. 2
................................................................................. 2
2. Specifications ......................................................................................................... 3
2. Specifications ......................................................................................................... 32. Specifications ......................................................................................................... 3
2. Specifications ......................................................................................................... 3
3. Overview ................................................................................................................ 4
3. Overview ................................................................................................................ 43. Overview ................................................................................................................ 4
3. Overview ................................................................................................................ 4
3.1. Name of Parts ...................................................................................................... 4
3.2. Block Diagram ..................................................................................................... 5
3.3. Power Supply ....................................................................................................... 5
3.4. Clock ..................................................................................................................... 6
3.5. JTAG Connector................................................................................................... 6
4. Configuration Switch (SW1) .................................................................................. 7
4. Configuration Switch (SW1) .................................................................................. 74. Configuration Switch (SW1) .................................................................................. 7
4. Configuration Switch (SW1) .................................................................................. 7
5. FPGA Configuration .............................................................................................. 7
5. FPGA Configuration .............................................................................................. 75. FPGA Configuration .............................................................................................. 7
5. FPGA Configuration .............................................................................................. 7
6. Configuration Device Programming ...................................................................... 7
6. Configuration Device Programming ...................................................................... 76. Configuration Device Programming ...................................................................... 7
6. Configuration Device Programming ...................................................................... 7
6.1. Generating jic file ................................................................................................ 8
6.2. Programming Configuration Device .................................................................. 8
7. FPGA Pin Assignment ........................................................................................... 9
7. FPGA Pin Assignment ........................................................................................... 97. FPGA Pin Assignment ........................................................................................... 9
7. FPGA Pin Assignment ........................................................................................... 9
8. Additional Documentation and User Support ....................................................... 9
8. Additional Documentation and User Support ....................................................... 98. Additional Documentation and User Support ....................................................... 9
8. Additional Documentation and User Support ....................................................... 9
Precautions
Do Not
1. This product uses ordinary off-the-shelf electronic components, and is therefore inappropriate for use in
applications that require special quality or reliability and are expected to protect human lives or prevent
accidents, such as safety mechanisms in fields including space, aeronautics, medicine, and nuclear
power.
2. Do not be used underwater or in high-humidity environments.
3. Do not be used in the presence of corrosive gases, combustible gases, or other flammable gases.
4. Do not turn on power when circuit board surface is in contact with other metal.
5. Do not apply voltage higher than rated voltage.
Attention
6. This manual may be revised in the future without notice owing to improvements.
7. All efforts have been made to produce the best manual possible, but if users notice an error or other
problem, we ask that they notify us.
8. Item 7 notwithstanding, HuMANDATA cannot be held liable for the consequences arising from use of
this product.
9. HuMANDATA cannot be held liable for consequences arising from using this product in a way different
from the uses described herein, or from uses not shown herein.
10. This manual, circuit diagrams, sample circuits, and other content may not be copied, reproduced, or
distributed without permission.
11. If the product emits smoke, catches fire, or becomes unusually hot, cut the power immediately.
12. Be careful of static electricity.
13. This product may be subject to the export restrictions of Japan, the United States, or other countries.
Purchasers are responsible for properly observing export restrictions.
14. HuMANDATA firmly refuses to export (including reexporting) products to countries or regions subject to
export restrictions.
Product Warranty and Scope of Support
1. HuMANDATA guarantees that its products can be assembled as shown in published circuit diagrams and other design documents.
There may be differences between actual components or their prescribed quantities and model numbers and those shown in circuit
diagrams.
2. Except for the guarantee in item 1, above, no guarantees whatsoever are made. When assembling the product as shown in a circuit
diagram is impossible, and the problem can be solved by revising the diagram, HuMANDATA will revise the diagram. When a
problem can be solved only by replacing components or modifying the product, HuMANDATA will take back the product to replace it
with a properly functioning product.
3. If the problem is minor, HuMANDATA will sometimes describe how to make the revision or modification, and ask the customer to
solve the problem.
4. HuMANDATA will determine how to honor the warranty, as through repair, replacement, return, or other action. The customer cannot
specify what action to take.
5. FPGAs and other components used in products sometimes have characteristic defects. Returns and replacements are not possible
even if such defects are discovered, whether before or after purchase.
6. HuMANDATA shall not be obligated to inform customers about defects in the main components used in products.
7. HuMANDATA shall not be obligated to provide support for products, or to provide support for the software of other companies
needed to use HuMANDATA products.
8. Published documentation shall be limited to that published by HuMANDATA at the time of product purchase, and HuMANDATA shall
not be obligated to provide any other documentation.
9. When repairs or replacements are provided under warranty in Japan, purchaser shall pay shipping charges for shipping to
HuMANDATA, and HuMANDATA shall pay shipping charges for shipping to purchaser.
10. When shipping from outside of Japan, purchaser shall pay all expenses including shipping charges and taxes.
11. Under whatever circumstances, HuMANDATA shall provide support for its products for a maximum of one year after shipping from
factory.
12. The Warranty is not applicable and support ends in the event of fire, storm and flood damage, earthquakes, lightning strikes, and
other natural disasters, as well as conflict or other occurrences.
13. Purchaser is assumed to have read and understood all the above when purchasing a HuMANDATA product.
Limitation of Liability
1. Purchasers assume all liability associated with the use of this product.
2. HuMANDATA assumes no liability whatsoever for any direct, indirect, special, incidental, or consequential damages arising from the
use of this product, even if HuMANDATA has been advised of the possibility of such damage, whether legal or in tort.
3. At the time this product is purchased, items 1 and 2 above shall be deemed to have been confirmed by purchaser.
Trademarks and Other Considerations
1. This manual uses various companies’ trademarks in places.
2. HuMANDATA is this company’s registered trademark.
HuMANDATA’s Philosophy
1. HuMANDATA endeavors to raise product quality. We continually make detailed improvements and adjustments that are not shown
in circuit diagrams.
2. HuMANDATA actively publishes, on the Web and in other ways, information considered useful to customers. Examples would be
how to use FPGAs and how to use development tools.
3. HuMANDATA makes efforts for the long-term provision of products and for continuing their long-term support.
4. Instead of concealing small product problems and documentation errors, HuMANDATA makes them public.
5. HuMANDATA abides by Japanese law and its spirit. We make no transactions with purchasers who commit illegal acts
.
ACM-108 v1.0 1
Revision History
Revision History Revision History
Revision History
Date
Date Date
Date Revision
RevisionRevision
Revision
Description
Description Description
Description
Jan. 10, 2012 v1.0 Initial release
Introduction
Introduction Introduction
Introduction
Thank you for purchasing our product ACM-108 series.
This is an evaluation board equipped with an Altera FPGA Cyclone IV GX series,
voltage regulators, configuration reset circuit, oscillators and configuration device.
It provides you with very convenient and easy-to-use environment.
ACM-108 v1.0 2
1.
1.1.
1.
Unused Pins
Unused Pins Unused Pins
Unused Pins [IMPORTANT]
[IMPORTANT][IMPORTANT]
[IMPORTANT]
Some FPGA pins of this board are fixed to GND or VCCINT (1.2 V) to migrate
differences between FPGA device grades. Some VREF pins are connected to each
other. Therefore, these pins should not be used as user I/O port.
For more details, please refer to the circuit schematics.
GND
V12
VREFB
V09REF
R10
P10
P20
V9
R15
T15
W19
U12
N13
N14
N19
W10
M14
M15
M5
N15
P15
T3
M16
K14
R5
L16
H16
K17
K12
J16
P10
K13
T15
H15
J
12
To set options for all unused pins in Quartus II, please refer to the steps below:
1.
Open “Assignments” and click “Device”
2.
Click “Device and Pin Options…” button
3.
Open “Unused Pins” category
4.
Set “Reserve all unused pins” as “As input tri-stated”
ACM-108 v1.0 3
2.
2.2.
2.
Specifications
Specifications Specifications
Specifications
Model Name
Model Name Model Name
Model Name ACM-108-GX50 ACM-108-GX110 ACM-108-GX150
FPGA
FPGA FPGA
FPGA EP4CGX50
CF23C8N
EP4CGX110
CF23C8N
EP4CGX150
CF23C7N *
**
*
Config. Device
Config. Device Config. Device
Config. Device EPCS64SI16N (ALTERA, 64Mbit)
DDR2 SDRAM
DDR2 SDRAM DDR2 SDRAM
DDR2 SDRAM MT47H64M16HR-3:H (Micron, 1Gbit)
On-Board Clock
On-Board Clock On-Board Clock
On-Board Clock 30MHz, 50MHz
ALTGX Ref. Clock
ALTGX Ref. Clock ALTGX Ref. Clock
ALTGX Ref. Clock 125MHz (FOX Electronics)
External Clock Input
External Clock Input External Clock Input
External Clock Input User I/Os (CNA-11/12, CNB-11/12)
Power Input
Power Input Power Input
Power Input DC 3.3 [V]
User I/Os
User I/Os User I/Os
User I/Os 128
High speed serial I/F
High speed serial I/F High speed serial I/F
High speed serial I/F Tx: 2 ch, Rx: 2 ch
User Switches
User Switches User Switches
User Switches 2 (push x 1, slide x1)
User LEDs
User LEDs User LEDs
User LEDs 2
PCB
PCB PCB
PCB 8 Layer FR-4 t1.6 [mm] Immersion gold
Power-On Reset
Power-On Reset Power-On Reset
Power-On Reset 240 [ms] typ. (Configuration Reset Signal)
JTAG Connector
JTAG Connector JTAG Connector
JTAG Connector DIL 10-pin header, 2.54 [mm] pitch
Status LEDs
Status LEDs Status LEDs
Status LEDs Power (red), Done (blue)
Dimensions
Dimensions Dimensions
Dimensions 1.693" x 2.126" (43 x 54 [mm])
Weight
Weight Weight
Weight 20 [g] typ.
Accessories
Accessories Accessories
Accessories DIL 10 long pin header (mounted) x 1
FX10A-80S/8-SV(71) (Hirose) x 2
RoHS Compliance
RoHS Compliance RoHS Compliance
RoHS Compliance YES
* There may be cases when compatible parts are used.
* There may be cases when compatible parts are used. * There may be cases when compatible parts are used.
* There may be cases when compatible parts are used.
* Only for GX150, the Speed grade is 7.
* Only for GX150, the Speed grade is 7. * Only for GX150, the Speed grade is 7.
* Only for GX150, the Speed grade is 7.
ACM-108 v1.0 4
3.
3.3.
3.
Overview
Overview Overview
Overview
3.1.
3.1.3.1.
3.1.
Name of Parts
Name of Parts Name of Parts
Name of Parts
Component Side
Component Side Component Side
Component Side
Solder Side
Solder Side Solder Side
Solder Side
Done LED
Config. SW
User SW
Config. Device
JTAG
Oscillator
50 MHz
30 MHz
Power LED
FPGA
DDR2SDRAM
User SW
User LEDs
ALTGX
Ref.
Clock
Clock
User I/Os (
CN
A)
User I/Os (
CN
B)
ACM-108 v1.0 5
3.2.
3.2.3.2.
3.2.
Block Diagram
Block Diagram Block Diagram
Block Diagram
Gyclone IV GX
Gyclone IV GXGyclone IV GX
Gyclone IV GX
EP4CGX
EP4CGXEP4CGX
EP4CGX
50/110/150
50/110/15050/110/150
50/110/150
CF23C8/7N
CF23C8/7NCF23C8/7N
CF23C8/7N
Power LED (3.3V)
Power LED (3.3V)Power LED (3.3V)
Power LED (3.3V)
DONE LED
DONE LEDDONE LED
DONE LED
VIO(B) INPUT
VIO(B) INPUTVIO(B) INPUT
VIO(B) INPUT
3.3 V INPUT
3.3 V INPUT3.3 V INPUT
3.3 V INPUT
JTAG
JTAGJTAG
JTAG
Buffer
BufferBuffer
Buffer
64 GPIO
64 GPIO64 GPIO
64 GPIO
User LEDs
User LEDsUser LEDs
User LEDs
Oscillator
OscillatorOscillator
Oscillator
30 & 50MHz
30 & 50MHz30 & 50MHz
30 & 50MHz
Power Circuit
Power CircuitPower Circuit
Power Circuit
2.5V, 1.8V, 1.2V
2.5V, 1.8V, 1.2V2.5V, 1.8V, 1.2V
2.5V, 1.8V, 1.2V
2
22
2
JTAG
JTAGJTAG
JTAG
Config. Mode Switch
Config. Mode SwitchConfig. Mode Switch
Config. Mode Switch
ALTGX Ref. Clk
ALTGX Ref. ClkA LTGX Ref. Clk
ALTGX Ref. Clk
125MHz
125MHz125MHz
125MHz
Power-on Reset
Power-on ResetPower-on Reset
Power-on Reset
Config. Device
Config. DeviceConfig. Device
Config. Device
64Mbit
64Mbit64Mbit
64Mbit
ALTGX Tx Pair
ALTGX Tx PairALTGX Tx Pair
ALTGX Tx Pair
Push Switch x1
Push Switch x1 Pus h Switch x1
Push Switch x1
Slide Switch x1
Slide Switch x1Slide Switch x1
Slide Switch x1
Ext ernal CLK (option)
Ext ernal CLK (option)Ext ernal CLK (option)
Ext ernal CLK (option)
Use r I/Os CNB
Use r I/Os CNBUse r I/Os CNB
Use r I/Os CNB
ALTGX Rx Pair
ALTGX Rx PairALTGX Rx Pair
ALTGX Rx Pair
64 GPIO
64 GPIO64 GPIO
64 GPIO
ALTGX Tx Pair
ALTGX Tx PairALTGX Tx Pair
ALTGX Tx Pair
Use r I/Os CNA
Use r I/Os CNAUse r I/Os CNA
Use r I/Os CNA
ALTGX Rx Pair
ALTGX Rx PairALTGX Rx Pair
ALTGX Rx PairExt ernal CLK (option)
Ext ernal CLK (option)Ext ernal CLK (option)
Ext ernal CLK (option)
2
22
2
AC M-108 Rev.B
AC M-108 Rev.BAC M-108 Rev.B
AC M-108 Rev.B
DDR2SDRAM
DDR2SDRAMDDR2SDRAM
DDR2SDRAM
1Gbit
1Gbit1Gbit
1Gbit
3.3.
3.3.3.3.
3.3.
Power Supply
Power Supply Power Supply
Power Supply
This board operates from single DC 3.3 V power supply (V33A) from the CNA.
External power supply should be sufficient and stabilized. Please do not apply over
3.3V voltage. Internally required 2.5[V], 1.8[V] and 1.2[V] are generated by
on-board voltage regulators.
VIO(B) is not connected to the V33A. Please input arbitrary voltage into it.
On-board 2.5V can be applied by setting PJ1 (BANK5), PJ2 (BANK6).
For more details, please refer to circuit schematics and FPGA data sheet.
ACM-108 v1.0 6
3.4.
3.4.3.4.
3.4.
Clock
Clock Clock
Clock
Oscillators, 30 MHz (U8) and 50 MHz (U9), are equipped as on-board clock.
External clock can be input from user I/O connectors (CNA, CNB).
A 125 MHz oscillator is equipped as reference clock for high speed serial interface
(ALTGX).
3.5.
3.5.3.5.
3.5.
JTAG Connector
JTAG Connector JTAG Connector
JTAG Connector
This connector is used to configure the FPGA and program the
configuration device in-system. Pin assignment is as follows.
CN3
CN3 CN3
CN3
Net Label
Net Label Net Label
Net Label Signal Name
Signal NameSignal Name
Signal Name
JTAG Pin
JTAG Pin JTAG Pin
JTAG Pin Signal Name
Signal NameSignal Name
Signal Name
Net Label
Net Label Net Label
Net Label
XTCK TCK 1 2 GND GND
XTDO TDO 3 4 VCC (3.3 V) V33A
XTMS TMS 5 6 - -
- - 7 8 - -
XTDI TDI 9 10 GND GND
Please use attached long pin header when you connect with Altera download cable
to the JTAG connector.
Please pay attention not to attach cables in reverse.
Notice
Notice Notice
Notice
ACM-108 v1.0 7
4.
4.4.
4.
Configuration Switch (SW1)
Configuration Switch (SW1) Configuration Switch (SW1)
Configuration Switch (SW1)
The specification of configuration switch is below. “ON” means “Low (Ground)”.
For each pins details, please refer to Cyclone IV configuration user guide.
SW1
SW1 SW1
SW1
1 2
Net Label MSEL0 ASW1
Default ON OFF
Function Config. Mode User
Configuration Mode MSEL0
AS (Active Serial) OFF
PS (Passive Serial) ON
MSEL0
MSEL0 MSEL0
MSEL0
Configuration mode select pin.
ASW1
ASW1 ASW1
ASW1
You can use this as a user switch.
5.
5.5.
5.
FPGA Configuration
FPGA Configuration FPGA Configuration
FPGA Configuration
To configure the FPGA via JTAG directly, assign a sof file to
the FPGA detected by [Auto Detect].
If configuration is completed successfully, the DONE LED
will light up.
6.
6.6.
6.
Configuration Device Programming
Configuration Device Programming Configuration Device Programming
Configuration Device Programming
A jic (JTAG Indirect Configuration) file is required to download an FPGA
configuration data into the configuration device via JTAG. To generate a jic file using
Quartus II, please refer to the following steps.
ACM-108 v1.0 8
6.1.
6.1.6.1.
6.1.
Generating jic file
Generating jic file Generating jic file
Generating jic file
Start Quartus II, open [File] menu and click [Convert Programming Files..].
Programming File type : JTAG Indirect Configuration File (.jic)
Configuration device : EPCS64
File name : any
Memory Map File : unchecked
Set the FPGA device name to “Flash Loader” and your sof file to “SOF Data”.
6.2.
6.2.6.2.
6.2.
Programming Configuration Device
Programming Configuration Device Programming Configuration Device
Programming Configuration Device
Assign the jic file to the detected device and start programming. Please set a
configuration mode to AS mode.
ACM-108 v1.0 9
7.
7.7.
7.
FPGA Pin Assignment
FPGA Pin Assignment FPGA Pin Assignment
FPGA Pin Assignment
FPGA Banks are grouped into connector classes and named ” Bank group A/B”.
Vccio of the Bank group A is fixed at V33A (3.3V). Vccio of the Bank group B is
variable and can be applied from the CNB connector.
For more details, please refer to the pin list file. You can download it from the
support page.
FPGA
BANK Vccio NET LABEL BANK
Group NOTE
3 VCCO3 V18 - DDR2SDRAM
4
VCCO
4
V18
DDR2SDRAM
5
VCCO
5
VIO(B)
B
C
an be
switched
to V25 by
PJ1
6 VCCO6 VIO(B) B Can be switched to V25 by PJ2
7
VCCO
7
V33A
A
8
VCCO
8
V33A
A
9 VCCO9 V33A A No pins assigned
8.
8.8.
8.
Additional Documentation and User Support
Additional Documentation and User Support Additional Documentation and User Support
Additional Documentation and User Support
The following documents and other supports are available at
http://www.hdl.co.jp/en/spc/ACM/acm-108/
http://www.hdl.co.jp/en/spc/ACM/acm-108/http://www.hdl.co.jp/en/spc/ACM/acm-108/
http://www.hdl.co.jp/en/spc/ACM/acm-108/
Circuit Schematic
Pin List
Dimensional drawing
PCB drawing
Net List
… and more.
Cyclone IV GX FPGA Board
Cyclone IV GX FPGA BoardCyclone IV GX FPGA Board
Cyclone IV GX FPGA Board
ACM-108
User’s Manual
Ver. 1.0 ............................................. Jan. 10, 2012
Ver. 1.0 ............................................. Jan. 10, 2012 Ver. 1.0 ............................................. Jan. 10, 2012
Ver. 1.0 ............................................. Jan. 10, 2012
HuMANDATA LTD.
HuMANDATA LTD.HuMANDATA LTD.
HuMANDATA LTD.
Address: 1-2-10-2F, Nakahozumi, Ibaraki
Osaka, Japan
ZIP 567-0034
Tel: 81-72-620-2002 (Japanese)
Fax: 81-72-620-2003 (Japanese/English)
URL: http://www.hdl.co.jp/en/ (Global)
http://www.hdl.co.jp/ (Japan)
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Humandata ACM-108-GX110 User manual

Brand
Humandata
Model
ACM-108-GX110
Type
User manual
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