Sensoray Model 7405
STDbus Analog Output Card
01/10/2000
INSTRUCTION MANUAL
Sensoray Co., Inc.
7313 SW Tech Center Dr., Tigard, Oregon 97223
voice: 503.684.8005, fax: 503.684.8164, e-mail: [email protected]
www.sensoray.com
M A N U A L 4 2 6
Sensoray Model 7405 Instruction Manual — Page 2
Limited Warranty
Sensoray Company, Incorporated (Sensoray) warrants the
model 7405 hardware to be free from defects in material and
workmanship and perform to applicable published Sensoray
specifications for two years from the date of shipment to
purchaser. Sensoray will, at its option, repair or replace
equipment that proves to be defective during the warranty
period. This warranty includes parts and labor.
The warranty provided herein does not cover equipment
subjected to abuse, misuse, accident, alteration, neglect, or
unauthorized repair or installation. Sensoray shall have the
right of final determination as to the existence and cause of
defect.
As for items repaired or replaced under warranty, the
warranty shall continue in effect for the remainder of the
original warranty period, or for ninety days following date of
shipment by Sensoray of the repaired or replaced part,
whichever period is longer.
A Return Material Authorization (RMA) number must be
obtained from the factory and clearly marked on the outside
of the package before any equipment will be accepted for
warranty work. Sensoray will pay the shipping costs of
returning to the owner parts which are covered by warranty.
Sensoray believes that the information in this manual is
accurate. The document has been carefully reviewed for
technical accuracy. In the event that technical or
typographical errors exist, Sensoray reserves the right to
make changes to subsequent editions of this document
without prior notice to holders of this edition. The reader
should consult Sensoray if errors are suspected. In no event
shall Sensoray be liable for any damages arising out of or
related to this document or the information contained in it.
EXCEPT AS SPECIFIED HEREIN, SENSORAY MAKES
NO WARRANTIES, EXPRESS OR IMPLIED, AND
SPECIFICALLY DISCLAIMS ANY WARRANTY OF
MERCHANTABILITY OR FITNESS FOR A
PARTICULAR PURPOSE. CUSTOMER’S RIGHT TO
RECOVER DAMAGES CAUSED BY FAULT OR
NEGLIGENCE ON THE PART OF SENSORAY SHALL
BE LIMITED TO THE AMOUNT THERETOFORE PAID
BY THE CUSTOMER. SENSORAY WILL NOT BE
LIABLE FOR DAMAGES RESULTING FROM LOSS OF
DATA, PROFITS, USE OF PRODUCTS, OR
INCIDENTAL OR CONSEQUENTIAL DAMAGES,
EVEN IF ADVISED OF THE POSSIBILITY THEREOF.
Special Handling Instructions
The Model 7405 board contains CMOS circuitry that is
sensitive to Electrostatic Discharge (ESD). Special care
should be taken in handling, transporting, and installing the
7405 to prevent ESD damage to the board. In particular:
1. Do not remove the 7405 from its protective antistatic
bag until you are ready to install it in your computer.
2. Handle the 7405 only at grounded, ESD protected
stations.
3. Always turn off the computer before installing or
removing the 7405 board.
All brand, product and company names are trademarks or
registered trademarks of their respective owners.
Introduction
The Model 7405 board interfaces eight analog output
channels directly to the STDbus. Each channel may be
independently configured for either voltage or current
output. The voltage or current output from each channel is a
linear function of that channel’s applied digital value.
When programmed for voltage output, a channel will
generate a voltage between -10 and +10 volts. Careful
attention to circuit design on the Model 7405 makes this
voltage range possible, even when powering the STDbus
from ±12 volt power supplies.
Upon board reset, all channels are automatically initialized
to their appropriate zero-output conditions. Voltage-mode
channels default to zero volts out, and current-mode
channels reset to four milliamps out.
A 40-pin flat cable connector is provided for making
connections to the analog output channels. The connector
may be wired to an optional Sensoray Model 7409TB or
7409TC screw termination board, or to a termination system
customized for the target application.
Two STDbus I/O addresses are occupied by the Model 7405.
These two consecutive addresses may be mapped anywhere
in the STDbus eight-bit I/O address space.
Specifications
Specification Value
Input power
(excluding output drive)
±12.0 to ±15VDC, 80mA max.
+5.0VDC, 100mA max.
Operating temperature -25°C to +85°C
D/A resolution 12 bits
Channel update rate 20KHz, min. (single channel rate)
Output linearity error 0.03%, max.
Analog output modes Voltage out: ±10V
Current out: 4 to 20 mA
Sensoray Model 7405 Instruction Manual — Page 3
Hardware Configuration
The Model 7405 requires the installation of programming
shunts to select various options such as I/O port addresses
and channel operating modes. This section describes these
configuration options.
After configuring the option shunts, the Model 7405 may be
installed in your STDbus backplane and programmed as
explained in the Programming section of this manual.
Both board address and channel output types are established
by installing programming shunts at various locations on the
board. In all of the following discussions of shunt
programming, I denotes an installed programming shunt and
R indicates that no shunt is installed:
Defaults
All option jumpers are set to a standard default configuration
at the factory. If the default configuration is consistent with
your application, you may be able to use the board without
having to reconfigure any jumpers.
I/O Space
Two separate I/O spaces exist on the STDbus: primary and
expanded. Option jumper E8 selects which I/O space the
Model 7405 board will reside in. E8 is factory set to map the
board into primary space.
I/O Port Mapping
The Model 7405 occupies two consecutive 8-bit addresses in
the selected STDbus I/O address space. These ports may be
mapped to any even address from 0x00 to 0xFE. Jumpers
are factory installed to locate the board at ports 0xB2 and
0xB3.
The following tables show the jumper configurations for all
possible board addresses. Use the table on the left for the
most significant address nibble, and the table on the right for
the least significant address nibble.
Channel Mode
Each channel has three mode control option jumpers, used to
select either voltage or current output mode. A channel’s
mode control jumpers work as a set. For any given channel,
either all jumpers should be installed or all should be
removed. A jumper set should be installed to configure the
associated channel for current output. Conversely, the
jumper set should be removed to configure the channel for
voltage output.
For example, jumpers A3, B3 and D3 must all be installed to
configure channel 3 for the 4-20mA current output mode.
Jumpers A7, B7 and D7 must all be removed to configure
channel 7 for the ±10 volt output mode.
Programming
Programming of the Model 7405 is accomplished by means
of three STDbus interface registers. One register is used to
let the host processor know when new data may be sent to
the board. The other two registers receive a combination of
channel number and analog channel data from the host.
Symbol Meaning
I Shunt installed
R Shunt removed
Attribute Default
I/O base address 0xB2
I/O Space Primary
Analog channel mode Voltage out
E8 I/O Address Space
I Primary
R Expanded
E7 E6 E5 E4 Val E3 E2 E1 Val
I I I I 0 I I I 0
I I I R 1 I I R 2
I I R I 2 I R I 4
I I R R 3 I R R 6
I R I I 4 R I I 8
I R I R 5 R I R A
I R R I 6 R R I C
I R R R 7 R R R E
R I I I 8
R I I R 9
R I R I A
R I R R B
R R I I C
R R I R D
R R R I E
R R R R F
Channel Jumper Set
0 A0 B0 D0
1 A1 B1 D1
2 A2 B2 D2
3 A3 B3 D3
4 A4 B4 D4
5 A5 B5 D5
6 A6 B6 D6
7 A7 B7 D7
Sensoray Model 7405 Instruction Manual — Page 4
Programming Model
The Model 7405 board occupies two contiguous I/O ports in
the STDbus I/O space. Both ports may be written to, and the
base port has a read function as well.
Analog output data and channel number is written to the A
and B registers, while the status register is used by the host
processor for handshake control.
Note that the status register and A register share the same I/O
port address. This is possible because the status register is
read only while the A register is write only.
Status Register
The status register provides the host with a means for
monitoring Model 7405 handshake status. When the host
reads from the status port, a byte with the following form is
returned:
The status register contains two BUSY bits that are used to
handshake data onto the Model 7405 board. When both bits
are reset to logic 0, the board is ready to accept new data.
The remaining six bits are not used and should be ignored.
Prior to writing new data to the board, the host must read and
test the two BUSY bits. The host should write data to the
board only when both BUSY bits contain logic 0.
Although this handshake rule is simple, failure to observe it
will most likely result in communication errors.
Data Registers
Analog channel data may be written into the A and B
registers after ensuring that the status register handshake bits
are both reset to logic 0.
First the low data byte is written into the A register. Then
the B register is loaded with the high data nibble and channel
number.
Data Format
The analog channel data format is a function of the selected
output mode. Voltage mode employs a format different from
that of current mode. This table illustrates the relationship
between channel data value and signal output:
Connections
All output loads are connected to the Model 7405 through
40-pin flat cable connector P1. Optionally, loads may be
connected to the Model 7405TB screw termination board,
which in turn connects to P1 by means of flat ribbon cable.
Each channel has four dedicated pins on connector P1. Two
of the pins are used only in the voltage output mode, and the
other two only in current output mode. In addition, ground is
supplied on connector P1 pin 38 for use as a cable shield.
A channel circuit may be wired in one of two ways,
depending on the selected output mode (voltage versus
current). The following table specifies the proper connector
P1 pins to be used:
I/O
Address
Function
Read Write
Base Address + 0 Status Register A Register
Base Address + 1 (not used) B Register
BUSY
BUSY
Not Used
Channel can be written to
D7
D6 D5 D4
D3
D2 D1 D0
when these are both zero
X X X X XX
Data Value
(Hexadecimal)
Voltage Mode
Output (V)
Current Mode
Output (mA)
000 -10.000 4.0000
001 -9.9951 4.0039
002 -9.9902 4.0078
...
7FF -0.0049 11.996
800 0.0000 12.000
801 +0.0049 12.004
...
FFE +9.9902 19.996
FFF +9.9951 20.000
D7 D6 D5 D4 D3 D2
D1
D0
B Register A Register
0
Analog Output DataChannel
D7 D6 D5 D4 D3 D2
D1
D0
Sensoray Model 7405 Instruction Manual — Page 5
Channel connections should be made as illustrated in the
following diagram, regardless of the selected channel output
mode.
Calibration
Although the 7405 analog section is factory calibrated at
Sensoray, you may find that a periodic calibration is in order
to compensate for circuit drift over time. The board contains
nine trimpots in all, one offset trim for each channel and one
gain trim that is common to all channels.
The general strategy for board calibration is to first adjust the
gain trimpot, followed by the individual channel offset
adjustments. It is important that the final offset adjustments
be performed after configuring the channels for their target
operating modes.
Procedure
1. Configure analog channel 0 for voltage output mode by
removing programming shunts at A0, B0 and D0.
2. Connect a precision voltmeter to the channel 0 voltage
outputs. Connect the positive lead to P1 pin 2, and the
negative lead to P1 pin 4.
3. Set analog channel 0 output to 0 volts by programming
the channel data value to 800 hex.
4. Adjust the channel 0 offset trimpot until the voltmeter
reads 0 volts.
5. Set analog channel 0 output to -10 volts by
programming the channel data value to 000 hex.
6. Adjust the gain trimpot until the voltmeter reads -10
volts.
7. Configure the output modes of all eight channels as
required by your application.
8. For each voltage channel, connect the meter to the
channel voltage output pins on connector P1. Set the
output to 0 volts by programming the channel data value
to 800 hex. Adjust the channel offset trimpot until the
meter displays 0 volts.
9. For each current channel, connect a precision
milliammeter across the channel’s current output pins
on connector P1. Set the output to 4 mA by
programming the channel data value to 000 hex. Adjust
the channel offset trimpot until the meter displays 4 mA.
Board Layout
Chan
Voltage
Mode Pin
Current
Mode Pin
+ - + -
0 2 4 1 3
1 6 8 5 7
2 10 12 9 11
3 14 16 13 15
4 18 20 17 19
5 22 24 21 23
6 26 28 25 27
7 30 32 29 31
+pin
–pin
gnd
load
CH0
B0A0
CH1
B1A1
CH2
B2A2
CH3
B3A3
CH4
B4A4
CH5
B5A5
CH6
B6A6
CH7
B7A7
GAIN
P1
E8 7654321
D7 0654321
Sensoray Model 7405 Instruction Manual — Page 6
Sample Drivers
These sample driver functions, written in C/C++, assume that all channels are configured for the voltage output mode. With
minor modification, these drivers can be made to work with channels that are set up for current output mode operation.
#define BUSY 0xC0 // Handshake status bit mask
typedef unsigned char UCHAR;
UCHAR InByte( UCHAR address )
{
// INSERT CODE HERE THAT WILL RETURN A VALUE FROM AN 8-BIT I/O PORT
}
void OutByte( UCHAR address, UCHAR value )
{
// INSERT CODE HERE THAT WILL WRITE A VALUE TO AN 8-BIT I/O PORT
}
void WriteVoltage( UCHAR baseport, UCHAR channel, double volts )
{
// Limit voltage to legal values.
double voltage = (volts > 9.995) ? 9.995 : ( (volts < -10.0) ? -10.0 : volts );
// Convert voltage value to binary value suitable for DAC.
short value = (short)( 2048 + voltage * 204.8 );
// Wait until Model 7405 board is ready to accept data.
do {} while ( InByte(baseport) & BUSY );
// Write binary value to Model 7405 board.
OutByte( baseport, value & 0xFF );
OutByte( baseport + 1, ((channel << 4) & 0x70) | ((value >> 8) & 0x0F) );
}
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
A A
B B
C C
D D
ZERO REGISTER
MEM ADRS REG
STATE
REGISTER
ADDRESS
BOARD
SELECT
JUMPERS
INSTALL
FOR
CURRENT
OUTPUT
0500067S B
MODEL 7405 STD 8-CHANNEL DAC
SENSORAY COMPANY, INCORPORATED
B
1 2Monday, December 16, 1996
Title
Size Document Number Rev
Date: Sheet of
SHEET 2
500067S2
+12V
-12V
DGND
D[0..11]
AGND
SAMPLE*
A[1..3]
BUSY
S0* S0
S1
S2
BUSY* S3
CLK
SRST*
WSTATE*
IOEXP
AB1 GZERO*
AB2
AB3
AB4
AB5
AB6 GLO*
AB7
IORQ* CLK SRST*
DB0 BUSY
DB1 S0 WSTATE*
DB2 S1 SAMPLE*
DB3 BDSEL* S2 GZERO*
DB4 S3 MARCNT
DB5 SYSRD* ARST* WMAR*
DB6 SYSWR* WLO* WRAM*
DB7 AB0 GSTAT* GLO*
LBUSY* GHI*
AB0 LBUSY
AB1 WHI*
AB2
AB3 S3
AB4
AB5
AB6 ARST*
AB7
GRAM* S3
A0
CLK DB7 BUSY* XA0 A1
DB6 LBUSY* XA1 A2
XA2 A3
GSTAT* T0
T1 T0
CLK T2 T1
WMAR* T3 T2
DB0 D0 SRST* T4 T3
DB1 D1 T5 T4
DB2 D2 T6 T5
DB3 D3 T7 T6
DB4 XA0 T7
DB5 XA1 A1
DB6 XA2 A2
DB7 A3 SAMPLE*
A0 T0
GHI* T1
WHI* T2
T3
T4
T5
A0 D0 T6
DB0 D0 A1 D1 T7
DB1 D1 A2 D2
DB2 D2 A3 D3
DB3 D3 D4 D0
DB4 D4 D5 D1
DB5 D5 D6 D2
DB6 D6 D7 D3
DB7 D7 D4 D0 D8
D5 D1 D9
GLO* D6 D2 D10
WLO* D7 D3 D11
GRAM* A0
WRAM*
A[0..3]
T[0..7]
A[1..3]
D[0..11]
RCO
+5V
+5V
+5V
+5V
+5V
+12V
-12V
+5V
+12V
-12V
+5V
+12V
-12V
U26
74HCT374
3
4
7
8
13
14
17
18
1
11
2
5
6
9
12
15
16
19
D0
D1
D2
D3
D4
D5
D6
D7
OC
CLK
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
U23
74HCT374
3
4
7
8
13
14
17
18
1
11
2
5
6
9
12
15
16
19
D0
D1
D2
D3
D4
D5
D6
D7
OC
CLK
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
U17
74HCT138
1
2
3
6
4
5
15
14
13
12
11
10
9
7
A
B
C
G1
G2A
G2B
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
U13
74HC368
2
4
6
10
12
14
1
15
3
5
7
9
11
13
1A1
1A2
1A3
1A4
2A1
2A2
1G
2G
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
U27
74HCT688
2
4
6
8
11
13
15
17
3
5
7
9
12
14
16
18
1
19
P0
P1
P2
P3
P4
P5
P6
P7
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
G
P=Q
U21
8416
8
7
6
5
4
3
2
1
23
22
19
18
20
21
9
10
11
13
14
15
16
17
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
CE
OE
WE
D0
D1
D2
D3
D4
D5
D6
D7
U16
74HC174
3
4
6
11
13
14
9
1
2
5
7
10
12
15
D1
D2
D3
D4
D5
D6
CLK
CLR
Q1
Q2
Q3
Q4
Q5
Q6
U19
74HC151
4
3
2
1
15
14
13
12
11
10
9
7
6
5
D0
D1
D2
D3
D4
D5
D6
D7
A
B
C
G
W
Y
U22
74HC163
3
4
5
6
7
10
2
9
1
14
13
12
11
15
A
B
C
D
ENP
ENT
CLK
LOAD
CLR
QA
QB
QC
QD
RCO
U24
74HC163
3
4
5
6
7
10
2
9
1
14
13
12
11
15
A
B
C
D
ENP
ENT
CLK
LOAD
CLR
QA
QB
QC
QD
RCO
P2
*
1
2
3
4
5
13
11
9
7
14
12
10
8
29
27
25
23
21
19
17
15
30
28
26
24
22
20
18
16
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
6
+5V
+5V
DGND
DGND
VBB1
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
WR
RD
IORQ
MEMRQ
IOEXP
MEMEX
RFSH
MSYNC
STAT1
STAT0
BUSAK
BUSRQ
INTAK
INTRQ
WAITRQ
NMIRQ
SYSRESET
PBRESET
CLOCK
CNTRL
PCO
PCI
AGND
AGND
+12V
-12V
VBB2
U20
74HC244
2
4
6
8
11
13
15
17
1
19
18
16
14
12
9
7
5
3
1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4
1G
2G
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
RN1
10K-SIP
1
2
3
4
5
6
7
8
9
10
C55 C59 C50 C51 C56 C60 C53 C48
D1
D2
D3
D4
D5
D6
D7
D8
RN2
10K-SIP
1
2
3
4
5
6
7
8
9
10
C63
10uF,20V
C6 C25 C26 C7 C27 C8 C28 C42 C43
C64
10uF,20V
C5
0.1uF
C14 C33 C34 C15 C35 C16 C36 C49 C41C13
0.1uF
C62
10uF,20V
U28 22V10
1
2
3
4
5
6
7
8
9
10
11
13
23
22
21
20
19
18
17
16
15
14
I1/CLK
I2
I3
I4
I5
I6
I7
I8
I9
I10
I11
I12
O1
O2
O3
O4
O5
O6
O7
O8
O9
O10
E8
E1
E2
E3
E4
E5
E6
E7
U25B
74HC00
4
5
6
U25A
74HC00
1
2
3
U25D
74HC00
12
13
11
U25C
74HC00
9
10
8
R77
1K
C47 3300pF
1
0400067
RevB
C52C54C57C58C61
1
EJECTOR
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
A A
B B
C C
D D
VOLTAGE REFERENCE
SAMPLE/HOLD
GAIN
INSTALL FOR
CURRENT OUTPUT
3.750V
0500067S B
MODEL 7405 STD 8-CHANNEL DAC
SENSORAY COMPANY, INCORPORATED
B
2 2Tuesday, January 21, 1997
Title
Size Document Number Rev
Date: Sheet of
VR0 VI0
VR1 VI1 VI0 VI1 VI2
V0 V1 V2
VR2 VI2
VRJUNCT VR3 VI3
VR4 VI4
VR5 VI5
VR6 VI6
VR7 VI7
CH7 VI7
CH6 VI6
CH5 VI5
PH0
CH4 VI4
PH1 PH2
CH3 VI3 PL0 PL1 PL2
CH2 VI2
CH7
CH6 CH1 VI1
A3 CH5
A2 CH4 CH0 VI0
A1 CH3
CH2
CH1 VI3 VI4 VI5
CH0 V3 V4 V5
PH3 PH4 PH5
PL3 PL4 PL5
PH0 V0
PL0
PH1 V1
PL1
VI6 VI7 PH2 V2
V6 V7 PL2
PH3 V3
PL3
PH4 V4
PL4
D0 PH5 V5
D1 PL5
D2 PH6 V6
D3 PL6
D4 PH7 V7
D5 PL7
D6
D7
D8
D9
D10
D11
PH6 PH7
PL6 PL7
A[1..3]
D[0..11]
-12V
VREF
+12V
+12V
+12V
VREF
VREF
VREF VREF
VREF
VREF VREF
VREF
+12V
+12V
+12V +12V
+12V
+12V
+12V
+12V
VREF*
VREF*
VREF* VREF*
VREF*
VREF* VREF*
VREF*
+12V
VREF
VREF*
VREF
VREF*
+12V
VREF
VREF*
+12V
-12V
+12V
-12V
+12V
-12V
+12V
-12V
+12V
-12V
+12V
-12V
+12V
-12V
+12V
-12V
+12V
-12V
-12V
-12V
-12V
U12
SMP-08
13
14
15
12
1
5
2
4
3
11
10
9
6
16
7
8
X0
X1
X2
X3
X4
X5
X6
X7
X
A
B
C
E
VDD
VEE
GND
C44
0.1uF
R29
R61
R30
R62
R31
R63
R32
R67
3.40K,0.1%
R68
10.2K,0.1%
R75
R74
R76
R73
R71
R72
R69
R70
10.0K,0.1%
R64
R78
10.0K,1%
R79
10.0K,1%
R65
10.0K,1%
GAIN
500-POT
Q1
MPS6601
R21
6.81K,0.1%
P1
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
R13
19.6K,0.1%
C22
0.01uF
Q6
MPS6601
R34 20.0,0.1%
C38
0.01uF
R38
1.00K,0.1%
R54
6.81K,0.1%
C30
0.01uF
R46
19.6K,0.1%
R50 3.83K,0.1%
C4
0.01uF
Q4
MPS6601
R4 20.0,0.1%
C20
0.01uF
R8
1.00K,0.1%
R24
6.81K,0.1%
C12
0.01uF
R16
19.6K,0.1%
R20 3.83K,0.1%
C21
0.01uF
Q5
MPS6601
R33 20.0,0.1%
C37
0.01uF
R37
1.00K,0.1%
R53
6.81K,0.1%
C29
0.01uF
R45
19.6K,0.1%
R49 3.83K,0.1%
C3
0.01uF
Q3
MPS6601
R3 20.0,0.1%
C19
0.01uF
R7
1.00K,0.1%
R23
6.81K,0.1%
C11
0.01uF
R15
19.6K,0.1%
R19 3.83K,0.1%
C24
0.01uF
Q8
MPS6601
R36 20.0,0.1%
C40
0.01uF
R40
1.00K,0.1%
R56
6.81K,0.1%
C32
0.01uF
R48
19.6K,0.1%
R52 3.83K,0.1%
C2
0.01uF
Q2
MPS6601
R2 20.0,0.1%
C18
0.01uF
R6
1.00K,0.1%
R22
6.81K,0.1%
C10
0.01uF
R14
19.6K,0.1%
R18 3.83K,0.1%
C23
0.01uF
Q7
MPS6601
R35 20.0,0.1%
C39
0.01uF
R39
1.00K,0.1%
R55
6.81K,0.1%
C31
0.01uF
R47
19.6K,0.1%
R51 3.83K,0.1%
Q10
MPS6601
C46
0.1uF
R80 3.3K
U14
LM336
C9
0.01uF
R17
3.83K,0.1%
R5
1.00K,0.1%
C1
0.01uF
C17
0.01uF
R1
20.0,0.1%
CH0
10K-POT
B0
CH1
10K-POT
B1
CH2
10K-POT
B2
B5
CH5
10K-POT
B4
CH4
10K-POT
CH3
10K-POT
B3
CH6
10K-POT
B6
CH7
10K-POT
B7
A0
A1
A2
A3
A4
A5
A6
A7
R66
10.0K,1%
C45
0.1uF
R25
1M
R58
1M
R28
1M
R60
1M
R27
1M
R57
1M
R26
1M
R59
1M
R9
100
R41
100
R10
100
R42
100
R11
100
R43
100
R12
100
R44
100
+
-
U11B
MC34082
5
6
7
+
-
U1A
MC34082
3
2
1
+
-
U1B
MC34082
5
6
7
+
-
U5A
MC34082
3
2
1
+
-
U5B
MC34082
5
6
7
+
-
U2B
MC34082
5
6
7
+
-
U2A MC34082
3
2
1
+
-
U7A MC34082
3
2
1
+
-
U7B
MC34082
5
6
7
+
-
U3A
MC34082
3
2
1
+
-
U3B
MC34082
5
6
7
+
-
U6A
MC34082
3
2
1
+
-
U6B
MC34082
5
6
7
+
-
U4A
MC34082
3
2
1
+
-
U4B
MC34082
5
6
7
+
-
U8A
MC34082
3
2
1
+
-
U9A
MC34082
3
2
1
+
-
U9B
MC34082
5
6
7
+
-
U11A
MC34082
3
2
1
+
-
U8B
MC34082
5
6
7
U18
AD7845
14
13
11
10
9
8
7
6
5
4
3
2
16
15
12
24
23
22
21
20
19
17
1
18
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
CS
WR
DGND
RFB
RC
RB
RA
VDD
VSS
VREF
VOUT
AGND
Q9
2N4403
D[0..11]
A[1..3]
SAMPLE*
+12V
-12V
AGND
DGND
/
