GPT MOTOROLA
REFERENCE MANUAL vii
Figure Title Page
1-1 GPT Block Diagram ........................................................................................ 1-1
1-2 Input Capture Simplified Block Diagram ......................................................... 1-4
1-3 Output Compare Simplified Block Diagram ....................................................1-5
1-4 Pulse Accumulator Simplified Block Diagram ................................................ 1-6
1-5 Pulse-Width Modulation Example .................................................................. 1-7
1-6 Pulse-Width Modulation Simplified Block Diagram ........................................ 1-8
2-1 Function Signal Groups ..................................................................................2-1
3-1 Compare/Capture Unit Block Diagram ........................................................... 3-2
3-2 Input Capture Timing Example .......................................................................3-4
3-3 Input Capture Register 1–3 (TIC1–3) ............................................................. 3-5
3-4 Input Capture 4/Output Compare 5 Register (TI4/O5) ................................... 3-5
3-5 Timer Control Register 2 (TCTL2) ..................................................................3-5
3-6 Timer Control Register 1 (TCTL1) ..................................................................3-7
3-7 Output Compare Registers (TOC1–4/TI4/O5) ................................................ 3-8
3-8 Action Mask and Action Data Registers (OC1M/OC1D) ................................ 3-8
3-9 Timer Compare Register (CFORC) ................................................................3-9
4-1 Pulse Accumulator Block Diagram ................................................................. 4-2
4-2 Pulse Accumulator Control Register/Pulse Accumulator Counter .................. 4-3
5-1 Prescaler Block Diagram ................................................................................5-1
6-1 PWM Block Diagram ...................................................................................... 6-2
6-2 Fast/Slow Mode .............................................................................................. 6-3
6-3 PWM Control Register (PWMC) .....................................................................6-4
7-1 ARB Bits of MCR ............................................................................................7-2
7-2 GPT Interrupt Vector Generation ................................................................... 7-2
7-3 GPT Interrupt Configuration Register (ICR) ................................................... 7-3
7-4 Timer Interrupt Flag Registers (TFLG1/TFLG2) .............................................7-5
7-5 Timer Interrupt Mask Registers 1–2 (TMSK1/TMSK2) ................................... 7-6
8-1 Parallel Data Direction/Parallel Data Registers (PDDR/PDR) ........................ 8-1
8-2 PAIS and PCLKS Bits ....................................................................................8-2
8-3 Force PWM Bits ............................................................................................. 8-2
9-1 Module Configuration Register (MCR) ........................................................... 9-3
10-1 Motor Control Example ................................................................................. 10-2
10-2 Engine Control Example ............................................................................... 10-3
11-1 Input Signal Conditioner Timing ................................................................... 11-1
11-2 Pulse Accumulator — Event Counting Mode (Leading Edge) ...................... 11-2
11-3 Pulse Accumulator — Gated Mode (Count while Pin High) ......................... 11-3
11-4 Pulse Accumulator — Using TOF as Gated Mode Clock .............................11-4
11-5 PWMx (PWMx Register = 01, Fast Mode) ................................................... 11-4
11-6 Output Compare (Toggle Pin State) .............................................................11-5
11-7 Input Capture (Capture on Rising Edge) ...................................................... 11-6
11-8 General-Purpose Input ................................................................................. 11-7
LIST OF ILLUSTRATIONS
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cale Semiconductor,
I
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