WinSystems PXM-C388-S User manual

Category
PC/workstation barebones
Type
User manual
WinSystems, Inc.
715 Stadium Drive
Arlington, TX 76011
http://www.winsystems.com
PXM-C388-S
PC/104-compatible 1.66 GHz Intel
®
ATOM
TM
-based
SBC with Video, Ethernet, and Stackable SUMIT
TM
PCI
Express PC/104 Modules Expansion
PRODUCT MANUAL
140729 PRODUCT MANUAL PXM-C388-S 2
Revision Date Code ECO Number
120514 Initial Release
120523
120806
120820
121113
130206
130404
130710
130724
140729 14-69
MANUAL REVISION HISTORY
P/N 400-388-000
140729 PRODUCT MANUAL PXM-C388-S 3
TABLE OF CONTENTS
BEFORE YOU BEGIN 6
Visual Index - Top View (Connectors) 7
Visual Index - Top View (Jumpers & LEDs) 8
Visual Index - Bottom View 9
Jumper Reference 10
INTRODUCTION 11
FEATURES 11
System 12
Memory 12
FUNCTIONALITY 13
I/O Port Map 13
Interrupt Map 15
Watchdog Timer 16
Real-Time Clock/Calendar 16
CONNECTOR REFERENCE 17
POWER 17
J37 - Power 17
JP14 - Power Supply Selection 18
BATTERY BACKUP 19
J31 - External Battery 19
VIDEO 20
J33 - ANALOG VGA 20
J20 - LVDS 21
J24 - Backlight Power 22
AUDIO 23
J20 - Audio 23
BZ1 - Speaker 23
SERIAL 24
J34 - COM1, COM2, COM3, COM4 24
COM1, COM2, COM3, COM4 [DB9 Male] 24
USB 26
J4, J5 - USB 26
SERIAL ATA 27
J25 - SATA 27
COMPACTFLASH 27
J28 - CompactFlash 27
STATUS LED 27
D53 - CompactFlash and SATA Activity 27
D55 - 3.3 VSB Present 27
D6 - User LED 27
140729 PRODUCT MANUAL PXM-C388-S 4
ETHERNET 28
J35 - Gigabit Ethernet 28
J36 - Ethernet LED 28
DIGITAL I/O 29
J9 - GPIO 29
Register Denitions (WS16C48) 30
Register Details 30
PC/104 BUS 32
J17A, J17B - PC/104 32
SUMIT
TM
INTERFACE 33
J29, J30 - SUMIT 33
BIOS SUPPLEMENTAL 34
BIOS SETTINGS STORAGE OPTIONS 57
JP19 - EEPROM Enable 57
CABLES 59
SOFTWARE DRIVERS 60
SPECIFICATIONS 61
MECHANICAL DRAWING 62
APPENDIX - A 66
BEST PRACTICES 66
APPENDIX - B 70
POST CODES 70
WARRANTY INFORMATION 75
140729 PRODUCT MANUAL PXM-C388-S 5
This page has been left intentionally blank.
140729 PRODUCT MANUAL PXM-C388-S 6
BEFORE YOU BEGIN
WinSystems offers best practice recommendations for using and handling WinSystems embedded PCs. These methods
include valuable advice to provide an optimal user experience and to prevent damage to yourself and/or the product.
YOU MAY VOID YOUR WARRANTY AND/OR DAMAGE AN EMBEDDED PC BY FAILING TO COMPLY WITH THESE
BEST PRACTICES.
Reference Appendix - A for Best Practices.
For any questions you may have on WinSystems products, contact our Technical Support Group at (817) 274-7553, Monday
through Friday, between 8 AM and 5 PM Central Standard Time (CST).
Please review these guidelines carefully and follow them to ensure
you are successfully using your embedded PC.
This product ships with a heat sink. Product warranty is void if the
heat sink is removed from the product.
140729 PRODUCT MANUAL PXM-C388-S 7
Visual Index - Top View (Connectors)
NOTE: The reference line to each component part has been drawn to Pin 1, and is also highlighted with a square, where applicable.
RESERVED -
J36
Ethernet LED
J17B
PC/104 (C/D)
J17A
PC/104 (A/B)
J9
Digital I/O
J34
Serial I/O
(COM1/2/3/4)
J4
USB
(4/5/6/7)
J5
USB
(2/3/8/9)
J35
Ethernet
J24
Backlight Power
J29
SUMIT (A)
J30
SUMIT (B)
J31
External
Battery
J37
Power
J33
Analog VGA
J20
LVDS/Audio
140729 PRODUCT MANUAL PXM-C388-S 8
D55
3.3VSB Present
Visual Index - Top View (Jumpers & LEDs)
NOTE: The reference line to each component part has been drawn to Pin 1, and is also highlighted with a square, where applicable.
RESERVED - JP3
JP19
EEPROM Enable
JP13
LVDS Panel
Power
JP14
AT/ATX Power
Supply Selection
D53
CompactFlash
and SATA
Activity
D6
User LED
JP15
AT/ATX Power
Selection +5VSB
140729 PRODUCT MANUAL PXM-C388-S 9
Visual Index - Bottom View
NOTE: The reference line to each component part has been drawn to Pin 1, and is also highlighted with a square, where applicable.
RESERVED -
J28
CompactFlash
204
Memory
J25
SATA1
140729 PRODUCT MANUAL PXM-C388-S 10
Jumper Reference
NOTE: Jumper Part# SAMTEC 2SN-BK-G is applicable to all jumpers. These are available in a ten piece kit from
WinSystems (Part# KIT-JMP-G-200).
JP19 - EEPROM Enable
EEPROM Enable JP19
CMOS EEPROM Enable (default) 1-2
CMOS EEPROM Disable Open
JP19
1
2
1 2 3
5V
LVDS Panel Power Enable
3.3V
JP13 - LVDS Power
1
2
5VSB
PWRBTN
JP14
JP14 - Power Selection
Avoid Simultaneous Jumpering of pins 1-2 and 2-3.
Misjumpering panel power causes damage to the
board and/or the Flat Panel.
LVDS Enable (default) 1-2
LVDS Disable 2-3
NOTE: Both jumpers need to be installed for AT mode.
1
2
5VSB
5VCC
JP15 (Rev. B only)
140729 PRODUCT MANUAL PXM-C388-S 11
INTRODUCTION
This manual is intended to provide the necessary information regarding conguration and usage of the PXM-C388 single
board computer. WinSystems maintains a Technical Support Group to help answer questions not adequately addressed
in this manual. Contact Technical Support at (817) 274-7553, Monday through Friday, between 8 AM and 5 PM Central
Standard Time (CST).
FEATURES
CPU
Intel
®
ATOM™ N455 single core @ 1.66 GHz
Compatible Operating Systems
Linux, Windows, and other x86 compatible OS
Memory
Up to 2 GB of DDR3 SODIMM (Socketed)
BIOS
Phoenix
Video
Analog VGA resolution up to SXGA 1400x1050
LVDS 18-bit support up to 1366x768 or 1280x800
Simultaneous LVDS and CRT video supported
Ethernet
Intel
®
10/100/1000 Mbps controller (ICH8M)
Storage
1 SATA (2.0) channel
CompactFlash Types I and II memory socket supported
Digital I/O
24 GPIO with event sense
Bus Expansion
PC/104
SUMIT
Serial I/O
4 Serial ports (2 RS-232, 2 RS-232/422/485)
USB
8 USB 2.0 ports
Watchdog Timer
Adjustable from 1 second to 255 minute reset
Audio
Stereo supported
140729 PRODUCT MANUAL PXM-C388-S 12
System
WinSystems’ PXM-C388 is a SUMIT-ISM Single Board Computer (SBC) with PC/104 expansion that uses Intel’s ATOM
N455 single core 1.66 GHz processor paired with the ICH8M controller hub.
The SBC is a full-featured unit with on-board I/O that supports CRT/LVDS simultaneously, Gigabit Ethernet port, eight
USB 2.0 ports, two serial RS-232/422/485 COM channels, two serial RS-232 COM channels, 24 digital I/O lines with
event sense, HD audio, watchdog timer, and two SUMIT connectors. Plus it has a PC/104 connector for additional I/O
expansion.
Memory
The PXM-C388 board supports up to 2 GB DDR3 SODIMM system memory via an on-board socket located at U9.
Power
5V required, 2.5A typical
Industrial Operating Temperature
-40°C to 85°C
Mechanical
Dimensions: 4.6” x 3.8” (116 mm x 96 mm)
Weight: 7.2 oz (204g)
(for PXM-C388-S1-0-0)
Additional Features
RoHS compliant
LED Backlight supported
Custom splash screen on start-up
Real-time clock/calendar
140729 PRODUCT MANUAL PXM-C388-S 13
FUNCTIONALITY
The PXM-C388 is well suited for directly upgrading existing PC/104-based designs with Intel’s Atom processor family. It
blends high-speed serial bus expansion with legacy PC/104 I/O module migration to strike a balance of high-integration
computing power for existing cost-effective applications requiring relays, digital I/O and low-to-moderate speed analog I/O.
I/O Port Map
Following is a list of I/O ports used on the PXM-C388-S.
NOTE: The PXM-C388-S uses a PnP BIOS resource allocation. Care must be taken to avoid contention with resources
allocated by the BIOS.
HEX Range Usage
0000h-001Fh DMA Controller 82C37
0020h-0021h Interrupt Controller PIC 8259
0024h-0025h Interrupt Controller
0028h-0029h Interrupt Controller
002Ch-002Dh Interrupt Controller
002Eh-002Fh Forward to Super IO
0030h-0031h Interrupt Controller
0034h-0035h Interrupt Controller
0038h-0039h Interrupt Controller
003Ch-003Dh Interrupt Controller
0040h-0043h Timer counter 8254
004Eh-004Fh Forward to Super IO
0050h-0053h Timer counter 8254
0060h Keyboard data port
0061h NMI controller
0062h 8051 download 4K address counter
0064h Keyboard status port
0066h 8051 download 8-bit data port
0070h-0077h RTC Controller
0080h-0091h DMA Controller
0092h Reset Generator
0093h-009Fh DMA Controller
00A0h-00A1h Interrupt Controller PIC 8259
00A4h-00A5h Interrupt Controller
00A8h-00A9h Interrupt Controller
0ACh-00ADh Interrupt Controller
00B0h-00B1h Interrupt Controller
00B2h-00B3h Power Management
00B4h-00B5h Interrupt Controller
00B8h-00B9h Interrupt Controller
00C0h-00DFh DMA Controller 82C37
00F0h FERR#/IGNNE/Interrupt Controller
0140h-01FFh Reserved *
0170h-0177h IDE1 Controller
0180h-01FFh Reserved
0298h-029Bh Reserved for Super I/O Conguration
029C Interrupt Status Register
029D Status LED Register
140729 PRODUCT MANUAL PXM-C388-S 14
HEX Range Usage
029E-029F Watchdog Timer Control
02E8h-02EFh COM4 (Default)
02F8h-02FFh COM2 (Default)
0340h-03E7h Reserved *
0376h IDE1 Controller
0378h-037Bh Reserved
03E8h-03EFh COM3 (Default)
03F0h-03F5h Reserved
03F6h IDE0 Controller
03F8h-03FFh COM1 (Default)
This product utilizes a LPC to ISA Bridge to address the PC/104 bus. The majority of legacy PC/104 modules are I/O
mapped and function as expected. However, neither DMA nor memory mapped PC/104 modules are supported with this
product. The PC/104-Plus PCI signals are completely supported.
* The ICH8M limits the LPC (ISA) decode ranges to four windows, two of which can be adjusted in the BIOS. For
example, the 0300-033Fh range can be changed to 0600-06FFh so the full 256 bytes are available for PC/104 modules.
Resources addressed internally may still exist in these ranges so please check the I/O map for availability.
The advanced watchdog timer is the only on-board device affected by adjusting LPC (ISA) decode range. It will not be
available if the 0564-0568h decode range is disabled.
The default is for the PC/104 decode ranges are shown below. Please contact an Applications Engineer if you have
questions regarding the decode ranges.
0100-013Fh 64 Bytes (Fixed)
0200-02FFh 256 Bytes (Fixed)
0300-033Fh 64 Bytes (BIOS Selectable)
0500-05FFh 256 Bytes (BIOS Selectable)
140729 PRODUCT MANUAL PXM-C388-S 15
Interrupt Status Register - 29CH
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
N/A N/A N/A N/A COM4 COM3 COM2 COM1
Note: A 1 will be read for the device(s) with an interrupt pending.
Interrupt Map
WinSystems does not provide software support for implementing the Interrupt Status
Register to share interrupts. Some operating systems, such as Windows XP and Linux,
have support for sharing serial port interrupts and examples are available. The user will
need to implement the appropriate software to share interrupts for the other devices.
Hardware Interrupts (IRQs) are supported for both PC/104 (ISA), PCI and PCIe devices. The user must reserve IRQs in
the BIOS CMOS conguration for use by legacy devices. The PCIe/PnP BIOS will use unreserved IRQs when allocating
resources during the boot process. The table below lists IRQ resources as used by the PXM-C388-S.
IRQ0 18.2 Hz heartbeat
IRQ1 Keyboard
IRQ2 Chained to Slave controller (IRQ9)
IRQ3 COM2 *
IRQ4 COM1 *
IRQ5 COM3 *
IRQ6 COM4 *
IRQ7 LPT *
IRQ8 Real Time Clock
IRQ9 FREE **
IRQ10 Digital I/O
IRQ11 PCI Interrupts
IRQ12 Mouse
IRQ13 Floating point processor
IRQ14 IDE
IRQ15 IDE
*
These IRQ references are default settings that can be changed by the user in the CMOS Settings
utility. Reference the Super I/O Control section under Intel.
**
IRQ9 is commonly used by ACPI when enabled and may be unavailable (depending on operating
system) for other uses.
*** IRQ15 is currently unavailable under the Windows operating systems.
Some IRQs can be freed for other uses if the hardware features they are assigned to are not being
used. To free an interrupt, use the CMOS setup screens to disable any unused board features or their
IRQ assignments.
140729 PRODUCT MANUAL PXM-C388-S 16
Watchdog Timer
The PXM-C388 features an advanced watchdog timer which can be used to guard against software lockups. Two
interfaces are provided to the watchdog timer. The Advanced interface is the most exible and recommended for new
designs. The other interface option is provided for software compatibility with older WinSystems single board computers.
Advanced
The watchdog timer can be enabled in the BIOS Settings by entering a value for Watchdog Timeout on the Intel → Super
I/O Control screen. Any non-zero value represents the number of minutes prior to reset during system boot. Once the
operating system is loaded, the watchdog can be disabled or recongured in the application software.
NOTE: It is recommended that a long timeout be used if the watchdog is enabled when trying to boot any operating
system.
The watchdog can be enabled, disabled or reset by writing the appropriate values to the conguration registers located
at I/O addresses 565h and 566h. The watchdog is enabled by writing a timeout value other than zero to the I/O address
566h and disabled by writing 00h to this I/O address. The watchdog timer is serviced by writing the desired timeout value
to I/O port 566h. If the watchdog has not been serviced within the allotted time, the circuit resets the CPU.
The timeout value can be set from 1 second to 255 minutes. If port 565h bit 7 equals 0, the timeout value written into I/O
address 566h is in minutes. The timeout value written to address 566h is in seconds if port 565 bit 7 equals 1.
Port Address Port Bit 7 Value Port Address Value Reset Interval
565H x 566H 00h DISABLED
565H 1 566H 03h 3 SECONDS
565H 1 566H 1Eh 30 SECONDS
565H 0 566H 04h 4 MINUTES
565H 0 566H 05h 5 MINUTES
Software watchdog timer PET = PORT 566H, write the timeout value.
Watchdog Timer Examples
Real-Time Clock/Calendar
A real-time clock is used as the AT-compatible clock/calendar. It supports a number of features including periodic and
alarm interrupt capabilities. In addition to the time and date keeping functions, the system conguration is kept in CMOS
RAM contained within the clock section. A battery must be enabled for the real-time clock to retain time and date during a
power down.
140729 PRODUCT MANUAL PXM-C388-S 17
CONNECTOR REFERENCE
POWER
J37 - Power
Visual
Index
PCB Connector: SAMTEC IPL1-105-01-L-D-RA-K (J37)
Mating Connector: SAMTEC IPD1-06-D-K (Housing)
SAMTEC CC79L-2024-01L or CC79R-2024-01L (Crimp)
CBL-PWR-700-18
Power is applied to the PXM-C388 via the connector at J37. WinSystems offers the cable CBL-PWR-700-18 to simplify
this connection. See the list of Cables in this manual for additional cables for other power supplies.
RESET
PSON_OUT
+12VDC
GND
GND
PWRGOOD
PWRBTN
GND
-12V
VCC
VCC
+5VSB
J37
(Power)
12 11 10 9 8 7
6 5 4 3 2 1
140729 PRODUCT MANUAL PXM-C388-S 18
The PXM-C388 supports either AT (standard power supply) or ATX type power supplies. Zero load supplies are
recommended. An AT power supply is a simple on/off supply with no interaction with the single board computer. Most
embedded systems use this type of power supply and it is the default setting. JP14 should always be jumpered with an
AT style power supply and +5V should be connected to both VCC and +5VSB (jumper JP15 on Rev. B and later).
ATX type power supplies function with a “soft” on/off power button and a +5 VSB (standby). If an ATX compatible power
supply is connected, JP14 and JP15 should be open and a power button (momentary contact) connected between pin 12
(power button) and pin 11 (ground) of J37. The +5 VSB signal provides the standby voltage to the PXM-C388 but does not
power any other features of the board. When the power button is pressed, the PXM-C388 pulls PSON (Power Supply On)
low and the power supply turns on all voltages to the single board computer. When the power button is pressed again,
the BIOS signals the event so ACPI-compliant operating systems can be shutdown before the power is turned off. In ATX
mode, if the power button is held for 4 seconds, the power supply is forced off, regardless of ACPI.
It is possible to use an ATX power supply without a power button. Simply jumper JP14 and it will boot when the supply is
turned on.
JP14 - Power Supply Selection
Visual
Index
1
2
5VSB
PWRBTN
JP14
1
2
5VSB
5VCC
JP15 (Rev. B and later)
140729 PRODUCT MANUAL PXM-C388-S 19
BATTERY BACKUP
An optional external battery, connected at J31, supplies the PXM-C388 board with standby power for the real-time
clock and CMOS setup RAM. An extended temperature lithium battery is available from WinSystems, part number
BAT-LTC-E-36-16-2 or BAT-LTC-E-36-27-2.
A power supervisory circuit contains the voltage sensing circuit and an internal power switch to route the battery
or standby voltage to the circuits selected for backup. The battery automatically switches ON when the VCC of the
systems drops below the battery voltage and back OFF again when VCC returns to normal.
WARNING: BAT-LTC-E-36-16-2 or BAT-LTC-E-36-27-2 must be connected at J31.
Improper installation of the battery could result in explosive failure. Please be careful
to note correct connection at location J31.
(For external battery. Provides battery backup to RTC and BIOS CMOS.)
J31 - External Battery
Visual
Index
PCB Connector: MOLEX 501953-0307 (J31)
J31
1 2 3
GND
VBAT
NC
140729 PRODUCT MANUAL PXM-C388-S 20
VIDEO
J33 - ANALOG VGA
Visual
Index
PCB Connector: MOLEX 501568-1407 (J33)
Mating Connector: MOLEX 501330-1400 (Housing)
MOLEX 501334-0000 (Crimp)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
RED
GND
GREEN
GND
BLUE
GND
HSYNC
GND
VSYNC
GND
DDCDATA
N/C
DDCCLK
VCC
J33
CBL-VGA-002-12
The PXM-C388-S has an integrated display controller that interfaces to both Analog VGA and at panel displays. The
video output mode is selected in the CMOS setup. Simultaneous at panel and Analog VGA mode is also supported. The
Analog VGA connector is located at J33. WinSystems offers the cable CBL-VGA-002-12 to simplify the connection. The
LVDS interface connector is located at J20 to interface to at panels. A backlight power connectors is located at J24.
Panel power option selection is made at JP13.
Contact your WinSystems’ Applications Engineer for information about available cable kits and supported panels.
This manual does not attempt to provide any information about how to connect to specic LCDs.
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WinSystems PXM-C388-S User manual

Category
PC/workstation barebones
Type
User manual

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