Texas Instruments TPA3008D2 User manual

Brand: Texas Instruments

Model: TPA3008D2

Category: Soundbar speakers

Type: User manual

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FEATURES DESCRIPTION

APPLICATIONS

10 µF

220 nF 220 nF

PVCC PVCC

220 nF 220 nF

PVCC PVCC

220 pF

Left Differential

Inputs

Right Differential

Inputs

Shutdown/Mute

Gain

Control

BSLP

PVCCL

LOUTP

PGNDL

LOUTN

PVCCL

BSLN

TPA3008D2

VCLAMPR

SHUTDOWN

V2P5

RINP

LINN

LINP

AVDDREF

GAIN0

GAIN1

AVDD

AGND

COSC

ROSC

AVCC

VCLAMPL

BSRP

PVCCR

ROUTP

PGNDR

ROUTN

PVCCR

BSRN

RINN

AVCC

AGND

10 µF

0.1 µF

0.47 µF

0.1 µF

10 µF

1 µF

120 kΩ

1 µF

FAULT

0.1 µF

10 µF

1 µF

Control

†Optional output filter for EMI suppression

†

TPA3008D2

SLOS435A – MAY 2004 – REVISED JULY 2004

10-W STEREO CLASS-D AUDIO POWER AMPLIFIER

• 10-W/Channel Into an 16-Ω Load From a

The TPA3008D2 is a 10-W (per channel) efficient,

17-V Supply

class-D audio amplifier for driving bridged-tied stereo

speakers. The TPA3008D2 can drive stereo speakers

• Up to 92% Efficient, Class-D Operation

as low as 8 Ω. The high efficiency of the TPA3008D2

Eliminates Need For Heatsinks

eliminates the need for external heatsinks when

• 8.5-V to 18-V Single-Supply Operation

playing music.

• Four Selectable, Fixed Gain Settings

The gain of the amplifier is controlled by two gain

• Differential Inputs Minimizes Common-Mode

select pins. The gain selections are 15.3, 21.2, 27.2,

Noise

and 31.8 dB.

• Space-Saving, Thermally Enhanced

The outputs are fully protected against shorts to

PowerPAD™ Packaging

GND, VCC, and output-to-output shorts. A fault ter-

• Thermal and Short-Circuit Protection

minal allows short-circuit fault reporting and automatic

With Auto Recovery Option

recovery. Thermal protection ensures that the maxi-

mum junction temperature is not exceeded.

• Pinout Similar to TPA3000D Family

• LCD Monitors and TVs

• All-In-One PCs

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PowerPAD is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

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ABSOLUTE MAXIMUM RATINGS

DISSIPATION RATING TABLE

RECOMMENDED OPERATING CONDITIONS

TPA3008D2

SLOS435A – MAY 2004 – REVISED JULY 2004

These devices have limited built-in ESD protection. The leads should be shorted together or the device

placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

over operating free-air temperature range (unless otherwise noted)

(1)

TPA3008D2

Supply voltage range AV

, PV

-0.3 V to 20 V

Load Impedance, R

≥ 6 Ω

SHUTDOWN -0.3 V to VCC + 0.3 V

Input voltage range, V

GAIN0, GAIN1, RINN, RINP, LINN, LINP -0.3 V to 6 V

Continuous total power dissipation See Dissipation Rating Table

Operating free–air temperature range, T

- 40°C to 85°C

Operating junction temperature range, T

- 40°C to 150°C

Storage temperature range, T

stg

- 65°C to 150°C

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C

(1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating

conditions” is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.

DERATING

PACKAGE T

≤ 25°C θ

FACTOR T

= 70°C T

= 85°C

(1/θ

)

PHP 4.3 W 1.14 °C/W

(1)

34.7 mW/°C

(1)

2.7 W 2.2 W

(1) Based on a JEDEC high-K PCB with the PowerPAD™ soldered to a thermal land on the

printed-circuit board. See the PowerPAD Thermally Enhanced Package application note (SLMA002).

The PowerPAD must be soldered to the PCB.

= 25°C (unless otherwise noted)

MIN MAX UNIT

Supply voltage, V

, AV

8.5 18 V

High-level input voltage, V

SHUTDOWN, GAIN0, GAIN1 2 V

Low-level input voltage, V

SHUTDOWN, GAIN0, GAIN1 0.8 V

SHUTDOWN, V

= V

= 18 V 10 µA

High-level input current, I

GAIN0, GAIN1, V

= 5.5 V, V

= 18 V 1 µA

SHUTDOWN, V

= 0 V, V

= 18 V 1 µA

Low-level input current, I

GAIN0, GAIN1, V

= 5.5 V, V

= 18 V 1 µA

High-level output voltage, V

FAULT, I

= 100 µA AV

- 0.8 V V

Low-level output voltage, V

FAULT, I

= -100 µA AGND + 0.8 V V

Frequency is set by selection of ROSC and COSC

Oscillator frequency, f

OSC

200 300 kHz

(see the Application Information Section).

Operating free–air temperature, T

-40 85 °C

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AVAILABLE OPTIONS

DC ELECTRICAL CHARACTERISTICS

AC ELECTRICAL CHARACTERISTICS

TPA3008D2

SLOS435A – MAY 2004 – REVISED JULY 2004

PACKAGED DEVICE

48-PIN HTQFP (PHP)

(1)

-40°C to 85°C TPA3008D2PHP

(1) The PHP package is available taped and reeled. To order a taped

and reeled part, add the suffix R to the part number (e.g.,

TPA3008D2PHPR).

= 25°C, V

= 12 V, R

= 8 Ω (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Class-D output offset voltage INN and INP connected together,

| 2 5 55 mV

(measured differentially) Gain = 31.8 dB

V2P5 2.5-V Bias voltage No load 2.5 V

= 10 mA, SHUTDOWN = 2 V,

+5-V internal supply voltage 4.5 5 5.5 V

= 8.5 V to 18 V

PSRR Power supply rejection ratio V

= 11.5 V to 12.5 V -76 dB

Quiescent supply current SHUTDOWN = 2 V, no load 11 22 mA

Quiescent supply current in shut-

CC(SD)

SHUTDOWN = 0 V 1.6 25 µA

down mode

High side 600

= 12 V,

DS(on)

Drain-source on-state resistance I

= 1 A, Low side 500 mΩ

= 25°C

Total 1100 1300

GAIN0 = 0.8 V 14.6 15.3 16.2

GAIN1 = 0.8 V

GAIN0 = 2 V 20.5 21.2 21.8

G Gain dB

GAIN0 = 0.8 V 26.4 27.2 27.8

GAIN1 = 2 V

GAIN0 = 2 V 31.1 31.8 32.5

Turnon time C

(V2P5)

= 1 µF, SHUTDOWN = 2 V 16 ms

off

Turnoff time C

(V2P5)

= 1 µF, SHUTDOWN = 0.8 V 60 µs

= 25°C, V

= 12 V, R

= 8 Ω, (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

200 mV

ripple from 20 Hz to 1 kHz,

SVR

Supply voltage rejection ratio -70 dB

Gain = 15.6 dB, Inputs ac-coupled to GND

THD+N = 0.13%, f = 1 kHz, R

= 8 Ω 5

THD+N = 10%, f = 1 kHz, R

= 8 Ω 8.5

THD+N = 0.16%, f = 1 kHz, R

= 16 Ω,

Continuous output power W

= 17 V

THD+N = 10%, f = 1 kHz, R

= 16 Ω,

= 17 V

Total harmonic distortion plus

THD+N P

= 1 W, f = 1 kHz, R

= 8 Ω 0.1%

noise

20 Hz to 22 kHz, A-weighted filter,

Output integrated noise floor -80 dB

Gain = 15.6 dB

Crosstalk P

= 1 W, R

= 8 Ω, Gain = 15.6 dB, -93 dB

f = 1 kHz

Maximum output at THD+N < 0.5%,

SNR Signal-to-noise ratio 97 dB

f = 1 kHz, Gain = 15.6 dB

Thermal trip point 150 °C

Thermal hystersis 20 °C

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Biases

and

References

TTL Input

Buffer

(VCC Compl)

Start-up and

Protection

Logic

Detect

Thermal

VDDok

RINP

RINN

Ramp

Generator

COSC

ROSC

VCCok

5-V LDO

AVCC

AVDD

VDD

and

PWM

Mode

Logic

Gain

Adj.

Gain

Control

Deglitch

and

PWM

Mode

Logic

Gain

Adj.

LINP

LINN

Gate

Drive

VClamp

Gen

Gate

Drive

PVCC

BSRP

PVCCR(2)

ROUTP(2)

PGNDR

ROUTN(2)

PVCCR(2)

BSRN

Gate

Drive

VClamp

Gen

Gate

Drive

PVCC

BSLP

PVCCL(2)

LOUTP(2)

PGNDL

LOUTN(2)

PVCCL(2)

BSLN

VCLAMPL

VCLAMPR

GAIN0

To Gain Adj.

Blocks and

Start-up Logic

SHUTDOWN

V2P5

AVCC

AGND(2)

V2P5

Deglitch

GAIN1

REF

FAULT

TPA3008D2

SLOS435A – MAY 2004 – REVISED JULY 2004

FUNCTIONAL BLOCK DIAGRAM

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13 14 15 16 17 18 19 20 21 22 23 24

48 47 46 45 44 43 42 41 40 39 38 37

BSRN

PVCCR

ROUTN

PGNDR

ROUTP

PVCCR

BSRP

VCLAMPR

AGND

COSC

ROSC

AGND

VCLAMPL

SHUTDOWN

RINN

RINP

V2P5

LINP

LINN

GAIN0

GAIN1

FAULT

BSLN

PVCCL

LOUTN

PGNDL

LOUTP

PVCCL

BSLP

TPA3008D2

REF

TPA3008D2

SLOS435A – MAY 2004 – REVISED JULY 2004

PHP PACKAGE

(TOP VIEW)

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TPA3008D2

SLOS435A – MAY 2004 – REVISED JULY 2004

TERMINAL FUNCTIONS

PIN NAME PIN NUMBER I/O DESCRIPTION

AGND 26, 30 - Analog ground for digital/analog cells in core

33 - High-voltage analog power supply, not connected internally to PVCCR or PVCCL

5-V Regulated output for use by internal cells and GAIN0, GAIN1 pins only. Not

29 O

specified for driving other external circuitry.

REF 7 O 5-V Reference output—connect to gain setting resistor or directly to GAIN0, GAIN1.

BSLN 13 - Bootstrap I/O for left channel, negative high-side FET

BSLP 24 - Bootstrap I/O for left channel, positive high-side FET

BSRN 48 - Bootstrap I/O for right channel, negative high-side FET

BSRP 37 - Bootstrap I/O for right channel, positive high-side FET

COSC 28 I/O I/O for charge/discharging currents onto capacitor for ramp generator.

Short-circuit detect fault output.

FAULT = high, short-circuit detected.

FAULT 11 O

FAULT = low, normal operation.

Status is reset when power is cycled or SHUTDOWN is cycled.

GAIN0 9 I Gain select least significant bit. TTL logic levels with compliance to AV

GAIN1 10 I Gain select most significant bit. TTL logic levels with compliance to AV

LINN 6 I Negative audio input for left channel

LINP 5 I Positive audio input for left channel

LOUTN 16, 17 O Class-D 1/2-H-bridge negative output for left channel

LOUTP 20, 21 O Class-D 1/2-H-bridge positive output for left channel

8, 12, 31, 32,

NC - No internal connection

34, 35

PGNDL 18, 19 - Power ground for left channel H-bridge

PGNDR 42, 43 - Power ground for right channel H-bridge

Power supply for left channel H-bridge (internally connected to pins 22 and 23), not

PVCCL 14, 15 -

connected to PVCCR or AV

Power supply for left channel H-bridge (internally connected to pins 14 and 15), not

PVCCL 22, 23 -

connected to PVCCR or AV

Power supply for right channel H-bridge (internally connected to pins 46 and 47),

PVCCR 38, 39 -

not connected to PVCCL or AV

Power supply for right channel H-bridge (internally connected to pins 38 and 39),

PVCCR 46, 47 -

not connected to PVCCL or AV

RINP 3 I Positive audio input for right channel

RINN 2 I Negative audio input for right channel

ROSC 27 I/O I/O current setting resistor for ramp generator.

ROUTN 44, 45 O Class-D 1/2-H-bridge negative output for right channel

ROUTP 40, 41 O Class-D 1/2-H-bridge positive output for right channel

Shutdown signal for IC (low = shutdown, high = operational). TTL logic levels with

SHUTDOWN 1 I

compliance to V

VCLAMPL 25 - Internally generated voltage supply for left channel bootstrap capacitors.

VCLAMPR 36 - Internally generated voltage supply for right channel bootstrap capacitors.

V2P5 4 O 2.5-V Reference for analog cells.

Connect to AGND and PGND—should be the center point for both grounds. Internal

Thermal Pad - -

resistive connection to AGND.

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TYPICAL CHARACTERISTICS

0.01

20 k

100

1 k 10 k

THD+N −Total Harmonic Distortion + Noise − %

= 18 V,

= 16 

Gain = 21.6 dB

f − Frequency − Hz

0.1

= 2.5 W

= 0.5 W

= 1 W

0.005

0.01

0.1

20 k

100

1 k

10 k

= 2.5 W

THD+N −Total Harmonic Distortion + Noise − %

= 12 V,

= 16 ,

Gain = 21.6 dB

f − Frequency − Hz

= 1 W

= 0.5 W

TPA3008D2

SLOS435A – MAY 2004 – REVISED JULY 2004

TABLE OF GRAPHS

FIGURE

THD+N Total harmonic distortion + noise vs Frequency 1, 2, 3, 4

THD+N Total harmonic distortion + noise vs Output power 5, 6

Closed-loop response 7

Output power vs Supply voltage 8, 9

Efficiency vs Output power 10

Efficiency vs Total output power 11

Supply current vs Total output power 12

Crosstalk vs Frequency 13

SVR

Supply ripple rejection ratio vs Frequency 14

CMRR Commom-mode rejection ratio vs Frequency 15

TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE

vs vs

FREQUENCY FREQUENCY

Figure 1. Figure 2.

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0.005

0.01

0.1

20 k

100

1 k 10 k

= 5 W

THD+N −Total Harmonic Distortion + Noise − %

= 18 V,

= 8 ,

Gain = 21.6 dB

f − Frequency − Hz

= 1 W

= 2.5 W

0.01

0.1

20 k

100

1 k 10 k

THD+N −Total Harmonic Distortion + Noise − %

= 12 V,

= 8 

Gain = 21.6 dB

f − Frequency − Hz

= 1 W

= 2.5 W

= 0.5 W

0.01

0.1

20m 10100 m 1

THD+N −Total Harmonic Distortion + Noise − %

− Output Power − W

= 12 V,

= 8 ,

Gain = 21.6 dB

20200 m 2

1 kHz

20 Hz

20 kHz

0.01

0.1

20m 10100 m 1

THD+N −Total Harmonic Distortion + Noise − %

− Output Power − W

= 18 V,

= 16 ,

Gain = 21.6 dB

20 Hz

20200 m 2

20 kHz

1 kHz

TPA3008D2

SLOS435A – MAY 2004 – REVISED JULY 2004

TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE

vs vs

FREQUENCY FREQUENCY

Figure 3. Figure 4.

TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE

vs vs

OUTPUT POWER OUTPUT POWER

Figure 5. Figure 6.

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10 100 1k

Gain − dB

f − Frequency − Hz

10k

80k

= 12 V,

= 8 Ω,

Gain = 32 dB

33 kHz, RC LPF

Gain

Phase

Phase −

100

−150



−100

−50

150

8 9

10 11 12 13 14 15 16 17 18

− Output Power − W

THD+N = 10%

THD+N = 1%

= 16 

− Supply Voltage − V

8 9 10 11 12 13 14

THD+N = 1%

THD+N = 10%

= 8 

− Supply Voltage − V

− Output Power − W

Power represented by dashed line

may require external heatsinking

0 1 2 3 4 5 6

− Output Power (Per Channel) − W

Efficiency − %

100

7 8 9 10

= 18 V,

= 16 

TPA3008D2

SLOS435A – MAY 2004 – REVISED JULY 2004

OUTPUT POWER

CLOSED-LOOP RESPONSE SUPPLY VOLTAGE

Figure 7. Figure 8.

OUTPUT POWER EFFICIENCY

vs vs

SUPPLY VOLTAGE OUTPUT POWER

Figure 9. Figure 10.

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100

0 1 2 3 4 5 6 7 8 9 10

Efficiency − %

16 

8 

− Total Output Power − W

11 12

= 12 V,

LC Filter,

Resistive Load,

Stereo Operation

0.2

0.4

0.6

0.8

1.2

1.4

0 2 4 6 8 10 12

− Total Output Power − W

1.6

1.8

2.0

14 16 18 20

LC Filter,

Resistive Load,

Stereo Operation

− Supply Current − AV

= 18 V,

= 16 

= 12 V,

= 16 

= 12 V,

= 8 

−100

−90

−80

−70

−60

−50

−40

−30

−20

−10

20 100 1 k 10 k

Crosstalk − dB

f − Frequency − Hz

= 12 V,

= 2.5 W,

Gain = 21.6 dB

= 8

20 k

−100

−90

−80

−70

−60

−50

−40

20 100 1 k 10 k

f − Frequency − Hz

SVR

− Supply Ripple Rejection Ratio − dB

= 12 V,

(RIPPLE)

= 200 mV

= 8 ,

Gain = 15.6 dB

20 k

−30

−20

−10

TPA3008D2

SLOS435A – MAY 2004 – REVISED JULY 2004

EFFICIENCY SUPPLY CURRENT

vs vs

TOTAL OUTPUT POWER TOTAL OUTPUT POWER

Figure 11. Figure 12.

CROSSTALK SUPPLY RIPPLE REJECTION RATIO

vs vs

FREQUENCY FREQUENCY

Figure 13. Figure 14.

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−70

−60

−50

−40

−30

−20

−10

100 1 k 10 k20

= 12 V,

Gain = 15.6 dB,

= 8 

Output Referred

f − Frequency − Hz

CMRR − Common-Mode Rejection Ratio − dB

20 k

TPA3008D2

SLOS435A – MAY 2004 – REVISED JULY 2004

COMMON-MODE REJECTION RATIO

FREQUENCY

Figure 15.

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APPLICATION INFORMATION

220 nF

PVCC PVCC

220 nF 220 nF

PVCC PVCC

220 pF

Right Differential

Inputs

Shutdown/Mute

BSLP

PVCCL

LOUTP

PGNDL

LOUTN

PVCCL

BSLN

TPA3008D2

VCLAMPR

SHUTDOWN

V2P5

RINP

LINN

LINP

AVDDREF

GAIN0

GAIN1

AVDD

AGND

COSC

ROSC

AVCC

VCLAMPL

BSRP

PVCCR

ROUTP

PGNDR

ROUTN

PVCCR

BSRN

RINN

AVCC

AGND

10 F10 F

0.1 F

0.47 F

0.1 F 0.1 F

10 F 10 F

1 F

120 k

1 F

FAULT

0.1 F

10 F

1 F

Control

Left Differential

Inputs

Gain

Control

1 nF1 nF

 



Chip ferrite bead (example: Fair-Rite 251206700743) shown for EMI suppression.

1 nF



Fault Reporting

TPA3008D2

SLOS435A – MAY 2004 – REVISED JULY 2004

Figure 16. Stereo Class-D With Differential Inputs

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CLASS-D OPERATION

Traditional Class-D Modulation Scheme

0 V

−12 V

+12 V

Current

OUTP

Differential Voltage

Across Load

OUTN

TPA3008D2 Modulation Scheme

TPA3008D2

SLOS435A – MAY 2004 – REVISED JULY 2004

APPLICATION INFORMATION (continued)

This section focuses on the class-D operation of the TPA3008D2.

The traditional class-D modulation scheme, which is used in the TPA032D0x family, has a differential output

where each output is 180 degrees out of phase and changes from ground to the supply voltage, V

. Therefore,

the differential prefiltered output varies between positive and negative V

, where filtered 50% duty cycle yields

0 V across the load. The traditional class-D modulation scheme with voltage and current waveforms is shown in

Figure 17 . Note that even at an average of 0 V across the load (50% duty cycle), the current to the load is high,

causing high loss and thus causing a high supply current.

Figure 17. Traditional Class-D Modulation Scheme's Output Voltage and Current Waveforms Into an

Inductive Load With No Input

The TPA3008D2 uses a modulation scheme that still has each output switching from 0 to the supply voltage.

However, OUTP and OUTN are now in phase with each other with no input. The duty cycle of OUTP is greater

than 50% and OUTN is less than 50% for positive output voltages. The duty cycle of OUTP is less than 50% and

OUTN is greater than 50% for negative output voltages. The voltage across the load sits at 0 V throughout most

of the switching period, greatly reducing the switching current, which reduces any I

R losses in the load.

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0 V

−12 V

+12 V

Current

OUTP

OUTN

Differential

Voltage

Across

Load

0 V

−12 V

+12 V

Current

OUTP

OUTN

Differential

Voltage

Across

Load

Output = 0 V

Output > 0 V

Efficiency: LC Filter Required With the Traditional Class-D Modulation Scheme

TPA3008D2

SLOS435A – MAY 2004 – REVISED JULY 2004

APPLICATION INFORMATION (continued)

Figure 18. The TPA3008D2 Output Voltage and Current Waveforms Into an Inductive Load

The main reason that the traditional class-D amplifier needs an output filter is that the switching waveform results

in maximum current flow. This causes more loss in the load, which causes lower efficiency. The ripple current is

large for the traditional modulation scheme, because the ripple current is proportional to voltage multiplied by the

time at that voltage. The differential voltage swing is 2 x V

, and the time at each voltage is half the period for

the traditional modulation scheme. An ideal LC filter is needed to store the ripple current from each half cycle for

the next half cycle, while any resistance causes power dissipation. The speaker is both resistive and reactive,

whereas an LC filter is almost purely reactive.

The TPA3008D2 modulation scheme has little loss in the load without a filter because the pulses are short and

the change in voltage is V

instead of 2 x V

. As the output power increases, the pulses widen, making the

ripple current larger. Ripple current could be filtered with an LC filter for increased efficiency, but for most

applications the filter is not needed.

An LC filter with a cutoff frequency less than the class-D switching frequency allows the switching current to flow

through the filter instead of the load. The filter has less resistance than the speaker, which results in less power

dissipation, therefore increasing efficiency.

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Effects of Applying a Square Wave Into a Speaker

Efficiency (theoretical, %) 



 r

ds(on)



 100% 

(8  1.3)

 100%  86%

(1)

(total)



Efficiency



8.5 W

0.86

 9.88 W

(2)

Other losses  P

(total)

(measured)  P

(total)

(theoretical)  10.49  9.88  0.61 W

(3)

(dis)

 0.61 W  (12 V 22 mA)  0.35 W

(4)

When to Use an Output Filter for EMI Suppression

TPA3008D2

SLOS435A – MAY 2004 – REVISED JULY 2004

APPLICATION INFORMATION (continued)

Audio specialists have advised for years not to apply a square wave to speakers. If the amplitude of the

waveform is high enough and the frequency of the square wave is within the bandwidth of the speaker, the

square wave could cause the voice coil to jump out of the air gap and/or scar the voice coil. A 250-kHz switching

frequency, however, does not significantly move the voice coil, as the cone movement is proportional to 1/f

for

frequencies beyond the audio band.

Damage may occur if the voice coil cannot handle the additional heat generated from the high-frequency

switching current. The amount of power dissipated in the speaker may be estimated by first considering the

overall efficiency of the system. If the on-resistance (rds(on)) of the output transistors is considered to cause the

dominant loss in the system, then the maximum theoretical efficiency for the TPA3008D2 with an 8-Ω load is as

follows:

The maximum measured output power is approximately 8.5 W with an 12-V power supply. The total theoretical

power supplied (P(total)) for this worst-case condition would therefore be as follows:

The efficiency measured in the lab using an 8-Ω speaker was 81%. The power not accounted for as dissipated

across the r

DS(on)

may be calculated by simply subtracting the theoretical power from the measured power:

The quiescent supply current at 12 V is measured to be 22 mA. It can be assumed that the quiescent current

encapsulates all remaining losses in the device, i.e., biasing and switching losses. It may be assumed that any

remaining power is dissipated in the speaker and is calculated as follows:

Note that these calculations are for the worst-case condition of 8.5 W delivered to the speaker. Because the 0.35

W is only 4% of the power delivered to the speaker, it may be concluded that the amount of power actually

dissipated in the speaker is relatively insignificant. Furthermore, this power dissipated is well within the

specifications of most loudspeaker drivers in a system, as the power rating is typically selected to handle the

power generated from a clipping waveform.

Design the TPA3008D2 without the filter if the traces from amplifier to speaker are short (< 50 cm). Powered

speakers, where the speaker is in the same enclosure as the amplifier, is a typical application for class-D without

a filter.

Most applications require a ferrite bead filter. The ferrite filter reduces EMI around 1 MHz and higher (FCC and

CE only test radiated emissions greater than 30 MHz). When selecting a ferrite bead, choose one with high

impedance at high frequencies, but low impedance at low frequencies.

Use a LC output filter if there are low frequency (<1 MHz) EMI-sensitive circuits and/or there are long wires from

the amplifier to the speaker.

When both an LC filter and a ferrite bead filter are used, the LC filter should be placed as close as possible to

the IC followed by the ferrite bead filter.

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0.1 µF

0.47 µF

33 µH

OUTP

OUTN

1 nF

Ferrite

Chip Bead

OUTP

OUTN

Ferrite

Chip Bead

1 nF

Gain setting via GAIN0 and GAIN1 inputs

INPUT RESISTANCE

TPA3008D2

SLOS435A – MAY 2004 – REVISED JULY 2004

APPLICATION INFORMATION (continued)

Figure 19. Typical LC Output Filter, Cutoff Frequency of 27 kHz, Speaker Impedance = 8 Ω

Figure 20. Typical Ferrite Chip Bead Filter (Chip bead example: Fair-Rite 2512067007Y3)

The gain of the TPA3008D2 is set by two input terminals, GAIN0 and GAIN1.

The gains listed in Table 1 are realized by changing the taps on the input resistors inside the amplifier. This

causes the input impedance (Z

) to be dependent on the gain setting. The actual gain settings are controlled by

ratios of resistors, so the gain variation from part-to-part is small. However, the input impedance may shift by

20% due to shifts in the actual resistance of the input resistors.

For design purposes, the input network (discussed in the next section) should be designed assuming an input

impedance of 26 kΩ, which is the absolute minimum input impedance of the TPA3008D2. At the lower gain

settings, the input impedance could increase as high as 165 kΩ

Table 1. Gain Setting

INPUT IMPEDANCE

AMPLIFIER GAIN (dB)

(kΩ)

GAIN1 GAIN0

TYP TYP

0 0 15.3 137

0 1 21.2 88

1 0 27.2 52

1 1 31.8 33

Each gain setting is achieved by varying the input resistance of the amplifier that can range from its smallest

value, 33 kΩ, to the largest value, 137 kΩ. As a result, if a single capacitor is used in the input high-pass filter,

the -3 dB or cutoff frequency changes when changing gain steps.

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Input

Signal

f 

2 Z

(5)

INPUT CAPACITOR, C



2 Z

−3 dB

(6)



2 Z

(7)

Power Supply Decoupling,C

TPA3008D2

SLOS435A – MAY 2004 – REVISED JULY 2004

The -3-dB frequency can be calculated using Equation 5. Use Table 1 for Z

values.

In the typical application, an input capacitor (C

) is required to allow the amplifier to bias the input signal to the

proper dc level for optimum operation. In this case, C

and the input impedance of the amplifier (Z

) form a

high-pass filter with the corner frequency determined in Equation 6 .

The value of C

is important, as it directly affects the bass (low-frequency) performance of the circuit. Consider

the example where Z

is 137 kΩ and the specification calls for a flat bass response down to 20 Hz. Equation 6 is

reconfigured as Equation 7 .

In this example, C

is 58 nF; so, one would likely choose a value of 0.1 µF as this value is commonly used. If the

gain is known and is constant, use Z

from Table 1 to calculate C

. A further consideration for this capacitor is the

leakage path from the input source through the input network (C

) and the feedback network to the load. This

leakage current creates a dc offset voltage at the input to the amplifier that reduces useful headroom, especially

in high gain applications. For this reason, a low-leakage tantalum or ceramic capacitor is the best choice. When

polarized capacitors are used, the positive side of the capacitor should face the amplifier input in most

applications as the dc level there is held at 2.5 V, which is likely higher than the source dc level. Note that it is

important to confirm the capacitor polarity in the application.

For the best pop performance, C

should be less than or equal to 1µF.

The TPA3008D2 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling

to ensure that the output total harmonic distortion (THD) is as low as possible. Power supply decoupling also

prevents oscillations for long lead lengths between the amplifier and the speaker. The optimum decoupling is

achieved by using two capacitors of different types that target different types of noise on the power supply leads.

For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR)

ceramic capacitor, typically 0.1 µF placed as close as possible to the device V

lead works best. For filtering

lower frequency noise signals, a larger aluminum electrolytic capacitor of 10 µF or greater placed near the audio

power amplifier is recommended. The 10-µF capacitor also serves as local storage capacitor for supplying

current during large signal transients on the amplifier outputs.

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BSN and BSP Capacitors

VCLAMP Capacitors

Internal Regulated 5-V Supply (AV

)

Differential Input

SHUTDOWN OPERATION

USING LOW-ESR CAPACITORS

TPA3008D2

SLOS435A – MAY 2004 – REVISED JULY 2004

The full H-bridge output stages use only NMOS transistors. Therefore, they require bootstrap capacitors for the

high side of each output to turn on correctly. A 220-nF ceramic capacitor, rated for at least 25 V, must be

connected from each output to its corresponding bootstrap input. Specifically, one 220-nF capacitor must be

connected from xOUTP to xBSP, and one 220-nF capacitor must be connected from xOUTN to xBSN. (See the

application circuit diagram in Figure 16 .)

The bootstrap capacitors connected between the BSxx pins and corresponding output function as a floating

power supply for the high-side N-channel power MOSFET gate drive circuitry. During each high-side switching

cycle, the bootstrap capacitors hold the gate-to-source voltage high enough to keep the high-side MOSFETs

turned on.

To ensure that the maximum gate-to-source voltage for the NMOS output transistors is not exceeded, two

internal regulators clamp the gate voltage. Two 1-µF capacitors must be connected from VCLAMPL (pin 25) and

VCLAMPR (pin 36) to ground and must be rated for at least 25 V. The voltages at the VCLAMP terminals vary

with V

and may not be used for powering any other circuitry.

The AV

terminal (pin 29) is the output of an internally generated 5-V supply, used for the oscillator,

preamplifier, and volume control circuitry. It requires a 1-µF capacitor, placed close to the pin, to keep the

regulator stable.

This regulated voltage can be used to control GAIN0 and GAIN1 terminals, but should not be used to drive

external circuitry.

The differential input stage of the amplifier cancels any noise that appears on both input lines of the channel. To

use the TPA3008D2 with a differential source, connect the positive lead of the audio source to the INP input and

the negative lead from the audio source to the INN input. To use the TPA3008D2 with a single-ended source, ac

ground the INP or INN input through a capacitor equal in value to the input capacitor on INN or INP and apply

the audio source to either input. In a single-ended input application, the unused input should be ac grounded at

the audio source instead of at the device input for best noise performance.

The TPA3008D2 employs a shutdown mode of operation designed to reduce supply current (I

) to the absolute

minimum level during periods of nonuse for power conservation. The SHUTDOWN input terminal should be held

high (see specification table for trip point) during normal operation when the amplifier is in use. Pulling

SHUTDOWN low causes the outputs to mute and the amplifier to enter a low-current state. Never leave

SHUTDOWN unconnected, because amplifier operation would be unpredictable.

For the best power-off pop performance, place the amplifier in the shutdown mode prior to removing the power

supply voltage.

Low-ESR capacitors are recommended throughout this application section. A real (as opposed to ideal) capacitor

can be modeled simply as a resistor in series with an ideal capacitor. The voltage drop across this resistor

minimizes the beneficial effects of the capacitor in the circuit. The lower the equivalent value of this resistance,

the more the real capacitor behaves like an ideal capacitor.

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SHORT-CIRCUIT PROTECTION AND AUTOMATIC RECOVERY FEATURE

THERMAL PROTECTION

PRINTED-CIRCUIT BOARD (PCB) LAYOUT

TPA3008D2

SLOS435A – MAY 2004 – REVISED JULY 2004

The TPA3008D2 has short-circuit protection circuitry on the outputs that prevents damage to the device during

output-to-output shorts, output-to-GND shorts, and output-to-V

shorts. When a short circuit is detected on the

outputs, the part immediately disables the output drive. This is a latched fault and must be reset by cycling the

voltage on the SHUTDOWN pin to a logic low and back to the logic high state for normal operation. This clears

the short-circuit flag and allows for normal operation if the short was removed. If the short was not removed, the

protection circuitry again activates.

The fault terminal can be used for automatic recovery from a short-circuit event, or used to monitor the status

with an external GPIO.

Thermal protection on the TPA3008D2 prevents damage to the device when the internal die temperature

exceeds 150°C. There is a ±15 degree tolerance on this trip point from device to device. Once the die

temperature exceeds the thermal set point, the device enters into the shutdown state and the outputs are

disabled. This is not a latched fault. The thermal fault is cleared once the temperature of the die is reduced by

20°C. The device begins normal operation at this point with no external system interaction.

Because the TPA3008D2 is a class-D amplifier that switches at a high frequency, the layout of the printed-circuit

board (PCB) should be optimized according to the following guidelines for the best possible performance.

• Decoupling capacitors—The high-frequency 0.1-µF decoupling capacitors should be placed as close to the

PVCC (pins 14, 15, 22, 23, 38, 39, 46, and 47) and AV

(pin 33) terminals as possible. The V2P5 (pin 4)

capacitor, AV

(pin 29) capacitor, and VCLAMP (pins 25 and 36) capacitor should also be placed as close

to the device as possible. Large (10 µF or greater) bulk power supply decoupling capacitors should be

placed near the TPA3008D2 on the PVCCL, PVCCR, and AV

terminals.

• Grounding—The AV

(pin 33) decoupling capacitor, AV

(pin 29) capacitor, V2P5 (pin 4) capacitor, COSC

(pin 28) capacitor, and ROSC (pin 27) resistor should each be grounded to analog ground (AGND, pins 26

and 30). The PVCC decoupling capacitors should each be grounded to power ground (PGND, pins 18, 19,

42, and 43). Analog ground and power ground may be connected at the PowerPAD, which should be used

as a central ground connection or star ground for the TPA3008D2. Basically, an island should be created

with a single connection to PGND at the PowerPAD.

• Output filter—The ferrite EMI filter (Figure 20 ) should be placed as close to the output terminals as possible

for the best EMI performance. The LC filter (Figure 19 ) should be placed close to the outputs. The capacitors

used in both the ferrite and LC filters should be grounded to power ground. If both filters are used, the LC

filter should be placed first, following the outputs.

• PowerPAD—The PowerPAD must be soldered to the PCB for proper thermal performance and optimal

reliability. The dimensions of the PowerPAD thermal land should be 5 mm by 5 mm (197 mils by 197 mils).

The PowerPAD size measures 4,55 x 4,55 mm. Four rows of solid vias (four vias per row, 0,3302 mm or 13

mils diameter) should be equally spaced underneath the thermal land. The vias should connect to a solid

copper plane, either on an internal layer or on the bottom layer of the PCB. The vias must be solid vias, not

thermal relief or webbed vias. For additional information, see the PowerPAD Thermally Enhanced Package

application note, (SLMA002).

For an example layout, see the TPA3008D2 Evaluation Module (TPA3008D2EVM) User Manual, (SLOU165).

Both the EVM user manual and the PowerPAD application note are available on the TI Web site at

http://www.ti.com.

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BASIC MEASUREMENT SYSTEM

TPA3008D2

SLOS435A – MAY 2004 – REVISED JULY 2004

This application note focuses on methods that use the basic equipment listed below:

• Audio analyzer or spectrum analyzer

• Digital multimeter (DMM)

• Oscilloscope

• Twisted-pair wires

• Signal generator

• Power resistor(s)

• Linear regulated power supply

• Filter components

• EVM or other complete audio circuit

Figure 21 shows the block diagrams of basic measurement systems for class-AB and class-D amplifiers. A sine

wave is normally used as the input signal because it consists of the fundamental frequency only (no other

harmonics are present). An analyzer is then connected to the APA output to measure the voltage output. The

analyzer must be capable of measuring the entire audio bandwidth. A regulated dc power supply is used to

reduce the noise and distortion injected into the APA through the power pins. A System Two audio measurement

system (AP-II) (Reference 1) by Audio Precision includes the signal generator and analyzer in one package.

The generator output and amplifier input must be ac-coupled. However, the EVMs already have the ac-coupling

capacitors, (C

), so no additional coupling is required. The generator output impedance should be low to avoid

attenuating the test signal, and is important because the input resistance of APAs is not high. Conversely, the

analyzer-input impedance should be high. The output impedance, R

OUT

, of the APA is normally in the hundreds

of milliohms and can be ignored for all but the power-related calculations.

Figure 21 (a) shows a class-AB amplifier system. It takes an analog signal input and produces an analog signal

output. This amplifier circuit can be directly connected to the AP-II or other analyzer input.

This is not true of the class-D amplifier system shown in Figure 21 (b), which requires low-pass filters in most

cases in order to measure the audio output waveforms. This is because it takes an analog input signal and

converts it into a pulse-width modulated (PWM) output signal that is not accurately processed by some

analyzers.

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Texas Instruments TPA3008D2 User manual

Brand: Texas Instruments

Model: TPA3008D2

Category: Soundbar speakers

Type: User manual

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Texas Instruments TPA3008D2 User manual

Texas Instruments TPA3008D2 User manual

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