Quatech RS-232 User manual

MPAC-100

RS-232 PCI

SYNCHRONOUS ADAPTER

for PCI Card Standard compatible machines

User's Manual

QUATECH, INC. TEL: (330) 434-3154

662 Wolf Ledges Parkway FAX: (330) 434-1409

Akron, Ohio 44311 www.quatech.com

WARRANTY INFORMATION

Quatech Inc. warrants the MPAC-100 to be free of defects for one (1) year from

the date of purchase. Quatech Inc. will repair or replace any board that fails to perform

under normal operating conditions and in accordance with the procedures outlined in

this document during the warranty period. Any damage that results from improper

installation, operation, or general misuse voids all warranty rights.

Although every attempt has been made to guarantee the accuracy of this manual,

Quatech Inc. assumes no liability for damages resulting from errors in this document.

Quatech Inc. reserves the right to edit or append to this document at any time without

notice.

Please complete the following information and retain for your records. Have

this information available when requesting warranty service.

DATE OF PURCHASE:

MODEL NUMBER: MPAC-100

PRODUCT DESCRIPTION: Single Channel PCI RS-232-D

Synchronous Communications Adapter

SERIAL NUMBER:

NOTICE

The information contained in this document is protected by copyright, and

cannot be reproduced in any form without the written consent of Quatech, Inc.

Likewise, any software programs that might accompany this document are protected

by copyright and can be used only in accordance with any license agreement(s)

between the purchaser and Quatech, Inc. Quatech, Inc. reserves the right to change this

documentation or the product to which it refers at any time and without notice.

The authors have taken due care in the preparation of this document and every

attempt has been made to ensure its accuracy and completeness. In no event will

Quatech, Inc. be liable for damages of any kind, incidental or consequential, in regard

to or arising out of the performance or form of the materials presented in this document

or any software programs that might accompany this document.

Quatech, Inc. encourages feedback about this document. Please send any

written comments to the Technical Support department at the address listed on the

cover page of this document.

42

14 FIFO Control Register

..........................................

41

13 FIFO Status Register

............................................

40

12 Interrupt Status Register

.......................................

38

11 Configuration Register

.........................................

36

10 Communications Register

......................................

35

9.7 Receive FIFO timeout

.......................................

34

9.6 Receive pattern detection

....................................

33

9.5 Accessing the SCC while FIFOs are enabled

................

33

9.4.4 Controlling the FIFOs

....................................

33

9.4.3 Reading current FIFO status

.............................

33

9.4.2 Resetting the FIFOs

......................................

32

9.4.1 Interrupt status

...........................................

32

9.4 FIFO status and control

......................................

31

9.3.2 Using channel B for receive

..............................

30

9.3.1 Using channel A for both transmit and

..........................................................

29

9.3 SCC configuration for FIFO operation

......................

29

9.2.2 Receive FIFO

.............................................

28

9.2.1 Transmit FIFO

............................................

28

9.2 Accessing the FIFOs

..........................................

28

9.1 Enabling and disabling the FIFOs

..........................

28

9 FIFO Operation

..................................................

27

8.5.2 Software Interrupt Acknowledge

........................

27

8.5.1 Register Pointer Bits

......................................

27

8.5 SCC Incompatibility Warnings

.............................

26

8.4.4 Other signals are not used

...............................

26

8.4.3 Extra handshaking for channel A

........................

26

8.4.2 Extra clock support for channel A

.......................

26

8.4.1 Receive data and clock signals

...........................

26

8.4 Support for SCC Channel B

................................

25

8.3 SCC Data Encoding Methods

...............................

25

8.2 Baud Rate Generator Programming

.........................

22

8.1 Accessing the registers

.......................................

21

8 SCC General Information

.......................................

20

7 Interrupts

.........................................................

19

6 Addressing

.......................................................

18

5 Using the MPAC-100 with Syncdrive

...........................

14

4 Other Operating Systems

........................................

9

3 Windows 95/98 Installation

......................................

8

2 Hardware Installation

............................................

7

1.1 System Requirements

.........................................

7

1 Introduction

......................................................

Table of Contents

54

21 Specifications

...................................................

53

20 PCI Resource Map

..............................................

50

19 DTE Interface Signals

..........................................

49

18.4 Null-modem cables

.........................................

47

18.3 RING (pin 22)

...............................................

47

18.2 SYNCA (pin 10)

.............................................

47

18.1 5V fuse (pin 9)

..............................................

46

18 External Connections

...........................................

45

17 Receive FIFO Timeout Register

................................

44

16 Receive Pattern Count Register

................................

43

15 Receive Pattern Character Register

............................

Table of Contents

1 Introduction

The Quatech MPAC-100 is a PCI Type card and is PCI PC Card Standard

Specification compliant. It provides a single-channel RS-232 synchronous

communication port. The base address and IRQ are configured through the PCI

hardware and software using utility programs provided by Quatech. There are no

switches or jumpers to set.

The MPAC-100 uses a Zilog 85230-compatible Serial Communications Controller

(SCC). The SCC can support asynchronous formats, byte-oriented synchronous

protocols such as IBM Bisync, and bit-oriented synchronous protocols such as HDLC

and SDLC. The SCC also offers internal functions such as on-chip baud rate generators,

and digital phase-lock loop (DPLL) for recovering data clocking from received data

streams.

Because the PCI standard does not include a direct memory access (DMA)

interface, the MPAC-100 supports only interrupt-driven communications. To

compensate for the lack of DMA, the MPAC-100 is equipped with 1024-byte FIFOs for

transmit and receive data. The FIFOs provide for high data throughput with very low

interrupt overhead.

1.1 System Requirements

 16 bytes of contiguous I/O address space

 one hardware interrupt (IRQ)

 One available PCI expansion slot

Quatech MPAC-100 User's Manual

7

2 Hardware Installation

Hardware installation for the MPAC-100 is a very simple process:

1. Turn off the power of the computer system in which the MPAC-100 is to be

installed.

2. Remove the system cover according to the instructions provided by the

computer manufacturer.

3. Install the MPAC-100 in any empty PCI expansion slot. The board should be

secured by installing the Option Retaining Bracket (ORB) screw.

4. Replace the system cover according to the instructions provided by the

computer manufacturer.

5. Attach and secure the cable connectors to the desired equipment.

6. Turn on the power of the computer system.

Quatech MPAC-100 User's Manual

8

3 Windows 95/98 Installation

Windows 95/98 maintains a registry of all known hardware installed in your

computer. Inside this hardware registry Windows keeps track of all of your system

resources, such as I/O locations, IRQ levels, and DMA channels. The "Add New

Hardware Wizard" utility was designed to add new hardware and update this registry.

An "INF" configuration file is included with the MPAC-100 to allow easy

configuration in the Windows 95/98 environment. Windows uses the "INF" file to

determine the system resources required by the MPAC-100, searches for available

resources to fill the boards requirements, and then updates the hardware registry with

an entry that allocates these resources. The Syncdrive DLL and VxD can then be used

to access the card.

3.1 Using the "Add New Hardware" Wizard

The following instructions provide step-by-step instructions on installing the

MPAC-100 in Windows 98 using the "Add New Hardware" wizard. Windows 95 uses a

similar process to load the INF file from a CD with slightly different dialog boxes.

1. After inserting an MPAC-100 for the first time, the "Add New Hardware" wizard

will start. Click the "Next" button.

2. Click the "Next" button. Select the radio button for "Search for the best driver for

your device." Click the "Next" button to continue.

Quatech MPAC-100 User's Manual

9

3. On the next dialog, select the "CD-ROM drive" checkbox. Insert the Quatech

COM CD (shipped with the card) into the CD-ROM drive. Click the "Next"

button.

4. Windows should locate the INF file on the CD and display a dialog that looks

like this. Click the "Next" button.

Quatech MPAC-100 User's Manual

10

5. Windows will copy the INF file from the CD and display a final dialog

indicating that the process is complete. Click the "Finish" button.

Quatech MPAC-100 User's Manual

11

3.2 Viewing Resources with Device Manager

The following instructions provide step-by-step instructions on viewing

resources used by the MPAC-100 in Windows 95/98 using the "Device Manager"

utility.

1. Double click the "System" icon inside the Control Panel folder. This opens up

the System Properties box.

2. Click the "Device Manager" tab located along the top of the System Properties

box.

3. Double click the device group "Synchronous_Communication". The MPAC-100

model name should appear in the list of adapters.

4. Double click the MPAC-100 model name and a properties box should open for

the hardware adapter.

Quatech MPAC-100 User's Manual

12

5. Click the "Resources" tab located along the top of the properties box to view the

resources Windows has allocated for the MPAC-100 match the hardware

configuration. Click "Cancel" to exit without making changes.

6. If changes to the automatic configuration are necessary for compatibility with

existing programs, uncheck the "Use Automatic Settings" box and double-click

on the Resource Type that needs to be changed. Caution should be used to

avoid creating device conflicts with other hardware in the system.

Quatech MPAC-100 User's Manual

13

4 Other Operating Systems

Device drivers for Windows NT and OS/2 are also available for the MPAC-100.

The board can be used under DOS and other operating systems as well in many

circumstances. The software described below can be downloaded from the Quatech

web site if it did not come with the board.

4.1 Windows NT

The Windows NT device driver is installed by running the SETUP program. Up

to 256 serial ports are supported. There is a command line-based configuration utility

which is used for adding PCI bus and ISA bus serial ports. Please refer to the

documentation included with the device driver for full installation and configuration

details.

4.2 OS/2

The OS/2 device driver supports up to 32 serial ports in a system. Installation is

a manual, but simple, process. Please refer to the documentation included with the

device driver for full installation and configuration details.

4.3 DOS and other operating systems

The MPAC-100 is not a direct drop-in replacement for a legacy serial port

because its base address and IRQ cannot be fixed at values such as 3F8 hex, IRQ 4

(COM1) or 2F8 hex, IRQ 3 (COM2), etc. Rather, the system BIOS assigns the address

and the IRQ in a plug-and-play fashion at boot time. Software which is to use the

MPAC-100 must be able to accommodate any valid assignments of these resources.

For Windows 95, Windows NT and OS/2, the Quatech device drivers determine

what the resource assignments are and proceed accordingly. In other cases, however,

the user must intervene. The discussion below will center on DOS, but the concepts

can be applied to other operating systems as well.

Many DOS applications support user configuration of the base address and IRQ

of a serial port. Such applications can generally make use of the MPAC-100. Older

applications, as well as some custom software, may use hard-coded standard legacy

serial port addresses. These applications will require modifications if they are to use

the MPAC-100.

Custom applications for which the customer has source code can be modified to

make just a few PCI BIOS function calls to obtain all the necessary configuration

information. The PCI BIOS specification can be

obtained from the PCI Special Interest Group. Contact Quatech technical support for

more information.

4.4 QTPCI.EXE

Quatech MPAC-100 User's Manual

14

Quatech's "QTPCI" utility supplies the information required when modifying

the serial port settings of the application. This program should be run from real DOS,

not in a Windows DOS box.

Figure 13 shows the Basic Mode display for the MPAC-100 after the "Q" key has

been pressed. In this example, the MPAC-100 uses I/O base address FF80 hex and IRQ

11. The hardware revision of the MPAC-100 is also displayed. Pressing the "N" key

will show similar information for all non-Quatech PCI devices in the system, including

those devices integrated on the motherboard.

Quatech MPAC-100 User's Manual

15

The QTPCI program is capable only of displaying the PCI configuration. It cannot

be used to make changes.

Q - Quatech PCI adapters

N - Other PCI devices

X - EXIT

M - Change to Expert Mode

Quatech PCI Configuration Information Display Software

Version 1.03

INSTRUCTIONS:

------------------------

Press keys listed in the menu at the bottom of the screen.

This program only displays information. It cannot make changes.

PCI BIOS detected, version 2.10

Quatech PCI adapters detected

---------------------------------------------

MPAC-100 Single Port Synch RS-232 Serial Adapter (Hardware Revision A1)

Uses IRQ 12

Base addr 1 = 0xD800 I/O

_

Numbers preceeded by "0x" are hexadecimal.

Figure 14 --- QTPCI.EXE Basic Mode display

Figure 14 shows the Expert Mode display for the MPAC-100 after the "Q" key

has been pressed. The information from the Basic Mode display is presented along

with more details such as the Vendor and Device IDs, PCI Class Code, size of memory

Quatech MPAC-100 User's Manual

16

and I/O regions, etc. Pressing the "N" key will show similar information for all

non-Quatech PCI devices in the system, including those devices integrated on the

motherboard. In this example, the "Base addr 0" resource is reserved.

For users interested in even more details, PCI BIOS information can be

displayed by pressing the "B" key. Pressing the "I" key displays the PCI interrupt

routing table.

Q - Quatech PCI adapters

N - Other PCI devices

X - EXIT

M - Change to Basic Mode

Quatech PCI Configuration Information Display Software

Version 1.00

B - PCI BIOS details

I - Interrupt routing details

Quatech PCI adapters detected

---------------------------------------------

Vendor ID 0x135c, Device id 0x00F0 found in slot 0x04 on bus 0x00

Device/function code = 0x48, Revision ID = 0x01 (Hardware revision A1)

PCI Class Code = 0xff0000

Subsystem Vendor ID 0x135c, Subsystem Id 0x00F0

INTA# mapped to IRQ 12 (route 0x04)

Base addr 0 = 0xe000 I/O 0X80 bytes allocated

Base addr 1 = 0xd800 I/O 0X10 bytes allocated

_

MPAC-100 Single Port Synch RS-232 Serial Adapter

Figure 15 --- QTPCI.EXE Expert Mode display

Quatech MPAC-100 User's Manual

17

5 Using the MPAC-100 with Syncdrive

Syncdrive is a synchronous communications software driver package designed

to aid users of Quatech synchronous communication hardware in the development of

their application software. Syncdrive is included free of charge with all Quatech

MPA-series synchronous communication products. The MPAC-100 is

backward-compatible with software written for Quatech ISA-bus synchronous adapters

and it operates with Syncdrive.

Syncdrive, however, is not aware of the plug-and-play nature of PCI cards. A

Syncdrive application will expect to see the MPAC-100 at a specific base address and a

specific IRQ. When using Syncdrive with PCI cards, it is necessary to obtain the base

address and IRQ assigned to the card by using the QTPCI.EXE software utility

previously discussed.

For DOS, Windows 3.1, or OS/2, QTPCI.EXE must be used to obtain the base

address and IRQ needed by the Syncdrive application before the application tries to

use the card.

Under Windows 95/98, the card is automatically configured. To find the

settings, click the right mouse button on the My Computer icon and select Properties.

Select the Device Manager tab and double-click the card's entry under the "Synchronous

Communication" section. Select the Resources tab to see the card's base address and

IRQ. Use these settings with the Syncdrive application. Windows 95/98 may allow

changes to the settings if the "Use Automatic Settings" box is unchecked.

Syncdrive does not receive notifications of card insertion or card

removal events. Therefore it cannot support hot swapping without the user taking

some kind of action to force the Syncdrive application to initialize a newly-inserted

card.

A future release of Syncdrive may permit automatic configuration by retrieving

hardware settings from the MPAC-100. For now, the user should consider the

QTPCI.EXE program, it reflects the location (base address and IRQ) the card is in before

the Syncdrive application is started.

Quatech MPAC-100 User's Manual

18

6 Addressing

The MPAC-100 occupies a continuous 16-byte block of I/O addresses. For

example, if the base address is set to 300 hex, then the MPAC-100 will occupy address

locations 300 hex to 30F hex. If the computer in which the MPAC-100 is installed is

running PCI Card and Socket Services, the base address is set by the client driver. If

PCI Card and Socket Services are not being used, the base address is set by the

MPAC-100 enabler program.

The first four bytes of address space on the MPAC-100 contain the internal

registers of the SCC. Other Quatech architecture-specific registers occupy eight more

bytes. The remainder of the address space is reserved for future use. The MPAC-100

address map is shown in Table 2.

ReservedBase + F

Reserved

Base + E

Receive FIFO Timeout Register

Base + D

Receive Pattern Count RegisterBase + C

Receive Pattern Character RegisterBase + B

FIFO Control Register

Base + A

FIFO Status Register

Base + 9

Interrupt Status RegisterBase + 8

ReservedBase + 7

Reserved

Base + 6

Configuration Register

Base + 5

Communications RegisterBase + 4

SCC Control Port, Channel BBase + 3

SCC Data Port, Channel B

Base + 2

SCC Control Port, Channel A

Base + 1

SCC Data Port, Channel ABase + 0

Register Description

Address

Table 2 --- MPAC-100 Address Assignments

Information on the internal registers of the SCC can be found in Table 3 and

Table 4 and in the technical reference manuals available from Zilog. The other onboard

registers are fully described in subsequent chapters of this manual.

Quatech MPAC-100 User's Manual

19

7 Interrupts

The MPAC-100 will operate using the interrupt level (IRQ) assigned by the PCI

system. Interrupts can come from the SCC, the internal FIFOs or RS-232 test mode. The

interrupt source is selected by bits 4 and 5 of the Configuration Register (see page 41).

When using interrupts with the MPAC-100, the application must have an

interrupt service routine (ISR). There are several things that an ISR must do to allow

proper system operation:

1. If the internal FIFOs are enabled, read the Interrupt Status Register (see page 43)

to determine whether the interrupt was caused by a FIFO event or by the SCC.

2. If the TX_FIFO bit is set, at least 512 bytes can be written to the Tx FIFO. If the

RX_FIFO bit is set, at least 512 bytes can be read from the Rx FIFO. I/O block

move instructions may be useful. Check the FIFO Status Register (see page 44)

after servicing the FIFO(s) to see if further FIFO service is required.

3. If the SCC bit is set, do an SCC software interrupt acknowledge by reading Read

Register 2 in channel B of the SCC. The value read can also be used to vector to

the appropriate part of the ISR.

4. Service the SCC interrupt by reading the receiver buffer, writing to the transmit

buffer, issuing commands to the SCC, etc.

5. Write a Reset Highest Interrupt Under Service (IUS) command to the SCC by

writing 0x38 to Write Register 0.

6. Check for other interrupts pending in the SCC by reading Read Register 3.

Perform further interrupt servicing if necessary.

7. For applications running under DOS, a nonspecific End of Interrupt must be

submitted to the interrupt controller. For Interrupts 2-7 this is done by writing a

0x20 to port 0x20. For Interrupts 10-12, 14 and 15 this is done by writing a 0x20

to port 0x60, then a 0x20 to port 0x20 (due to the interrupt controllers being

cascaded). Device drivers running under other operating systems may have

varying requirements concerning the End of Interrupt command.

For further information on these subjects or any others involving the SCC contact

Zilog for a complete technical manual.

Quatech MPAC-100 User's Manual

20

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